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11390e76e7
that need them. This is very useful on CISCy targets like the X86 because it reduces the total spill pressure, and makes better use of it's (large) instruction set. Though the X86 backend doesn't know how to rewrite many instructions yet, this already makes a substantial difference on 176.gcc for example: Before: Time: 8.0099 ( 31.2%) 0.0100 ( 12.5%) 8.0199 ( 31.2%) 7.7186 ( 30.0%) Local Register Allocator Code quality: 734559 asm-printer - Number of machine instrs printed 111395 ra-local - Number of registers reloaded 79902 ra-local - Number of registers spilled 231554 x86-peephole - Number of peephole optimization performed After: Time: 7.8700 ( 30.6%) 0.0099 ( 19.9%) 7.8800 ( 30.6%) 7.7892 ( 30.2%) Local Register Allocator Code quality: 733083 asm-printer - Number of machine instrs printed 2379 ra-local - Number of reloads fused into instructions 109046 ra-local - Number of registers reloaded 79881 ra-local - Number of registers spilled 230658 x86-peephole - Number of peephole optimization performed So by fusing 2300 instructions, we reduced the static number of instructions by 1500, and reduces the number of peepholes (and thus the work) by about 900. This also clearly reduces the number of reload/spill instructions that are emitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11542 91177308-0d34-0410-b5e6-96231b3b80d8
720 lines
29 KiB
C++
720 lines
29 KiB
C++
//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This register allocator allocates registers to a basic block at a time,
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// attempting to keep values in registers and reusing registers as appropriate.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "regalloc"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "Support/CommandLine.h"
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#include "Support/Debug.h"
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#include "Support/Statistic.h"
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#include <iostream>
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using namespace llvm;
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namespace {
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Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
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Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
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Statistic<> NumFused ("ra-local", "Number of reloads fused into instructions");
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cl::opt<bool> DisableKill("disable-kill", cl::Hidden,
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cl::desc("Disable register kill in local-ra"));
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class RA : public MachineFunctionPass {
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const TargetMachine *TM;
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MachineFunction *MF;
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const MRegisterInfo *RegInfo;
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LiveVariables *LV;
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// StackSlotForVirtReg - Maps virtual regs to the frame index where these
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// values are spilled.
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std::map<unsigned, int> StackSlotForVirtReg;
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// Virt2PhysRegMap - This map contains entries for each virtual register
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// that is currently available in a physical register. This is "logically"
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// a map from virtual register numbers to physical register numbers.
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// Instead of using a map, however, which is slow, we use a vector. The
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// index is the VREG number - FirstVirtualRegister. If the entry is zero,
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// then it is logically "not in the map".
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//
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std::vector<unsigned> Virt2PhysRegMap;
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unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
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assert(MRegisterInfo::isVirtualRegister(VirtReg) &&"Illegal VREG #");
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assert(VirtReg-MRegisterInfo::FirstVirtualRegister <Virt2PhysRegMap.size()
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&& "VirtReg not in map!");
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return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
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}
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// PhysRegsUsed - This array is effectively a map, containing entries for
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// each physical register that currently has a value (ie, it is in
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// Virt2PhysRegMap). The value mapped to is the virtual register
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// corresponding to the physical register (the inverse of the
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// Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
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// because it is used by a future instruction. If the entry for a physical
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// register is -1, then the physical register is "not in the map".
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//
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std::vector<int> PhysRegsUsed;
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// PhysRegsUseOrder - This contains a list of the physical registers that
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// currently have a virtual register value in them. This list provides an
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// ordering of registers, imposing a reallocation order. This list is only
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// used if all registers are allocated and we have to spill one, in which
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// case we spill the least recently used register. Entries at the front of
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// the list are the least recently used registers, entries at the back are
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// the most recently used.
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//
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std::vector<unsigned> PhysRegsUseOrder;
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// VirtRegModified - This bitset contains information about which virtual
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// registers need to be spilled back to memory when their registers are
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// scavenged. If a virtual register has simply been rematerialized, there
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// is no reason to spill it to memory when we need the register back.
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//
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std::vector<bool> VirtRegModified;
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void markVirtRegModified(unsigned Reg, bool Val = true) {
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assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
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Reg -= MRegisterInfo::FirstVirtualRegister;
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if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
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VirtRegModified[Reg] = Val;
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}
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bool isVirtRegModified(unsigned Reg) const {
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assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
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assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
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&& "Illegal virtual register!");
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return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
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}
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void MarkPhysRegRecentlyUsed(unsigned Reg) {
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assert(!PhysRegsUseOrder.empty() && "No registers used!");
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if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
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for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
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if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
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unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
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PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
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// Add it to the end of the list
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PhysRegsUseOrder.push_back(RegMatch);
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if (RegMatch == Reg)
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return; // Found an exact match, exit early
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}
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}
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public:
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virtual const char *getPassName() const {
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return "Local Register Allocator";
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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if (!DisableKill)
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AU.addRequired<LiveVariables>();
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AU.addRequiredID(PHIEliminationID);
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AU.addRequiredID(TwoAddressInstructionPassID);
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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/// runOnMachineFunction - Register allocate the whole function
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bool runOnMachineFunction(MachineFunction &Fn);
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/// AllocateBasicBlock - Register allocate the specified basic block.
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void AllocateBasicBlock(MachineBasicBlock &MBB);
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/// areRegsEqual - This method returns true if the specified registers are
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/// related to each other. To do this, it checks to see if they are equal
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/// or if the first register is in the alias set of the second register.
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///
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bool areRegsEqual(unsigned R1, unsigned R2) const {
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if (R1 == R2) return true;
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for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
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*AliasSet; ++AliasSet) {
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if (*AliasSet == R1) return true;
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}
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return false;
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}
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/// getStackSpaceFor - This returns the frame index of the specified virtual
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/// register on the stack, allocating space if necessary.
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int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
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/// removePhysReg - This method marks the specified physical register as no
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/// longer being in use.
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///
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void removePhysReg(unsigned PhysReg);
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/// spillVirtReg - This method spills the value specified by PhysReg into
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/// the virtual register slot specified by VirtReg. It then updates the RA
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/// data structures to indicate the fact that PhysReg is now available.
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///
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void spillVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned VirtReg, unsigned PhysReg);
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/// spillPhysReg - This method spills the specified physical register into
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/// the virtual register slot associated with it. If OnlyVirtRegs is set to
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/// true, then the request is ignored if the physical register does not
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/// contain a virtual register.
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///
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void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
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unsigned PhysReg, bool OnlyVirtRegs = false);
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/// assignVirtToPhysReg - This method updates local state so that we know
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/// that PhysReg is the proper container for VirtReg now. The physical
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/// register must not be used for anything else when this is called.
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///
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void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
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/// liberatePhysReg - Make sure the specified physical register is available
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/// for use. If there is currently a value in it, it is either moved out of
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/// the way or spilled to memory.
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///
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void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg);
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/// isPhysRegAvailable - Return true if the specified physical register is
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/// free and available for use. This also includes checking to see if
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/// aliased registers are all free...
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///
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bool isPhysRegAvailable(unsigned PhysReg) const;
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/// getFreeReg - Look to see if there is a free register available in the
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/// specified register class. If not, return 0.
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///
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unsigned getFreeReg(const TargetRegisterClass *RC);
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/// getReg - Find a physical register to hold the specified virtual
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/// register. If all compatible physical registers are used, this method
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/// spills the last used virtual register to the stack, and uses that
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/// register.
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///
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unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned VirtReg);
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/// reloadVirtReg - This method transforms the specified specified virtual
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/// register use to refer to a physical register. This method may do this
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/// in one of several ways: if the register is available in a physical
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/// register already, it uses that physical register. If the value is not
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/// in a physical register, and if there are physical registers available,
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/// it loads it into a register. If register pressure is high, and it is
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/// possible, it tries to fold the load of the virtual register into the
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/// instruction itself. It avoids doing this if register pressure is low to
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/// improve the chance that subsequent instructions can use the reloaded
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/// value. This method returns the modified instruction.
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///
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MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned OpNum);
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void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg);
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};
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}
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/// getStackSpaceFor - This allocates space for the specified virtual register
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/// to be held on the stack.
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int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
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// Find the location Reg would belong...
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std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
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if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
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return I->second; // Already has space allocated?
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// Allocate a new stack object for this spill location...
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int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
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// Assign the slot...
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StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
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return FrameIdx;
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}
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/// removePhysReg - This method marks the specified physical register as no
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/// longer being in use.
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///
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void RA::removePhysReg(unsigned PhysReg) {
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PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
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std::vector<unsigned>::iterator It =
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std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
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if (It != PhysRegsUseOrder.end())
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PhysRegsUseOrder.erase(It);
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}
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/// spillVirtReg - This method spills the value specified by PhysReg into the
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/// virtual register slot specified by VirtReg. It then updates the RA data
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/// structures to indicate the fact that PhysReg is now available.
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///
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void RA::spillVirtReg(MachineBasicBlock &MBB, MachineInstr *I,
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unsigned VirtReg, unsigned PhysReg) {
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if (!VirtReg && DisableKill) return;
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assert(VirtReg && "Spilling a physical register is illegal!"
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" Must not have appropriate kill for the register or use exists beyond"
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" the intended one.");
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DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
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std::cerr << " containing %reg" << VirtReg;
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if (!isVirtRegModified(VirtReg))
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std::cerr << " which has not been modified, so no store necessary!");
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// Otherwise, there is a virtual register corresponding to this physical
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// register. We only need to spill it into its stack slot if it has been
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// modified.
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if (isVirtRegModified(VirtReg)) {
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const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
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int FrameIndex = getStackSpaceFor(VirtReg, RC);
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DEBUG(std::cerr << " to stack slot #" << FrameIndex);
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RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
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++NumSpilled; // Update statistics
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}
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getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
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DEBUG(std::cerr << "\n");
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removePhysReg(PhysReg);
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}
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/// spillPhysReg - This method spills the specified physical register into the
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/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
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/// then the request is ignored if the physical register does not contain a
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/// virtual register.
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///
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void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
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unsigned PhysReg, bool OnlyVirtRegs) {
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if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
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if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
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spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
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} else {
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// If the selected register aliases any other registers, we must make
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// sure that one of the aliases isn't alive...
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for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
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*AliasSet; ++AliasSet)
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if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
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if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
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spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
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}
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}
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/// assignVirtToPhysReg - This method updates local state so that we know
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/// that PhysReg is the proper container for VirtReg now. The physical
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/// register must not be used for anything else when this is called.
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///
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void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
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assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
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// Update information to note the fact that this register was just used, and
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// it holds VirtReg.
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PhysRegsUsed[PhysReg] = VirtReg;
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getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
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PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
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}
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/// isPhysRegAvailable - Return true if the specified physical register is free
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/// and available for use. This also includes checking to see if aliased
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/// registers are all free...
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///
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bool RA::isPhysRegAvailable(unsigned PhysReg) const {
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if (PhysRegsUsed[PhysReg] != -1) return false;
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// If the selected register aliases any other allocated registers, it is
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// not free!
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for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
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*AliasSet; ++AliasSet)
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if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
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return false; // Can't use this reg then.
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return true;
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}
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/// getFreeReg - Look to see if there is a free register available in the
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/// specified register class. If not, return 0.
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///
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unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
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// Get iterators defining the range of registers that are valid to allocate in
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// this class, which also specifies the preferred allocation order.
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TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
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TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
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for (; RI != RE; ++RI)
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if (isPhysRegAvailable(*RI)) { // Is reg unused?
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assert(*RI != 0 && "Cannot use register!");
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return *RI; // Found an unused register!
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}
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return 0;
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}
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/// liberatePhysReg - Make sure the specified physical register is available for
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/// use. If there is currently a value in it, it is either moved out of the way
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/// or spilled to memory.
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///
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void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
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unsigned PhysReg) {
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// FIXME: This code checks to see if a register is available, but it really
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// wants to know if a reg is available BEFORE the instruction executes. If
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// called after killed operands are freed, it runs the risk of reallocating a
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// used operand...
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#if 0
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if (isPhysRegAvailable(PhysReg)) return; // Already available...
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// Check to see if the register is directly used, not indirectly used through
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// aliases. If aliased registers are the ones actually used, we cannot be
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// sure that we will be able to save the whole thing if we do a reg-reg copy.
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if (PhysRegsUsed[PhysReg] != -1) {
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// The virtual register held...
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unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
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// Check to see if there is a compatible register available. If so, we can
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// move the value into the new register...
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//
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const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
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if (unsigned NewReg = getFreeReg(RC)) {
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// Emit the code to copy the value...
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RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
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// Update our internal state to indicate that PhysReg is available and Reg
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// isn't.
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getVirt2PhysRegMapSlot[VirtReg] = 0;
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removePhysReg(PhysReg); // Free the physreg
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// Move reference over to new register...
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assignVirtToPhysReg(VirtReg, NewReg);
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return;
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}
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}
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#endif
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spillPhysReg(MBB, I, PhysReg);
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}
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/// getReg - Find a physical register to hold the specified virtual
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/// register. If all compatible physical registers are used, this method spills
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/// the last used virtual register to the stack, and uses that register.
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///
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unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
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unsigned VirtReg) {
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const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
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// First check to see if we have a free register of the requested type...
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unsigned PhysReg = getFreeReg(RC);
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// If we didn't find an unused register, scavenge one now!
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if (PhysReg == 0) {
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assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
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// Loop over all of the preallocated registers from the least recently used
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// to the most recently used. When we find one that is capable of holding
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// our register, use it.
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for (unsigned i = 0; PhysReg == 0; ++i) {
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assert(i != PhysRegsUseOrder.size() &&
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"Couldn't find a register of the appropriate class!");
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unsigned R = PhysRegsUseOrder[i];
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// We can only use this register if it holds a virtual register (ie, it
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// can be spilled). Do not use it if it is an explicitly allocated
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// physical register!
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assert(PhysRegsUsed[R] != -1 &&
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"PhysReg in PhysRegsUseOrder, but is not allocated?");
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if (PhysRegsUsed[R]) {
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// If the current register is compatible, use it.
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if (RegInfo->getRegClass(R) == RC) {
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PhysReg = R;
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break;
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} else {
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// If one of the registers aliased to the current register is
|
|
// compatible, use it.
|
|
for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
|
|
*AliasSet; ++AliasSet) {
|
|
if (RegInfo->getRegClass(*AliasSet) == RC) {
|
|
PhysReg = *AliasSet; // Take an aliased register
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
assert(PhysReg && "Physical register not assigned!?!?");
|
|
|
|
// At this point PhysRegsUseOrder[i] is the least recently used register of
|
|
// compatible register class. Spill it to memory and reap its remains.
|
|
spillPhysReg(MBB, I, PhysReg);
|
|
}
|
|
|
|
// Now that we know which register we need to assign this to, do it now!
|
|
assignVirtToPhysReg(VirtReg, PhysReg);
|
|
return PhysReg;
|
|
}
|
|
|
|
|
|
/// reloadVirtReg - This method transforms the specified specified virtual
|
|
/// register use to refer to a physical register. This method may do this in
|
|
/// one of several ways: if the register is available in a physical register
|
|
/// already, it uses that physical register. If the value is not in a physical
|
|
/// register, and if there are physical registers available, it loads it into a
|
|
/// register. If register pressure is high, and it is possible, it tries to
|
|
/// fold the load of the virtual register into the instruction itself. It
|
|
/// avoids doing this if register pressure is low to improve the chance that
|
|
/// subsequent instructions can use the reloaded value. This method returns the
|
|
/// modified instruction.
|
|
///
|
|
MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
|
|
unsigned OpNum) {
|
|
unsigned VirtReg = MI->getOperand(OpNum).getReg();
|
|
|
|
// If the virtual register is already available, just update the instruction
|
|
// and return.
|
|
if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
|
|
MarkPhysRegRecentlyUsed(PR); // Already have this value available!
|
|
MI->SetMachineOperandReg(OpNum, PR); // Assign the input register
|
|
return MI;
|
|
}
|
|
|
|
// Otherwise, we need to fold it into the current instruction, or reload it.
|
|
// If we have registers available to hold the value, use them.
|
|
const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
|
|
unsigned PhysReg = getFreeReg(RC);
|
|
int FrameIndex = getStackSpaceFor(VirtReg, RC);
|
|
|
|
if (PhysReg) { // Register is available, allocate it!
|
|
assignVirtToPhysReg(VirtReg, PhysReg);
|
|
} else { // No registers available.
|
|
// If we can fold this spill into this instruction, do so now.
|
|
MachineBasicBlock::iterator MII = MI;
|
|
if (RegInfo->foldMemoryOperand(MII, OpNum, FrameIndex)) {
|
|
++NumFused;
|
|
return MII;
|
|
}
|
|
|
|
// It looks like we can't fold this virtual register load into this
|
|
// instruction. Force some poor hapless value out of the register file to
|
|
// make room for the new register, and reload it.
|
|
PhysReg = getReg(MBB, MI, VirtReg);
|
|
}
|
|
|
|
markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
|
|
|
|
DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
|
|
<< RegInfo->getName(PhysReg) << "\n");
|
|
|
|
// Add move instruction(s)
|
|
RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
|
|
++NumReloaded; // Update statistics
|
|
|
|
MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
|
|
return MI;
|
|
}
|
|
|
|
|
|
|
|
void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
|
|
// loop over each instruction
|
|
MachineBasicBlock::iterator MI = MBB.begin();
|
|
for (; MI != MBB.end(); ++MI) {
|
|
const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
|
|
DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
|
|
std::cerr << " Regs have values: ";
|
|
for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
|
|
if (PhysRegsUsed[i] != -1)
|
|
std::cerr << "[" << RegInfo->getName(i)
|
|
<< ",%reg" << PhysRegsUsed[i] << "] ";
|
|
std::cerr << "\n");
|
|
|
|
// Loop over the implicit uses, making sure that they are at the head of the
|
|
// use order list, so they don't get reallocated.
|
|
for (const unsigned *ImplicitUses = TID.ImplicitUses;
|
|
*ImplicitUses; ++ImplicitUses)
|
|
MarkPhysRegRecentlyUsed(*ImplicitUses);
|
|
|
|
// Get the used operands into registers. This has the potential to spill
|
|
// incoming values if we are out of registers. Note that we completely
|
|
// ignore physical register uses here. We assume that if an explicit
|
|
// physical register is referenced by the instruction, that it is guaranteed
|
|
// to be live-in, or the input is badly hosed.
|
|
//
|
|
for (unsigned i = 0; i != MI->getNumOperands(); ++i)
|
|
if (MI->getOperand(i).isUse() &&
|
|
!MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
|
|
MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg()))
|
|
MI = reloadVirtReg(MBB, MI, i);
|
|
|
|
if (!DisableKill) {
|
|
// If this instruction is the last user of anything in registers, kill the
|
|
// value, freeing the register being used, so it doesn't need to be
|
|
// spilled to memory.
|
|
//
|
|
for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
|
|
KE = LV->killed_end(MI); KI != KE; ++KI) {
|
|
unsigned VirtReg = KI->second;
|
|
unsigned PhysReg = VirtReg;
|
|
if (MRegisterInfo::isVirtualRegister(VirtReg)) {
|
|
// If the virtual register was never materialized into a register, it
|
|
// might not be in the map, but it won't hurt to zero it out anyway.
|
|
unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
|
|
PhysReg = PhysRegSlot;
|
|
PhysRegSlot = 0;
|
|
}
|
|
|
|
if (PhysReg) {
|
|
DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
|
|
<< "[%reg" << VirtReg <<"], removing it from live set\n");
|
|
removePhysReg(PhysReg);
|
|
}
|
|
}
|
|
}
|
|
|
|
// Loop over all of the operands of the instruction, spilling registers that
|
|
// are defined, and marking explicit destinations in the PhysRegsUsed map.
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
|
|
if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
|
|
MRegisterInfo::isPhysicalRegister(MI->getOperand(i).getReg())) {
|
|
unsigned Reg = MI->getOperand(i).getReg();
|
|
spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
|
|
PhysRegsUsed[Reg] = 0; // It is free and reserved now
|
|
PhysRegsUseOrder.push_back(Reg);
|
|
for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
|
|
*AliasSet; ++AliasSet) {
|
|
PhysRegsUseOrder.push_back(*AliasSet);
|
|
PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
|
|
}
|
|
}
|
|
|
|
// Loop over the implicit defs, spilling them as well.
|
|
for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
|
|
*ImplicitDefs; ++ImplicitDefs) {
|
|
unsigned Reg = *ImplicitDefs;
|
|
spillPhysReg(MBB, MI, Reg, true);
|
|
PhysRegsUseOrder.push_back(Reg);
|
|
PhysRegsUsed[Reg] = 0; // It is free and reserved now
|
|
for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
|
|
*AliasSet; ++AliasSet) {
|
|
PhysRegsUseOrder.push_back(*AliasSet);
|
|
PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
|
|
}
|
|
}
|
|
|
|
// Okay, we have allocated all of the source operands and spilled any values
|
|
// that would be destroyed by defs of this instruction. Loop over the
|
|
// implicit defs and assign them to a register, spilling incoming values if
|
|
// we need to scavenge a register.
|
|
//
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
|
|
if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
|
|
MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) {
|
|
unsigned DestVirtReg = MI->getOperand(i).getReg();
|
|
unsigned DestPhysReg;
|
|
|
|
// If DestVirtReg already has a value, use it.
|
|
if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
|
|
DestPhysReg = getReg(MBB, MI, DestVirtReg);
|
|
markVirtRegModified(DestVirtReg);
|
|
MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
|
|
}
|
|
|
|
if (!DisableKill) {
|
|
// If this instruction defines any registers that are immediately dead,
|
|
// kill them now.
|
|
//
|
|
for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
|
|
KE = LV->dead_end(MI); KI != KE; ++KI) {
|
|
unsigned VirtReg = KI->second;
|
|
unsigned PhysReg = VirtReg;
|
|
if (MRegisterInfo::isVirtualRegister(VirtReg)) {
|
|
unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
|
|
PhysReg = PhysRegSlot;
|
|
assert(PhysReg != 0);
|
|
PhysRegSlot = 0;
|
|
}
|
|
|
|
if (PhysReg) {
|
|
DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
|
|
<< " [%reg" << VirtReg
|
|
<< "] is never used, removing it frame live list\n");
|
|
removePhysReg(PhysReg);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Rewind the iterator to point to the first flow control instruction...
|
|
const TargetInstrInfo &TII = TM->getInstrInfo();
|
|
MI = MBB.end();
|
|
while (MI != MBB.begin() && TII.isTerminatorInstr((--MI)->getOpcode()));
|
|
++MI;
|
|
|
|
// Spill all physical registers holding virtual registers now.
|
|
for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
|
|
if (PhysRegsUsed[i] != -1)
|
|
if (unsigned VirtReg = PhysRegsUsed[i])
|
|
spillVirtReg(MBB, MI, VirtReg, i);
|
|
else
|
|
removePhysReg(i);
|
|
|
|
#ifndef NDEBUG
|
|
bool AllOk = true;
|
|
for (unsigned i = 0, e = Virt2PhysRegMap.size(); i != e; ++i)
|
|
if (unsigned PR = Virt2PhysRegMap[i]) {
|
|
std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
|
|
AllOk = false;
|
|
}
|
|
assert(AllOk && "Virtual registers still in phys regs?");
|
|
#endif
|
|
|
|
// Clear any physical register which appear live at the end of the basic
|
|
// block, but which do not hold any virtual registers. e.g., the stack
|
|
// pointer.
|
|
PhysRegsUseOrder.clear();
|
|
}
|
|
|
|
|
|
/// runOnMachineFunction - Register allocate the whole function
|
|
///
|
|
bool RA::runOnMachineFunction(MachineFunction &Fn) {
|
|
DEBUG(std::cerr << "Machine Function " << "\n");
|
|
MF = &Fn;
|
|
TM = &Fn.getTarget();
|
|
RegInfo = TM->getRegisterInfo();
|
|
|
|
PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
|
|
|
|
// initialize the virtual->physical register map to have a 'null'
|
|
// mapping for all virtual registers
|
|
Virt2PhysRegMap.assign(MF->getSSARegMap()->getNumVirtualRegs(), 0);
|
|
|
|
if (!DisableKill)
|
|
LV = &getAnalysis<LiveVariables>();
|
|
|
|
// Loop over all of the basic blocks, eliminating virtual register references
|
|
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
|
|
MBB != MBBe; ++MBB)
|
|
AllocateBasicBlock(*MBB);
|
|
|
|
StackSlotForVirtReg.clear();
|
|
PhysRegsUsed.clear();
|
|
VirtRegModified.clear();
|
|
Virt2PhysRegMap.clear();
|
|
return true;
|
|
}
|
|
|
|
FunctionPass *llvm::createLocalRegisterAllocator() {
|
|
return new RA();
|
|
}
|