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cd52a7a381
Apparently, the style needs to be agreed upon first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240390 91177308-0d34-0410-b5e6-96231b3b80d8
262 lines
8.7 KiB
C++
262 lines
8.7 KiB
C++
//===-- ImplicitNullChecks.cpp - Fold null checks into memory accesses ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass turns explicit null checks of the form
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//
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// test %r10, %r10
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// je throw_npe
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// movl (%r10), %esi
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// ...
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//
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// to
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//
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// faulting_load_op("movl (%r10), %esi", throw_npe)
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// ...
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//
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// With the help of a runtime that understands the .fault_maps section,
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// faulting_load_op branches to throw_npe if executing movl (%r10), %esi incurs
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// a page fault.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/IR/BasicBlock.h"
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#include "llvm/IR/Instruction.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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using namespace llvm;
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static cl::opt<unsigned> PageSize("imp-null-check-page-size",
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cl::desc("The page size of the target in "
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"bytes"),
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cl::init(4096));
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namespace {
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class ImplicitNullChecks : public MachineFunctionPass {
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/// Represents one null check that can be made implicit.
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struct NullCheck {
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// The memory operation the null check can be folded into.
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MachineInstr *MemOperation;
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// The instruction actually doing the null check (Ptr != 0).
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MachineInstr *CheckOperation;
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// The block the check resides in.
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MachineBasicBlock *CheckBlock;
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// The block branched to if the pointer is non-null.
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MachineBasicBlock *NotNullSucc;
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// The block branched to if the pointer is null.
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MachineBasicBlock *NullSucc;
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NullCheck()
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: MemOperation(), CheckOperation(), CheckBlock(), NotNullSucc(),
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NullSucc() {}
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explicit NullCheck(MachineInstr *memOperation, MachineInstr *checkOperation,
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MachineBasicBlock *checkBlock,
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MachineBasicBlock *notNullSucc,
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MachineBasicBlock *nullSucc)
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: MemOperation(memOperation), CheckOperation(checkOperation),
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CheckBlock(checkBlock), NotNullSucc(notNullSucc), NullSucc(nullSucc) {
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}
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};
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const TargetInstrInfo *TII = nullptr;
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const TargetRegisterInfo *TRI = nullptr;
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MachineModuleInfo *MMI = nullptr;
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bool analyzeBlockForNullChecks(MachineBasicBlock &MBB,
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SmallVectorImpl<NullCheck> &NullCheckList);
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MachineInstr *insertFaultingLoad(MachineInstr *LoadMI, MachineBasicBlock *MBB,
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MCSymbol *HandlerLabel);
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void rewriteNullChecks(ArrayRef<NullCheck> NullCheckList);
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public:
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static char ID;
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ImplicitNullChecks() : MachineFunctionPass(ID) {
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initializeImplicitNullChecksPass(*PassRegistry::getPassRegistry());
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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};
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}
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bool ImplicitNullChecks::runOnMachineFunction(MachineFunction &MF) {
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TII = MF.getSubtarget().getInstrInfo();
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TRI = MF.getRegInfo().getTargetRegisterInfo();
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MMI = &MF.getMMI();
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SmallVector<NullCheck, 16> NullCheckList;
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for (auto &MBB : MF)
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analyzeBlockForNullChecks(MBB, NullCheckList);
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if (!NullCheckList.empty())
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rewriteNullChecks(NullCheckList);
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return !NullCheckList.empty();
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}
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/// Analyze MBB to check if its terminating branch can be turned into an
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/// implicit null check. If yes, append a description of the said null check to
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/// NullCheckList and return true, else return false.
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bool ImplicitNullChecks::analyzeBlockForNullChecks(
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MachineBasicBlock &MBB, SmallVectorImpl<NullCheck> &NullCheckList) {
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typedef TargetInstrInfo::MachineBranchPredicate MachineBranchPredicate;
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MachineBranchPredicate MBP;
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if (TII->AnalyzeBranchPredicate(MBB, MBP, true))
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return false;
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// Is the predicate comparing an integer to zero?
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if (!(MBP.LHS.isReg() && MBP.RHS.isImm() && MBP.RHS.getImm() == 0 &&
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(MBP.Predicate == MachineBranchPredicate::PRED_NE ||
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MBP.Predicate == MachineBranchPredicate::PRED_EQ)))
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return false;
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// If we cannot erase the test instruction itself, then making the null check
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// implicit does not buy us much.
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if (!MBP.SingleUseCondition)
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return false;
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MachineBasicBlock *NotNullSucc, *NullSucc;
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if (MBP.Predicate == MachineBranchPredicate::PRED_NE) {
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NotNullSucc = MBP.TrueDest;
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NullSucc = MBP.FalseDest;
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} else {
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NotNullSucc = MBP.FalseDest;
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NullSucc = MBP.TrueDest;
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}
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// We handle the simplest case for now. We can potentially do better by using
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// the machine dominator tree.
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if (NotNullSucc->pred_size() != 1)
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return false;
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// Starting with a code fragment like:
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//
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// test %RAX, %RAX
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// jne LblNotNull
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//
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// LblNull:
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// callq throw_NullPointerException
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//
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// LblNotNull:
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// Def = Load (%RAX + <offset>)
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// ...
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//
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//
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// we want to end up with
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//
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// Def = TrappingLoad (%RAX + <offset>), LblNull
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// jmp LblNotNull ;; explicit or fallthrough
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//
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// LblNotNull:
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// ...
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//
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// LblNull:
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// callq throw_NullPointerException
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//
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unsigned PointerReg = MBP.LHS.getReg();
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MachineInstr *MemOp = &*NotNullSucc->begin();
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unsigned BaseReg, Offset;
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if (TII->getMemOpBaseRegImmOfs(MemOp, BaseReg, Offset, TRI))
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if (MemOp->mayLoad() && !MemOp->isPredicable() && BaseReg == PointerReg &&
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Offset < PageSize && MemOp->getDesc().getNumDefs() == 1) {
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NullCheckList.emplace_back(MemOp, MBP.ConditionDef, &MBB, NotNullSucc,
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NullSucc);
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return true;
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}
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return false;
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}
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/// Wrap a machine load instruction, LoadMI, into a FAULTING_LOAD_OP machine
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/// instruction. The FAULTING_LOAD_OP instruction does the same load as LoadMI
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/// (defining the same register), and branches to HandlerLabel if the load
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/// faults. The FAULTING_LOAD_OP instruction is inserted at the end of MBB.
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MachineInstr *ImplicitNullChecks::insertFaultingLoad(MachineInstr *LoadMI,
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MachineBasicBlock *MBB,
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MCSymbol *HandlerLabel) {
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DebugLoc DL;
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unsigned NumDefs = LoadMI->getDesc().getNumDefs();
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assert(NumDefs == 1 && "other cases unhandled!");
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(void)NumDefs;
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unsigned DefReg = LoadMI->defs().begin()->getReg();
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assert(std::distance(LoadMI->defs().begin(), LoadMI->defs().end()) == 1 &&
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"expected exactly one def!");
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auto MIB = BuildMI(MBB, DL, TII->get(TargetOpcode::FAULTING_LOAD_OP), DefReg)
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.addSym(HandlerLabel)
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.addImm(LoadMI->getOpcode());
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for (auto &MO : LoadMI->uses())
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MIB.addOperand(MO);
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MIB.setMemRefs(LoadMI->memoperands_begin(), LoadMI->memoperands_end());
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return MIB;
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}
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/// Rewrite the null checks in NullCheckList into implicit null checks.
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void ImplicitNullChecks::rewriteNullChecks(
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ArrayRef<ImplicitNullChecks::NullCheck> NullCheckList) {
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DebugLoc DL;
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for (auto &NC : NullCheckList) {
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MCSymbol *HandlerLabel = MMI->getContext().createTempSymbol();
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// Remove the conditional branch dependent on the null check.
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unsigned BranchesRemoved = TII->RemoveBranch(*NC.CheckBlock);
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(void)BranchesRemoved;
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assert(BranchesRemoved > 0 && "expected at least one branch!");
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// Insert a faulting load where the conditional branch was originally. We
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// check earlier ensures that this bit of code motion is legal. We do not
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// touch the successors list for any basic block since we haven't changed
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// control flow, we've just made it implicit.
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insertFaultingLoad(NC.MemOperation, NC.CheckBlock, HandlerLabel);
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NC.MemOperation->removeFromParent();
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NC.CheckOperation->eraseFromParent();
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// Insert an *unconditional* branch to not-null successor.
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TII->InsertBranch(*NC.CheckBlock, NC.NotNullSucc, nullptr, /*Cond=*/None,
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DL);
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// Emit the HandlerLabel as an EH_LABEL.
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BuildMI(*NC.NullSucc, NC.NullSucc->begin(), DL,
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TII->get(TargetOpcode::EH_LABEL)).addSym(HandlerLabel);
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}
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}
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char ImplicitNullChecks::ID = 0;
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char &llvm::ImplicitNullChecksID = ImplicitNullChecks::ID;
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INITIALIZE_PASS_BEGIN(ImplicitNullChecks, "implicit-null-checks",
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"Implicit null checks", false, false)
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INITIALIZE_PASS_END(ImplicitNullChecks, "implicit-null-checks",
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"Implicit null checks", false, false)
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