Krzysztof Parzyszek cdc2ace692 [Hexagon] Undo shift folding where it could simplify addressing mode ... For example, avoid (single shift): r0 = and(##536870908,lsr(r0,#3)) r0 = memw(r1+r0<<#0) in favor of (two shifts): r0 = lsr(r0,#5) r0 = memw(r1+r0<<#2) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296196 91177308-0d34-0410-b5e6-96231b3b80d8		2017-02-24 23:34:24 +00:00
..
Analysis
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BugPoint
CodeGen	[Hexagon] Undo shift folding where it could simplify addressing mode	2017-02-24 23:34:24 +00:00
DebugInfo
Examples
ExecutionEngine
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FileCheck
Instrumentation	[msan] Fix instrumentation of array allocas.	2017-02-24 00:13:17 +00:00
Integer
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LTO
MC	Disallow redefinition of section symbols.	2017-02-24 21:44:58 +00:00
Object
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SymbolRewriter
TableGen	[globalisel] Decouple src pattern operands from dst pattern operands.	2017-02-24 15:43:30 +00:00
ThinLTO/X86
tools	[mips][mc] Fix a crash when disassembling odd sized sections	2017-02-24 12:47:41 +00:00
Transforms	[CodeGenPrepare] Make -addr-sink-using-gep work with address spaces.	2017-02-24 20:51:36 +00:00
Unit
Verifier	Revert "Teach the IR verifier to reject conflicting debug info for function arguments."	2017-02-23 19:13:48 +00:00
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
TestRunner.sh