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b52ba9f8a8
Stack is formed improperly for long structures passed as byval arguments for EABI mode. If we took AAPCS reference, we can found the next statements: A: "If the argument requires double-word alignment (8-byte), the NCRN (Next Core Register Number) is rounded up to the next even register number." (5.5 Parameter Passing, Stage C, C.3). B: "The alignment of an aggregate shall be the alignment of its most-aligned component." (4.3 Composite Types, 4.3.1 Aggregates). So if we have structure with doubles (9 double fields) and 3 Core unused registers (r1, r2, r3): caller should use r2 and r3 registers only. Currently r1,r2,r3 set is used, but it is invalid. Callee VA routine should also use r2 and r3 regs only. All is ok here. This behaviour is guessed by rounding up SP address with ADD+BFC operations. Fix: Main fix is in ARMTargetLowering::HandleByVal. If we detected AAPCS mode and 8 byte alignment, we waste odd registers then. P.S.: I also improved LDRB_POST_IMM regression test. Since ldrb instruction will not generated by current regression test after this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166018 91177308-0d34-0410-b5e6-96231b3b80d8
181 lines
6.4 KiB
C++
181 lines
6.4 KiB
C++
//===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the CCState class, used for lowering and implementing
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// calling conventions.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/DataLayout.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetLowering.h"
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using namespace llvm;
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CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
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const TargetMachine &tm, SmallVector<CCValAssign, 16> &locs,
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LLVMContext &C)
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: CallingConv(CC), IsVarArg(isVarArg), MF(mf), TM(tm),
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TRI(*TM.getRegisterInfo()), Locs(locs), Context(C),
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CallOrPrologue(Unknown) {
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// No stack is used.
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StackOffset = 0;
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clearFirstByValReg();
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UsedRegs.resize((TRI.getNumRegs()+31)/32);
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}
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// HandleByVal - Allocate space on the stack large enough to pass an argument
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// by value. The size and alignment information of the argument is encoded in
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// its parameter attribute.
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void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
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MVT LocVT, CCValAssign::LocInfo LocInfo,
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int MinSize, int MinAlign,
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ISD::ArgFlagsTy ArgFlags) {
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unsigned Align = ArgFlags.getByValAlign();
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unsigned Size = ArgFlags.getByValSize();
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if (MinSize > (int)Size)
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Size = MinSize;
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if (MinAlign > (int)Align)
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Align = MinAlign;
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MF.getFrameInfo()->ensureMaxAlignment(Align);
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TM.getTargetLowering()->HandleByVal(this, Size, Align);
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unsigned Offset = AllocateStack(Size, Align);
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addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
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}
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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void CCState::MarkAllocated(unsigned Reg) {
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for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
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UsedRegs[*AI/32] |= 1 << (*AI&31);
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}
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/// AnalyzeFormalArguments - Analyze an array of argument values,
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/// incorporating info about the formals into this state.
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void
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CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
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CCAssignFn Fn) {
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unsigned NumArgs = Ins.size();
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for (unsigned i = 0; i != NumArgs; ++i) {
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MVT ArgVT = Ins[i].VT;
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ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
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if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
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#ifndef NDEBUG
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dbgs() << "Formal argument #" << i << " has unhandled type "
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<< EVT(ArgVT).getEVTString();
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#endif
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llvm_unreachable(0);
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}
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}
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}
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/// CheckReturn - Analyze the return values of a function, returning true if
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/// the return can be performed without sret-demotion, and false otherwise.
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bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
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CCAssignFn Fn) {
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// Determine which register each value should be copied into.
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for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
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MVT VT = Outs[i].VT;
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ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
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if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
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return false;
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}
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return true;
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}
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/// AnalyzeReturn - Analyze the returned values of a return,
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/// incorporating info about the result values into this state.
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void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
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CCAssignFn Fn) {
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// Determine which register each value should be copied into.
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for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
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MVT VT = Outs[i].VT;
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ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
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if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) {
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#ifndef NDEBUG
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dbgs() << "Return operand #" << i << " has unhandled type "
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<< EVT(VT).getEVTString();
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#endif
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llvm_unreachable(0);
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}
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}
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}
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/// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
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/// incorporating info about the passed values into this state.
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void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
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CCAssignFn Fn) {
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unsigned NumOps = Outs.size();
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for (unsigned i = 0; i != NumOps; ++i) {
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MVT ArgVT = Outs[i].VT;
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ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
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if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
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#ifndef NDEBUG
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dbgs() << "Call operand #" << i << " has unhandled type "
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<< EVT(ArgVT).getEVTString();
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#endif
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llvm_unreachable(0);
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}
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}
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}
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/// AnalyzeCallOperands - Same as above except it takes vectors of types
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/// and argument flags.
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void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
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SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
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CCAssignFn Fn) {
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unsigned NumOps = ArgVTs.size();
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for (unsigned i = 0; i != NumOps; ++i) {
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MVT ArgVT = ArgVTs[i];
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ISD::ArgFlagsTy ArgFlags = Flags[i];
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if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
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#ifndef NDEBUG
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dbgs() << "Call operand #" << i << " has unhandled type "
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<< EVT(ArgVT).getEVTString();
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#endif
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llvm_unreachable(0);
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}
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}
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}
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/// AnalyzeCallResult - Analyze the return values of a call,
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/// incorporating info about the passed values into this state.
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void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
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CCAssignFn Fn) {
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for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
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MVT VT = Ins[i].VT;
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ISD::ArgFlagsTy Flags = Ins[i].Flags;
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if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
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#ifndef NDEBUG
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dbgs() << "Call result #" << i << " has unhandled type "
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<< EVT(VT).getEVTString() << "\n";
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#endif
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llvm_unreachable(0);
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}
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}
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}
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/// AnalyzeCallResult - Same as above except it's specialized for calls which
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/// produce a single value.
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void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) {
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if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
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#ifndef NDEBUG
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dbgs() << "Call result has unhandled type "
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<< EVT(VT).getEVTString();
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#endif
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llvm_unreachable(0);
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}
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}
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