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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
156 lines
3.6 KiB
LLVM
156 lines
3.6 KiB
LLVM
; RUN: llc < %s -march=sparcv9 -verify-machineinstrs | FileCheck %s
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; CHECK-LABEL: test_atomic_i32
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; CHECK: ld [%o0]
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; CHECK: membar
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; CHECK: ld [%o1]
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; CHECK: membar
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; CHECK: membar
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; CHECK: st {{.+}}, [%o2]
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define i32 @test_atomic_i32(i32* %ptr1, i32* %ptr2, i32* %ptr3) {
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entry:
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%0 = load atomic i32, i32* %ptr1 acquire, align 8
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%1 = load atomic i32, i32* %ptr2 acquire, align 8
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%2 = add i32 %0, %1
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store atomic i32 %2, i32* %ptr3 release, align 8
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ret i32 %2
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}
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; CHECK-LABEL: test_atomic_i64
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; CHECK: ldx [%o0]
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; CHECK: membar
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; CHECK: ldx [%o1]
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; CHECK: membar
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; CHECK: membar
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; CHECK: stx {{.+}}, [%o2]
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define i64 @test_atomic_i64(i64* %ptr1, i64* %ptr2, i64* %ptr3) {
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entry:
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%0 = load atomic i64, i64* %ptr1 acquire, align 8
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%1 = load atomic i64, i64* %ptr2 acquire, align 8
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%2 = add i64 %0, %1
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store atomic i64 %2, i64* %ptr3 release, align 8
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ret i64 %2
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}
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; CHECK-LABEL: test_cmpxchg_i32
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; CHECK: mov 123, [[R:%[gilo][0-7]]]
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; CHECK: cas [%o1], %o0, [[R]]
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define i32 @test_cmpxchg_i32(i32 %a, i32* %ptr) {
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entry:
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%pair = cmpxchg i32* %ptr, i32 %a, i32 123 monotonic monotonic
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%b = extractvalue { i32, i1 } %pair, 0
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ret i32 %b
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}
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; CHECK-LABEL: test_cmpxchg_i64
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; CHECK: mov 123, [[R:%[gilo][0-7]]]
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; CHECK: casx [%o1], %o0, [[R]]
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define i64 @test_cmpxchg_i64(i64 %a, i64* %ptr) {
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entry:
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%pair = cmpxchg i64* %ptr, i64 %a, i64 123 monotonic monotonic
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%b = extractvalue { i64, i1 } %pair, 0
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ret i64 %b
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}
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; CHECK-LABEL: test_swap_i32
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; CHECK: mov 42, [[R:%[gilo][0-7]]]
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; CHECK: swap [%o1], [[R]]
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define i32 @test_swap_i32(i32 %a, i32* %ptr) {
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entry:
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%b = atomicrmw xchg i32* %ptr, i32 42 monotonic
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ret i32 %b
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}
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; CHECK-LABEL: test_swap_i64
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; CHECK: casx [%o1],
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define i64 @test_swap_i64(i64 %a, i64* %ptr) {
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entry:
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%b = atomicrmw xchg i64* %ptr, i64 42 monotonic
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ret i64 %b
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}
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; CHECK-LABEL: test_load_add_32
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; CHECK: membar
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; CHECK: add [[V:%[gilo][0-7]]], %o1, [[U:%[gilo][0-7]]]
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; CHECK: cas [%o0], [[V]], [[U]]
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; CHECK: membar
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define zeroext i32 @test_load_add_32(i32* %p, i32 zeroext %v) {
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entry:
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%0 = atomicrmw add i32* %p, i32 %v seq_cst
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ret i32 %0
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}
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; CHECK-LABEL: test_load_sub_64
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; CHECK: membar
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; CHECK: sub
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; CHECK: casx [%o0]
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; CHECK: membar
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define zeroext i64 @test_load_sub_64(i64* %p, i64 zeroext %v) {
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entry:
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%0 = atomicrmw sub i64* %p, i64 %v seq_cst
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ret i64 %0
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}
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; CHECK-LABEL: test_load_xor_32
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; CHECK: membar
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; CHECK: xor
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; CHECK: cas [%o0]
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; CHECK: membar
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define zeroext i32 @test_load_xor_32(i32* %p, i32 zeroext %v) {
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entry:
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%0 = atomicrmw xor i32* %p, i32 %v seq_cst
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ret i32 %0
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}
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; CHECK-LABEL: test_load_and_32
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; CHECK: membar
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; CHECK: and
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; CHECK-NOT: xor
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; CHECK: cas [%o0]
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; CHECK: membar
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define zeroext i32 @test_load_and_32(i32* %p, i32 zeroext %v) {
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entry:
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%0 = atomicrmw and i32* %p, i32 %v seq_cst
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ret i32 %0
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}
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; CHECK-LABEL: test_load_nand_32
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; CHECK: membar
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; CHECK: and
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; CHECK: xor
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; CHECK: cas [%o0]
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; CHECK: membar
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define zeroext i32 @test_load_nand_32(i32* %p, i32 zeroext %v) {
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entry:
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%0 = atomicrmw nand i32* %p, i32 %v seq_cst
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ret i32 %0
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}
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; CHECK-LABEL: test_load_max_64
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; CHECK: membar
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; CHECK: cmp
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; CHECK: movg %xcc
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; CHECK: casx [%o0]
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; CHECK: membar
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define zeroext i64 @test_load_max_64(i64* %p, i64 zeroext %v) {
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entry:
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%0 = atomicrmw max i64* %p, i64 %v seq_cst
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ret i64 %0
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}
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; CHECK-LABEL: test_load_umin_32
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; CHECK: membar
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; CHECK: cmp
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; CHECK: movleu %icc
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; CHECK: cas [%o0]
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; CHECK: membar
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define zeroext i32 @test_load_umin_32(i32* %p, i32 zeroext %v) {
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entry:
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%0 = atomicrmw umin i32* %p, i32 %v seq_cst
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ret i32 %0
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}
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