Craig Topper d0d13f5774 [InstCombine] Teach SimplifyMultipleUseDemandedBits to handle And/Or/Xor known bits using the LHS/RHS known bits it already acquired without recursing back into computeKnownBits. ... This replicates the known bits and constant creation code from the single use case for these instructions and adds it here. The computeKnownBits and constant creation code for other instructions is now in the default case of the opcode switch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300094 91177308-0d34-0410-b5e6-96231b3b80d8		2017-04-12 19:32:47 +00:00
..
Analysis	[LoopVectorizer, TTI] New method supportsEfficientVectorElementLoadStore()	2017-04-12 12:41:37 +00:00
AsmParser	[IR] Add AttributeSet to hide AttributeSetNode* again, NFC	2017-04-12 00:38:00 +00:00
Bitcode	[IR] Redesign the case iterator in SwitchInst to actually be an iterator	2017-04-12 07:27:28 +00:00
CodeGen	[SelectionDAG] Use APInt move assignment to avoid 2 memory allocations and copies when bit width is larger than 64-bits.	2017-04-12 18:39:27 +00:00
DebugInfo	[DWARF] Fix compiler warnings in DWARFContext.cpp, NFCi	2017-04-12 11:33:26 +00:00
Demangle
ExecutionEngine	[IR] Redesign the case iterator in SwitchInst to actually be an iterator	2017-04-12 07:27:28 +00:00
Fuzzer	[libFuzzer] fix type in signal name.	2017-04-11 18:20:05 +00:00
IR	[IR] Redesign the case iterator in SwitchInst to actually be an iterator	2017-04-12 07:27:28 +00:00
IRReader
LibDriver
LineEditor
Linker
LTO
MC	MC: Remove unused virtual function MCObjectWriter::isWeak. NFC.	2017-04-08 23:35:49 +00:00
Object	Remove unused functions. Remove static qualifier from functions in header files. NFC.	2017-04-11 14:55:32 +00:00
ObjectYAML
Option
Passes	MemorySSA: Move to Analysis, from Transforms/Utils. It's used as	2017-04-11 20:06:36 +00:00
ProfileData	[PGO] Memory intrinsic calls optimization based on profiled size	2017-04-04 16:42:20 +00:00
Support	Fix detection of backtrace() availability on FreeBSD	2017-04-12 13:51:00 +00:00
TableGen
Target	[AMDGPU][MC] Added support for several VI-specific opcodes (s_wakeup, etc)	2017-04-12 17:10:07 +00:00
Transforms	[InstCombine] Teach SimplifyMultipleUseDemandedBits to handle And/Or/Xor known bits using the LHS/RHS known bits it already acquired without recursing back into computeKnownBits.	2017-04-12 19:32:47 +00:00
XRay	[XRay] - Fix spelling error to test commit access.	2017-04-06 03:32:01 +00:00
CMakeLists.txt
LLVMBuild.txt