mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-03 01:12:59 +00:00
ed541fe200
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250407 91177308-0d34-0410-b5e6-96231b3b80d8
24 lines
586 B
LLVM
24 lines
586 B
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
|
|
|
|
@iiii = global i32 103, align 4
|
|
@jjjj = global i32 4, align 4
|
|
@kkkk = common global i32 0, align 4
|
|
@llll = common global i32 0, align 4
|
|
|
|
|
|
define void @test() nounwind {
|
|
entry:
|
|
%0 = load i32, i32* @iiii, align 4
|
|
%1 = load i32, i32* @jjjj, align 4
|
|
%div = udiv i32 %0, %1
|
|
store i32 %div, i32* @kkkk, align 4
|
|
%rem = urem i32 %0, %1
|
|
; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
|
|
; 16: mflo ${{[0-9]+}}
|
|
; 16: mfhi ${{[0-9]+}}
|
|
store i32 %rem, i32* @llll, align 4
|
|
ret void
|
|
}
|
|
|
|
|