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The 32-bit variants of the NEON scalar<->GPR move instructions are also available in VFPv2. The 8- and 16-bit variants do require NEON. Note that the checks in the test file are all -DAG because they are checking a mixture of stdout and stderr, and the ordering is not guaranteed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220288 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
1.4 KiB
ArmAsm
33 lines
1.4 KiB
ArmAsm
@ RUN: not llvm-mc -mcpu=cortex-a8 -triple armv7-unknown-unknown -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=VFP --check-prefix=CHECK
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@ RUN: not llvm-mc -mcpu=cortex-a8 -triple thumbv7-unknown-unknown -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=VFP --check-prefix=CHECK
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-unknown-unknown -show-encoding -mattr=+neon < %s 2>&1 | FileCheck %s --check-prefix=NEON --check-prefix=CHECK
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@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumbv7-unknown-unknown -show-encoding -mattr=+neon < %s 2>&1 | FileCheck %s --check-prefix=NEON --check-prefix=CHECK
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@ The 32-bit variants of the NEON scalar move instructions are also available
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@ to any core with VFPv2
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@ CHECK-DAG: vmov.32 d13[0], r6 @ encoding:
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@ CHECK-DAG: vmov.32 d17[1], r9 @ encoding:
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vmov.32 d13[0], r6
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vmov.32 d17[1], r9
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@ VFP-DAG: error: instruction requires: NEON
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@ VFP-DAG: error: instruction requires: NEON
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@ NEON-DAG: vmov.8 d22[5], r2 @ encoding:
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@ NEON-DAG: vmov.16 d3[2], r4 @ encoding:
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vmov.8 d22[5], r2
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vmov.16 d3[2], r4
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@ CHECK-DAG: vmov.32 r6, d13[0] @ encoding:
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@ CHECK-DAG: vmov.32 r9, d17[1] @ encoding:
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vmov.32 r6, d13[0]
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vmov.32 r9, d17[1]
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@ VFP-DAG: error: instruction requires: NEON
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@ VFP-DAG: error: instruction requires: NEON
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@ NEON-DAG: vmov.s8 r2, d22[5] @ encoding:
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@ NEON-DAG: vmov.u16 r4, d3[2] @ encoding:
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vmov.s8 r2, d22[5]
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vmov.u16 r4, d3[2]
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