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https://github.com/RPCSX/llvm.git
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5366649040
This is what the instruction-set actually provides, and the default expansions of the others into the lohi opcodes are good. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283381 91177308-0d34-0410-b5e6-96231b3b80d8
98 lines
2.0 KiB
LLVM
98 lines
2.0 KiB
LLVM
; RUN: llc < %s -march=sparc | FileCheck %s
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define i32 @test0(i32 %X) {
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%tmp.1 = add i32 %X, 1
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ret i32 %tmp.1
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; CHECK-LABEL: test0:
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; CHECK: add %o0, 1, %o0
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}
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;; xnor tests.
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define i32 @test1(i32 %X, i32 %Y) {
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%A = xor i32 %X, %Y
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%B = xor i32 %A, -1
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ret i32 %B
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; CHECK-LABEL: test1:
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; CHECK: xnor %o0, %o1, %o0
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}
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define i32 @test2(i32 %X, i32 %Y) {
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%A = xor i32 %X, -1
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%B = xor i32 %A, %Y
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ret i32 %B
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; CHECK-LABEL: test2:
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; CHECK: xnor %o0, %o1, %o0
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}
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; CHECK-LABEL: store_zero:
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; CHECK: st %g0, [%o0]
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; CHECK: st %g0, [%o1+4]
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define i32 @store_zero(i32* %a, i32* %b) {
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entry:
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store i32 0, i32* %a, align 4
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%0 = getelementptr inbounds i32, i32* %b, i32 1
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store i32 0, i32* %0, align 4
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ret i32 0
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}
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; CHECK-LABEL: signed_divide:
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; CHECK: sra %o0, 31, %o2
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; CHECK: wr %g0, %o2, %y
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; CHECK: sdiv %o0, %o1, %o0
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define i32 @signed_divide(i32 %a, i32 %b) {
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%r = sdiv i32 %a, %b
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ret i32 %r
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}
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; CHECK-LABEL: unsigned_divide:
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; CHECK: wr %g0, %g0, %y
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; CHECK: udiv %o0, %o1, %o0
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define i32 @unsigned_divide(i32 %a, i32 %b) {
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%r = udiv i32 %a, %b
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ret i32 %r
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}
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; CHECK-LABEL: multiply_32x32:
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; CHECK: smul %o0, %o1, %o0
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define i32 @multiply_32x32(i32 %a, i32 %b) {
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%r = mul i32 %a, %b
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ret i32 %r
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}
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; CHECK-LABEL: signed_multiply_32x32_64:
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; CHECK: smul %o0, %o1, %o1
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; CHECK: rd %y, %o0
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define i64 @signed_multiply_32x32_64(i32 %a, i32 %b) {
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%xa = sext i32 %a to i64
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%xb = sext i32 %b to i64
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%r = mul i64 %xa, %xb
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ret i64 %r
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}
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; CHECK-LABEL: unsigned_multiply_32x32_64:
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; CHECK: umul %o0, %o1, %o1
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; CHECK: rd %y, %o0
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; CHECK: retl
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; CHECK: nop
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define i64 @unsigned_multiply_32x32_64(i32 %a, i32 %b) {
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%xa = zext i32 %a to i64
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%xb = zext i32 %b to i64
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%r = mul i64 %xa, %xb
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ret i64 %r
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}
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; CHECK-LABEL: load_store_64bit:
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; CHECK: ldd [%o0], %o2
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; CHECK: addcc %o3, 3, %o5
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; CHECK: addxcc %o2, 0, %o4
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; CHECK: retl
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; CHECK: std %o4, [%o1]
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define void @load_store_64bit(i64* %x, i64* %y) {
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entry:
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%0 = load i64, i64* %x
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%add = add nsw i64 %0, 3
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store i64 %add, i64* %y
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ret void
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}
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