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llvm/lib/Target/AMDGPU
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David Stuttard 9066575ebe [AMDGPU] Add intrinsics for tbuffer load and store - build error fix 
Variable was unused in non-debug build (used in assert) causing compile time
warning and eventual build failure

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306034 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 17:15:49 +00:00
..
AsmParser [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
Disassembler [AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix disassembler failures 2017-06-21 16:00:54 +00:00
InstPrinter [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
MCTargetDesc Use a MutableArrayRef. NFC. 2017-06-21 23:06:53 +00:00
TargetInfo
Utils [AMDGPU][MC] Corrected V_*QSAD* instructions to check that dest register is different than any of the src 2017-06-21 14:41:34 +00:00
AMDGPU.h AMDGPU: Register AMDGPUAlwaysInline 2017-06-02 18:02:42 +00:00
AMDGPU.td [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
AMDGPUAliasAnalysis.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUAliasAnalysis.h
AMDGPUAlwaysInlinePass.cpp [AMDGPU] Testing commit access only, no real change 2017-06-15 23:02:55 +00:00
AMDGPUAnnotateKernelFeatures.cpp
AMDGPUAnnotateUniformValues.cpp DivergencyAnalysis patch for review 2017-06-15 19:33:10 +00:00
AMDGPUAsmPrinter.cpp Move Object format code to lib/BinaryFormat. 2017-06-07 03:48:56 +00:00
AMDGPUAsmPrinter.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUCallingConv.td
AMDGPUCallLowering.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUCallLowering.h
AMDGPUCodeGenPrepare.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUGenRegisterBankInfo.def
AMDGPUInstrInfo.cpp [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
AMDGPUInstrInfo.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUInstrInfo.td [AMDGPU] simplify add x, *ext (setcc) => addc|subb x, 0, setcc 2017-06-21 22:05:06 +00:00
AMDGPUInstructions.td
AMDGPUInstructionSelector.cpp AMDGPU: Start adding offset fields to flat instructions 2017-06-12 15:55:58 +00:00
AMDGPUInstructionSelector.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp AMDGPU: Start selecting flat instruction offsets 2017-06-12 16:53:51 +00:00
AMDGPUISelLowering.cpp [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
AMDGPUISelLowering.h [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
AMDGPULegalizerInfo.cpp AMDGPU/GlobalISel: Mark G_BITCAST s32 <--> <2 x s16> legal 2017-06-19 13:15:45 +00:00
AMDGPULegalizerInfo.h
AMDGPULowerIntrinsics.cpp
AMDGPUMachineCFGStructurizer.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUMCInstLower.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPUMCInstLower.h
AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPUPromoteAlloca.cpp [AMDGPU] Fix for issue in alloca to vector promotion pass 2017-06-09 14:16:22 +00:00
AMDGPUPTNote.h
AMDGPURegAsmNames.inc.cpp AMDGPU: Work around build special casing .inc files 2017-06-08 19:25:21 +00:00
AMDGPURegisterBankInfo.cpp
AMDGPURegisterBankInfo.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPURegisterBanks.td
AMDGPURegisterInfo.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
AMDGPUSubtarget.h [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
AMDGPUTargetMachine.cpp [AMDGPU] Add infer address spaces pass before SROA 2017-06-19 23:17:36 +00:00
AMDGPUTargetMachine.h TargetMachine: Indicate whether machine verifier passes. 2017-05-31 18:41:23 +00:00
AMDGPUTargetObjectFile.cpp Move Object format code to lib/BinaryFormat. 2017-06-07 03:48:56 +00:00
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp AMDGPU: Allow vectorization of packed types 2017-06-20 20:38:06 +00:00
AMDGPUTargetTransformInfo.h AMDGPU: Allow vectorization of packed types 2017-06-20 20:38:06 +00:00
AMDGPUUnifyDivergentExitNodes.cpp
AMDGPUUnifyMetadata.cpp
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h
BUFInstructions.td [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
CaymanInstructions.td
CIInstructions.td
CMakeLists.txt AMDGPU: Work around build special casing .inc files 2017-06-08 19:25:21 +00:00
DSInstructions.td [AMDGPU][MC] New syntax for ds_swizzle_b32 offset 2017-05-31 16:26:47 +00:00
EvergreenInstructions.td
FLATInstructions.td AMDGPU: Start adding global_* instructions 2017-06-20 19:54:14 +00:00
GCNHazardRecognizer.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
GCNHazardRecognizer.h
GCNIterativeScheduler.cpp Make helper functions static. NFC. 2017-05-26 20:09:00 +00:00
GCNIterativeScheduler.h
GCNMinRegStrategy.cpp Make helper functions static. NFC. 2017-05-26 20:09:00 +00:00
GCNRegPressure.cpp Make helper functions static. NFC. 2017-05-26 20:09:00 +00:00
GCNRegPressure.h [AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker 2017-05-22 13:09:40 +00:00
GCNSchedStrategy.cpp
GCNSchedStrategy.h
LLVMBuild.txt
MIMGInstructions.td
Processors.td AMDGPU : Fix ISA Version Definitions. 2017-06-10 03:53:19 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600ExpandSpecialInstrs.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600FrameLowering.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600FrameLowering.h
R600InstrFormats.td
R600InstrInfo.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600InstrInfo.h
R600Instructions.td
R600Intrinsics.td
R600ISelLowering.cpp AMDGPU: Cleanup CreateLiveInRegister 2017-06-19 21:52:45 +00:00
R600ISelLowering.h [AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI. 2017-05-24 15:59:09 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td [AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045) 2017-05-23 21:27:15 +00:00
R600Schedule.td
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDebuggerInsertNops.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SIDefines.h [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
SIFixControlFlowLiveIntervals.cpp
SIFixSGPRCopies.cpp [AMDGPU] Eliminate SGPR to VGPR copy when possible 2017-06-20 18:32:42 +00:00
SIFixVGPRCopies.cpp
SIFoldOperands.cpp AMDGPU: Do operand folding in program order 2017-06-20 18:56:32 +00:00
SIFrameLowering.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SIFrameLowering.h
SIInsertSkips.cpp
SIInsertWaitcnts.cpp [AMDGPU] Fix uninit'ed var (RevisitLoop) 2017-06-05 19:29:01 +00:00
SIInsertWaits.cpp AMDGPU: Make auto waitcnt before barrier a feature 2017-06-02 17:40:26 +00:00
SIInstrFormats.td
SIInstrInfo.cpp [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
SIInstrInfo.h [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
SIInstrInfo.td [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
SIInstructions.td
SIIntrinsics.td
SIISelLowering.cpp [AMDGPU] Add intrinsics for tbuffer load and store - build error fix 2017-06-22 17:15:49 +00:00
SIISelLowering.h [AMDGPU] Combine add and adde, sub and sube 2017-06-21 22:30:01 +00:00
SILoadStoreOptimizer.cpp
SILowerControlFlow.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SILowerI1Copies.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SIMachineScheduler.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SIMachineScheduler.h
SIOptimizeExecMasking.cpp
SIPeepholeSDWA.cpp [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
SIRegisterInfo.cpp AMDGPU: Fix scratch wave offset relative FI expansion 2017-06-19 23:47:21 +00:00
SIRegisterInfo.h AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
SIRegisterInfo.td
SISchedule.td
SIShrinkInstructions.cpp [AMDGPU] Fix illegal shrink of V_SUBB_U32 and V_ADDC_U32 2017-06-20 20:33:44 +00:00
SITypeRewriter.cpp
SIWholeQuadMode.cpp
SMInstructions.td AMDGPUAnnotateUniformValue should always treat volatile loads as divergent 2017-06-02 15:25:52 +00:00
SOPInstructions.td Resubmit r303859 with test fixed. 2017-05-26 20:38:26 +00:00
VIInstrFormats.td
VIInstructions.td
VOP1Instructions.td [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
VOP2Instructions.td [AMDGPU] SDWA: remove support for VOP2 instructions that have only 64-bit encoding 2017-06-22 12:42:14 +00:00
VOP3Instructions.td [AMDGPU] Add intrinsics for alignbit and alignbyte instructions 2017-06-09 19:03:00 +00:00
VOP3PInstructions.td
VOPCInstructions.td [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions 2017-06-21 08:53:38 +00:00
VOPInstructions.td [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00