llvm/lib/Target/CellSPU
Torok Edwin dac237e182 Implement changes from Chris's feedback.
Finish converting lib/Target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:53:28 +00:00
..
AsmPrinter Implement changes from Chris's feedback. 2009-07-08 20:53:28 +00:00
CellSDKIntrinsics.td
CMakeLists.txt CMake build fixes, from Xerxes Ranby 2009-07-02 18:53:52 +00:00
Makefile Removed trailing whitespace from Makefiles. 2009-01-09 16:44:42 +00:00
README.txt CellSPU: 2009-01-21 04:58:48 +00:00
SPU64InstrInfo.td CellSPU: 2009-01-26 03:31:40 +00:00
SPU128InstrInfo.td CellSPU: 2009-01-21 04:58:48 +00:00
SPU.h Remove unused AsmPrinter OptLevel argument, and propogate. 2009-07-01 01:48:54 +00:00
SPU.td - Start moving target-dependent nodes that could be represented by an 2008-12-30 23:28:25 +00:00
SPUCallingConv.td CellSPU: 2009-01-06 23:10:38 +00:00
SPUFrameInfo.cpp
SPUFrameInfo.h
SPUHazardRecognizers.cpp Generalize the HazardRecognizer interface so that it can be used 2009-01-15 22:18:12 +00:00
SPUHazardRecognizers.h Generalize the HazardRecognizer interface so that it can be used 2009-01-15 22:18:12 +00:00
SPUInstrBuilder.h Fix constant pool loads, and remove broken versions of addConstantPoolReference. 2008-09-06 01:11:01 +00:00
SPUInstrFormats.td CellSPU: 2009-01-26 22:33:37 +00:00
SPUInstrInfo.cpp Implement changes from Chris's feedback. 2009-07-08 20:53:28 +00:00
SPUInstrInfo.h Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty 2009-02-09 07:14:22 +00:00
SPUInstrInfo.td CellSPU: 2009-03-17 16:45:16 +00:00
SPUISelDAGToDAG.cpp Implement changes from Chris's feedback. 2009-07-08 20:53:28 +00:00
SPUISelLowering.cpp Implement changes from Chris's feedback. 2009-07-08 20:53:28 +00:00
SPUISelLowering.h Small cleanups in the PowerPC backend. 2009-07-03 06:43:35 +00:00
SPUMachineFunction.h
SPUMathInstr.td Untabify code. 2009-01-26 03:37:41 +00:00
SPUNodes.td - Convert remaining i64 custom lowering into custom instruction emission 2009-01-15 04:41:47 +00:00
SPUOperands.td - Remove Tilmann's custom truncate lowering: it completely hosed over 2008-12-27 04:51:36 +00:00
SPURegisterInfo.cpp Implement changes from Chris's feedback. 2009-07-08 20:53:28 +00:00
SPURegisterInfo.h Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. 2009-02-06 17:43:24 +00:00
SPURegisterInfo.td CellSPU: 2009-01-06 23:10:38 +00:00
SPURegisterNames.h
SPUSchedule.td
SPUSubtarget.cpp
SPUSubtarget.h Propagate CPU string out of SubtargetFeatures 2009-05-23 19:50:50 +00:00
SPUTargetAsmInfo.cpp simplify macro debug info directive handling. 2009-06-18 23:31:37 +00:00
SPUTargetAsmInfo.h Teach CellSPU about ELF sections and new section emitter classes. 2008-11-07 04:36:25 +00:00
SPUTargetMachine.cpp Remove unused AsmPrinter OptLevel argument, and propogate. 2009-07-01 01:48:54 +00:00
SPUTargetMachine.h Remove unused AsmPrinter OptLevel argument, and propogate. 2009-07-01 01:48:54 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)
- Nehal Desai (debugging, i32 operations, RoadRunner SPU expertise)

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE.

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

TODO:
* Create a machine pass for performing dual-pipeline scheduling specifically
  for CellSPU, and insert branch prediction instructions as needed.

* i32 instructions:

  * i32 division (work-in-progress)

* i64 support (see i64operations.c test harness):

  * shifts and comparison operators: done
  * sign and zero extension: done
  * addition: done
  * subtraction: needed
  * multiplication: done

* i128 support:

  * zero extension, any extension: done
  * sign extension: needed
  * arithmetic operators (add, sub, mul, div): needed
  * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed

    * or: done

* f64 support

  * Comparison operators:
    SETOEQ              unimplemented
    SETOGT              unimplemented
    SETOGE              unimplemented
    SETOLT              unimplemented
    SETOLE              unimplemented
    SETONE              unimplemented
    SETO                done (lowered)
    SETUO               done (lowered)
    SETUEQ              unimplemented
    SETUGT              unimplemented
    SETUGE              unimplemented
    SETULT              unimplemented
    SETULE              unimplemented
    SETUNE              unimplemented

* LLVM vector suport

  * VSETCC needs to be implemented. It's pretty straightforward to code, but
    needs implementation.

* Intrinsics

  * spu.h instrinsics added but not tested. Need to have an operational
    llvm-spu-gcc in order to write a unit test harness.

===-------------------------------------------------------------------------===