llvm/test/CodeGen
Oliver Stannard 2358986dd4 [AArch64] Fix halfword load merging for big-endian targets
For big-endian targets, when we merge two halfword loads into a word load, the
order of the halfwords in the loaded value is reversed compared to
little-endian, so the load-store optimiser needs to swap the destination
registers.

This does not affect merging of two word loads, as we use ldp, which treats the
memory as two separate 32-bit words.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252597 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-10 11:04:18 +00:00
..
AArch64 [AArch64] Fix halfword load merging for big-endian targets 2015-11-10 11:04:18 +00:00
AMDGPU DAGCombiner: Check shouldReduceLoadWidth before combining (and (load), x) -> extload 2015-11-06 21:58:37 +00:00
ARM [EABI] Add LLVM support for -meabi flag 2015-11-09 12:40:30 +00:00
BPF [bpf] Do not expand UNDEF SDNode during insn selection lowering 2015-10-08 18:52:40 +00:00
CPP Fix CPP Backend for GEP API changes for opaque pointer types 2015-09-08 18:42:29 +00:00
Generic Revert "[ARM] Remove XFAIL on test/CodeGen/Generic/MachineBranchProb.ll" 2015-10-29 22:34:59 +00:00
Hexagon [Hexagon] Fixing compound register printing and reenabling more tests. 2015-11-10 00:51:56 +00:00
Inputs DI: Reverse direction of subprogram -> function edge. 2015-11-05 22:03:56 +00:00
Mips [mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes. 2015-11-06 12:07:20 +00:00
MIR MachineVerifier: Add missing linebreak 2015-11-09 23:59:29 +00:00
MSP430
NVPTX [NVPTX] Let NVPTX backend detect integer min and max patterns. 2015-08-26 23:22:02 +00:00
PowerPC [PowerPC] Fix LoopPreIncPrep not to depend on SCEV constant simplifications 2015-11-08 08:04:40 +00:00
SPARC Drop assert that a call with struct return goes to a function with sret 2015-10-21 20:05:01 +00:00
SystemZ [SystemZ] Make the CCRegs regclass non-allocatable. 2015-10-29 16:13:55 +00:00
Thumb [ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM. 2015-10-05 14:49:54 +00:00
Thumb2 [ARM] Handle t2ADDri in ARMAsmPrinter::EmitUnwindingInstruction. 2015-11-10 00:10:41 +00:00
WebAssembly [WebAssembly] Support 'unreachable' expression 2015-11-10 00:30:57 +00:00
WinEH [WinEH] Re-committing r252249 (Clone funclets with multiple parents) with additional fixes for determinism problems 2015-11-09 19:59:02 +00:00
X86 AVX512 : Implemented encoding and DAG lowering for VMOVHPS/PD and VMOVLPS/PD instructions. 2015-11-10 07:09:07 +00:00
XCore DI: Reverse direction of subprogram -> function edge. 2015-11-05 22:03:56 +00:00