Matt Arsenault b1e16f2d3a AMDGPU: Fix missing 16-bit cmpx instructions ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290349 91177308-0d34-0410-b5e6-96231b3b80d8

2016-12-22 16:27:14 +00:00

..

AArch64

[Assembler] Better error messages for .org directive

2016-12-14 10:43:58 +00:00

AMDGPU

AMDGPU: Fix missing 16-bit cmpx instructions

2016-12-22 16:27:14 +00:00

ARM

[Assembler] Better error messages for .org directive

2016-12-14 10:43:58 +00:00

AsmParser

[Assembler] Better error messages for .org directive

2016-12-14 10:43:58 +00:00

AVR

[AVR] Add all of the machine code test suite

2016-11-09 23:46:25 +00:00

COFF

Emit S_COMPILE3 record once per TU rather than once per function

2016-11-02 21:30:35 +00:00

Disassembler

[AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwa

2016-12-22 11:30:48 +00:00

ELF

Speculatively revert r289925, see PR31407

2016-12-16 14:02:28 +00:00

Hexagon

[Hexagon] Fix disassembler crash after r279255

2016-09-09 21:45:00 +00:00

Lanai

[lanai] Add more tests for assembly of conditional ALU ops

2016-07-11 17:58:16 +00:00

MachO

Speculatively revert r289925, see PR31407

2016-12-16 14:02:28 +00:00

Markup

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Mips

[mips] For PIC code convert unconditional jump to unconditional branch

2016-12-12 17:40:26 +00:00

PowerPC

[PPC] Slightly Improve Assembly Parsing errors and add EOL comment

2016-12-05 14:11:03 +00:00

Sparc

Don't pass a Reloc::Model to MC.

2016-05-18 11:58:50 +00:00

SystemZ

[SystemZ] Support remaining atomic instructions

2016-12-02 18:24:16 +00:00

X86

[X86][AVX2] Passing the appropriate memory operand class to VPMADDWD instruction.

2016-12-22 08:42:46 +00:00