llvm/test/CodeGen
Nemanja Ivanovic 3726719543 [PowerPC] Add vector conversion builtins to altivec.h - LLVM portion
This patch corresponds to review:
https://reviews.llvm.org/D26307

Adds all the intrinsics used for various conversion builtins that will
be added to altivec.h. These are type conversions between various types of
vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286596 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-11 14:41:19 +00:00
..
AArch64 [AArch64] Enable merging of adjacent zero stores for all subtargets. 2016-11-11 14:10:12 +00:00
AMDGPU ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps() 2016-11-11 01:34:21 +00:00
ARM [ARM] Add plumbing for GlobalISel 2016-11-11 08:27:37 +00:00
AVR [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
BPF
Generic
Hexagon [Hexagon] Separate Hexagon subreg indices for different register classes 2016-11-09 16:19:08 +00:00
Inputs
Lanai
Mips
MIR
MSP430 Fix PR27500: on MSP430 the branch destination offset is measured in words, not bytes. 2016-11-08 17:19:59 +00:00
NVPTX
PowerPC [PowerPC] Add vector conversion builtins to altivec.h - LLVM portion 2016-11-11 14:41:19 +00:00
SPARC ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps() 2016-11-11 01:34:21 +00:00
SystemZ [SystemZ] Support CL(G)T instructions 2016-11-11 12:48:26 +00:00
Thumb
Thumb2
WebAssembly [WebAssembly] Convert stackified IMPLICIT_DEF into constant 0. 2016-11-08 19:40:38 +00:00
WinEH
X86 [SelectionDAG] Add support for vector demandedelts in BSWAP opcodes 2016-11-11 11:51:29 +00:00
XCore