RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-11-29 22:50:47 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
e840e88239
llvm/test/CodeGen
History
Rafael Espindola e840e88239 This commit introduces two fake instructions MORESTACK_RET and 
MORESTACK_RET_RESTORE_R10; which are lowered to a RET and a RET
followed by a MOV respectively.  Having a fake instruction prevents
the verifier from seeing a MachineBasicBlock end with a
non-terminator (MOV).  It also prevents the rather eccentric case of a
MachineBasicBlock ending with RET but having successors nevertheless.

Patch by Sanjoy Das.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26 21:12:27 +00:00
..
Alpha Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
ARM Make sure short memsets on ARM lower to stores, even when optimizing for size. 2011-10-26 20:56:52 +00:00
CBackend Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported 2011-09-26 06:44:27 +00:00
CellSPU Enable element promotion type legalization by deafault. 2011-10-16 20:31:33 +00:00
CPP manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
Generic Remove the the test which checks the saving of a vector of booleans into memory. 2011-10-16 19:06:06 +00:00
MBlaze Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
Mips Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
MSP430 Remove the explicit request for "Latency" scheduling from MSP430, 2011-10-24 17:53:16 +00:00
PowerPC Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
PTX Change the default scheduler from Latency to ILP, since Latency 2011-10-24 17:45:02 +00:00
SPARC make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
Thumb Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo... 2011-10-11 21:40:47 +00:00
Thumb2 ARM Darwin default relocation model is PIC. 2011-09-30 17:41:35 +00:00
X86 This commit introduces two fake instructions MORESTACK_RET and 2011-10-26 21:12:27 +00:00
XCore Associate a MemOperand with LDWCP nodes introduced during ISel. 2011-09-12 14:43:23 +00:00