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ed541fe200
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250407 91177308-0d34-0410-b5e6-96231b3b80d8
70 lines
2.5 KiB
LLVM
70 lines
2.5 KiB
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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define i32 @sumc(i8* nocapture %to, i8* nocapture %from, i32) nounwind {
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entry:
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%sext = shl i32 %0, 16
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%conv = ashr exact i32 %sext, 16
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%cmp8 = icmp eq i32 %conv, 0
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br i1 %cmp8, label %for.end, label %for.body.lr.ph
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for.body.lr.ph: ; preds = %entry
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%.pre = load i8, i8* %to, align 1
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br label %for.body
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for.body: ; preds = %for.body.lr.ph, %for.body
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%1 = phi i8 [ %.pre, %for.body.lr.ph ], [ %conv4, %for.body ]
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%i.010 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
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%from.addr.09 = phi i8* [ %from, %for.body.lr.ph ], [ %incdec.ptr, %for.body ]
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%incdec.ptr = getelementptr inbounds i8, i8* %from.addr.09, i32 1
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%2 = load i8, i8* %from.addr.09, align 1
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%conv27 = zext i8 %2 to i32
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%conv36 = zext i8 %1 to i32
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%add = add nsw i32 %conv36, %conv27
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%conv4 = trunc i32 %add to i8
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store i8 %conv4, i8* %to, align 1
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%inc = add nsw i32 %i.010, 1
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%cmp = icmp eq i32 %inc, %conv
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br i1 %cmp, label %for.end, label %for.body
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; 16-LABEL: sumc:
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; 16: lbu ${{[0-9]+}}, 0(${{[0-9]+}})
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; 16: lbu ${{[0-9]+}}, 0(${{[0-9]+}})
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; 16-LABEL: sum:
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; 16: lhu ${{[0-9]+}}, 0(${{[0-9]+}})
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; 16: lhu ${{[0-9]+}}, 0(${{[0-9]+}})
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for.end: ; preds = %for.body, %entry
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ret i32 undef
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}
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define i32 @sum(i16* nocapture %to, i16* nocapture %from, i32) nounwind {
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entry:
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%sext = shl i32 %0, 16
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%conv = ashr exact i32 %sext, 16
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%cmp8 = icmp eq i32 %conv, 0
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br i1 %cmp8, label %for.end, label %for.body.lr.ph
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for.body.lr.ph: ; preds = %entry
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%.pre = load i16, i16* %to, align 2
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br label %for.body
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for.body: ; preds = %for.body.lr.ph, %for.body
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%1 = phi i16 [ %.pre, %for.body.lr.ph ], [ %conv4, %for.body ]
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%i.010 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
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%from.addr.09 = phi i16* [ %from, %for.body.lr.ph ], [ %incdec.ptr, %for.body ]
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%incdec.ptr = getelementptr inbounds i16, i16* %from.addr.09, i32 1
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%2 = load i16, i16* %from.addr.09, align 2
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%conv27 = zext i16 %2 to i32
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%conv36 = zext i16 %1 to i32
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%add = add nsw i32 %conv36, %conv27
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%conv4 = trunc i32 %add to i16
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store i16 %conv4, i16* %to, align 2
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%inc = add nsw i32 %i.010, 1
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%cmp = icmp eq i32 %inc, %conv
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br i1 %cmp, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret i32 undef
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}
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