llvm/include
Daniel Sanders ec48fd1277 [globalisel][tablegen] Correct matching of intrinsic ID's.
TreePatternNode considers them to be plain integers but MachineInstr considers
them to be a distinct kind of operand.

The tweak to AArch64InstrInfo.td to produce a simple test case is a NFC for
everything except GlobalISelEmitter (confirmed by diffing the tablegenerated
files). GlobalISelEmitter is currently unable to infer the type of operands in
the Dst pattern from the operands in the Src pattern.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307634 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-11 08:57:29 +00:00
..
llvm [globalisel][tablegen] Correct matching of intrinsic ID's. 2017-07-11 08:57:29 +00:00
llvm-c [ORC] Errorize the ORC APIs. 2017-07-07 02:59:13 +00:00