Bill Schmidt 6cd04fdaae [PATCH] Fix PR17168 (DAG scheduler inserts DBG_VALUE before PHI with fast-isel) ... PR17168 describes a test case that fails when compiling for debug with fast-isel. Investigation showed that the test was failing because a DBG_VALUE machine instruction was placed prior to a PHI. For this problem to occur requires the following: * Compile for debug * Compile with fast-isel * In a block B, fast-isel must partially succeed before punting to DAG-isel * B must start with a PHI * The first unhandled node in the DAG must not generate a machine instruction * A debug value with an order less than that of that first node exists When all of these circumstances apply, the existing test that an instruction was not inserted won't fire. Currently it tests whether the block is empty, or whether the last instruction generated is a phi. When fast-isel has partially succeeded, the last instruction generated will not be a phi. Instead, we need to check whether the current insert position is immediately following a phi. This patch adds that check, and adds the test case from the PR as a regression test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192976 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-18 14:20:11 +00:00
..
CMakeLists.txt
DAGCombiner.cpp	Fix edge condition in DAGCombiner to improve codegen of shift sequences.	2013-10-17 11:02:58 +00:00
FastISel.cpp	Fix indenting.	2013-10-14 20:15:04 +00:00
FunctionLoweringInfo.cpp	Debug Info: clean up usage of Verify.	2013-06-28 05:43:10 +00:00
InstrEmitter.cpp	Reapply an improved version of r180816/180817.	2013-07-09 20:28:37 +00:00
InstrEmitter.h	Revert "Give internal classes hidden visibility."	2013-09-11 18:05:11 +00:00
LegalizeDAG.cpp	CodeGen: Emit a libcall if the target doesn't support 16-byte wide atomics	2013-10-18 08:03:43 +00:00
LegalizeFloatTypes.cpp	Add ExpandFloatOp_FCOPYSIGN to handle ppcf128-related expansions	2013-08-19 06:55:37 +00:00
LegalizeIntegerTypes.cpp	CodeGen: Emit a libcall if the target doesn't support 16-byte wide atomics	2013-10-18 08:03:43 +00:00
LegalizeTypes.cpp	Update makeLibCall to return both the call and the chain associated with the libcall instead of just the call. This allows us to specify libcalls that return void.	2013-08-13 17:54:56 +00:00
LegalizeTypes.h	[SelectionDAG] Teach the vector scalarizer about TRUNCATE.	2013-09-17 00:26:56 +00:00
LegalizeTypesGeneric.cpp	Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too."	2013-09-21 15:09:46 +00:00
LegalizeVectorOps.cpp	Remove pointless assertion after r190376	2013-09-12 01:07:49 +00:00
LegalizeVectorTypes.cpp	[SelectionDAG] Teach the vector scalarizer about TRUNCATE.	2013-09-17 00:26:56 +00:00
LLVMBuild.txt
Makefile
ResourcePriorityQueue.cpp	Rename variables for consistency.	2013-09-11 00:41:02 +00:00
ScheduleDAGFast.cpp	Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.	2013-07-14 04:42:23 +00:00
ScheduleDAGRRList.cpp	Fix spelling intruction -> instruction.	2013-09-28 11:46:15 +00:00
ScheduleDAGSDNodes.cpp	[PATCH] Fix PR17168 (DAG scheduler inserts DBG_VALUE before PHI with fast-isel)	2013-10-18 14:20:11 +00:00
ScheduleDAGSDNodes.h	Revert "Give internal classes hidden visibility."	2013-09-11 18:05:11 +00:00
ScheduleDAGVLIW.cpp	Move all of the header files which are involved in modelling the LLVM IR	2013-01-02 11:36:10 +00:00
SDNodeDbgValue.h	Revert "Give internal classes hidden visibility."	2013-09-11 18:05:11 +00:00
SelectionDAG.cpp	Remove several unused variables.	2013-10-01 13:32:03 +00:00
SelectionDAGBuilder.cpp	Revert patches to add case-range support for PR1255.	2013-09-09 19:14:35 +00:00
SelectionDAGBuilder.h	Revert "Give internal classes hidden visibility."	2013-09-11 18:05:11 +00:00
SelectionDAGDumper.cpp	Add ISD::FROUND for libm round()	2013-08-07 22:49:12 +00:00
SelectionDAGISel.cpp	Fix some assert messages to say the correct opcode name. Looks like one assert got copy and pasted to many places.	2013-10-06 22:38:19 +00:00
SelectionDAGPrinter.cpp	Move all of the header files which are involved in modelling the LLVM IR	2013-01-02 11:36:10 +00:00
TargetLowering.cpp	Replace sra with srl if a single sign bit is required	2013-10-17 11:16:57 +00:00
TargetSelectionDAGInfo.cpp