llvm/test/CodeGen
Reid Kleckner f319a2c3b3 Support segmented stacks on Win64
Identical to Win32 method except the GS segment register is used for TLS
instead of FS and pvArbitrary is at TEB offset 0x28 instead of 0x14.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205342 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:34:21 +00:00
..
AArch64 [AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS 2014-03-27 16:28:09 +00:00
ARM ARM: add cyclone CPU with ZeroCycleZeroing feature. 2014-04-01 13:22:02 +00:00
ARM64 ARM64: add intrinsic for pmull (p64 x p64 = p128) operations. 2014-04-01 12:22:37 +00:00
CPP Begin adding docs and IR-level support for the inalloca attribute 2013-12-19 02:14:12 +00:00
Generic CommandLine: Exit successfully for -version and -help 2014-02-28 19:08:01 +00:00
Hexagon Fix broken CHECK lines 2014-02-16 07:31:05 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips Fixed issue with microMIPS JAL instruction. 2014-03-31 14:00:10 +00:00
MSP430 Fix known typos 2014-01-24 17:20:08 +00:00
NVPTX Fix for PR19099 - NVPTX produces invalid symbol names. 2014-03-31 15:56:26 +00:00
PowerPC [PowerPC] Don't ever expand BUILD_VECTOR of v2i64 with shuffles 2014-03-31 17:48:16 +00:00
R600 Fix missing RUN line in test 2014-04-01 18:34:13 +00:00
SPARC Remove the linker_private and linker_private_weak linkages. 2014-03-13 23:18:37 +00:00
SystemZ [SystemZ] Add support for z196 float<->unsigned conversions 2014-03-21 10:56:30 +00:00
Thumb Add triples to try to fix the windows bots. 2014-02-13 16:49:47 +00:00
Thumb2 ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block 2014-02-26 11:27:28 +00:00
X86 Support segmented stacks on Win64 2014-04-01 18:34:21 +00:00
XCore [XCore] Add support for the "m" inline asm constraint. 2014-03-06 16:37:48 +00:00