llvm/test/CodeGen/Mips/global-pointer-reg.ll
Akira Hatanaka 4147e4d054 Make the following changes in MipsAsmPrinter.cpp:
- Remove code which lowers pseudo SETGP01.
- Fix LowerSETGP01. The first two of the three instructions that are emitted to
  initialize the global pointer register now use register $2.
- Stop emitting .cpload directive.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156689 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-12 00:48:43 +00:00

25 lines
640 B
LLVM

; DISABLED: llc < %s -march=mipsel -mips-fix-global-base-reg=false | FileCheck %s
; RUN: false
; XFAIL: *
@g0 = external global i32
@g1 = external global i32
@g2 = external global i32
define void @foo1() nounwind {
entry:
; CHECK-NOT: .cpload
; CHECK-NOT: .cprestore
; CHECK: lui $[[R0:[0-9]+]], %hi(_gp_disp)
; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp)
; CHECK: addu $[[GP:[0-9]+]], $[[R1]], $25
; CHECK: lw ${{[0-9]+}}, %call16(foo2)($[[GP]])
tail call void @foo2(i32* @g0) nounwind
tail call void @foo2(i32* @g1) nounwind
tail call void @foo2(i32* @g2) nounwind
ret void
}
declare void @foo2(i32*)