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f6045fe8c4
code, according to Anton (I'm not totally convinced, but we can always resurrect patches if we need to do so.) - Start moving CellSPU's tests to prefer FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79958 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
618 B
LLVM
21 lines
618 B
LLVM
; RUN: llvm-as -o - %s | llc -march=cellspu | FileCheck %s
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; ModuleID = 'loads.bc'
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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define <4 x float> @load_v4f32_1(<4 x float>* %a) nounwind readonly {
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entry:
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%tmp1 = load <4 x float>* %a
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ret <4 x float> %tmp1
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; CHECK: lqd $3, 0($3)
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}
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define <4 x float> @load_v4f32_2(<4 x float>* %a) nounwind readonly {
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entry:
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%arrayidx = getelementptr <4 x float>* %a, i32 1
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%tmp1 = load <4 x float>* %arrayidx
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ret <4 x float> %tmp1
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; CHECK: lqd $3, 16($3)
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}
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