llvm/test/MC/Mips/rotations32-bad.s
Zoran Jovanovic 96664db5ff [mips] Add tests for ROL and ROR macros expansion
Author: obucina


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253567 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-19 15:04:31 +00:00

32 lines
1.4 KiB
ArmAsm

# RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r3 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r5 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r6 -show-encoding 2> %t1
# RUN: FileCheck %s < %t1
.text
foo:
drol $4,$5
# CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
drol $4,$5,$6
# CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
drol $4,0
# CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
drol $4,$5,0
# CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
dror $4,$5
# CHECK: [[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
dror $4,$5,$6
# CHECK: [[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
dror $4,0
# CHECK: [[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled
dror $4,$5,0
# CHECK: [[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled