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69e68a5966
Due to an erratum in some versions of LEON, we must insert a NOP after any LD or LDF instruction to ensure the processor has time to load the value correctly before using it. This pass will implement that erratum fix. The code will have no effect for other Sparc, but non-LEON processors. Differential Review: http://reviews.llvm.org/D20353 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270417 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
1.0 KiB
LLVM
Executable File
43 lines
1.0 KiB
LLVM
Executable File
; RUN: llc %s -O0 -march=sparc -mcpu=ut699 -o - | FileCheck %s
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; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -mattr=+insertnopload -o - | FileCheck %s
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; CHECK-LABEL: ld_float_test
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; CHECK: ld [%o0+%lo(.LCPI0_0)], %f0
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; CHECK-NEXT: nop
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define float @ld_float_test() #0 {
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entry:
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%f = alloca float, align 4
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store float 0x3FF3C08320000000, float* %f, align 4
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%0 = load float, float* %f, align 4
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ret float %0
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}
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; CHECK-LABEL: ld_i32_test
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; CHECK: ld [%o0], %o0
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; CHECK-NEXT: nop
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define i32 @ld_i32_test(i32 *%p) {
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%res = load i32, i32* %p
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ret i32 %res
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}
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; CHECK-LABEL: ld_inlineasm_test_1
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; CHECK: ld [%o0], %o0
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; CHECK-NEXT: !NO_APP
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; CHECK-NEXT: nop
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define float @ld_inlineasm_test_1(float* %a) {
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entry:
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%res = tail call float asm sideeffect "ld [$1], $0", "=r,r"(float* %a)
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ret float %res
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}
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; CHECK-LABEL: ld_inlineasm_test_2
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; CHECK: ld [%o0], %o0
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; CHECK-NEXT: !NO_APP
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; CHECK-NEXT: nop
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define i32 @ld_inlineasm_test_2(i32* %a) {
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entry:
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%res = tail call i32 asm sideeffect "ld [$1], $0", "=r,r"(i32* %a)
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ret i32 %res
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} |