Artem Tamazov d94d7faf07 [AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware registers. ... Possibility to specify code of hardware register kept. Disassemble to symbolic name, if name is known. Tests updated/added. Differential Revision: http://reviews.llvm.org/D19335 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267724 91177308-0d34-0410-b5e6-96231b3b80d8		2016-04-27 15:17:03 +00:00
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AArch64
AMDGPU	[AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware registers.	2016-04-27 15:17:03 +00:00
ARM	[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.	2016-04-19 23:51:52 +00:00
Hexagon
Lanai	[lanai] Add Lanai backend.	2016-03-28 13:09:54 +00:00
Mips	[mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU instructions	2016-04-27 11:31:44 +00:00
PowerPC	[PowerPC] Basic support for P9 byte comparison and count trailing zero insns	2016-04-13 18:51:18 +00:00
Sparc	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
SystemZ	[SystemZ] Add SVC instruction	2016-04-11 14:35:39 +00:00
X86
XCore