mirror of
https://github.com/RPCSX/llvm.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
565 lines
14 KiB
Plaintext
565 lines
14 KiB
Plaintext
# RUN: llvm-mc --disassemble -triple arm64-apple-darwin < %s | FileCheck %s
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#-----------------------------------------------------------------------------
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# Indexed loads
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#-----------------------------------------------------------------------------
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0x85 0x14 0x40 0xb9
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0x64 0x00 0x40 0xf9
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0xe2 0x13 0x40 0xf9
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0xe5 0x07 0x40 0x3d
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0xe6 0x07 0x40 0x7d
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0xe7 0x07 0x40 0xbd
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0xe8 0x07 0x40 0xfd
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0xe9 0x07 0xc0 0x3d
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0x64 0x00 0x40 0x39
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0x20 0x78 0xa0 0xb8
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0x85 0x50 0x40 0x39
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# CHECK: ldr w5, [x4, #20]
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# CHECK: ldr x4, [x3]
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# CHECK: ldr x2, [sp, #32]
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# CHECK: ldr b5, [sp, #1]
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# CHECK: ldr h6, [sp, #2]
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# CHECK: ldr s7, [sp, #4]
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# CHECK: ldr d8, [sp, #8]
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# CHECK: ldr q9, [sp, #16]
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# CHECK: ldrb w4, [x3]
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# CHECK: ldrsw x0, [x1, x0, lsl #2]
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# CHECK: ldrb w5, [x4, #20]
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# CHECK: ldrsb w9, [x3]
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# CHECK: ldrsb x2, [sp, #128]
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# CHECK: ldrh w2, [sp, #32]
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# CHECK: ldrsh w3, [sp, #32]
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# CHECK: ldrsh x5, [x9, #24]
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# CHECK: ldrsw x9, [sp, #512]
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# CHECK: prfm pldl3strm, [sp, #32]
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0x69 0x00 0xc0 0x39
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0xe2 0x03 0x82 0x39
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0xe2 0x43 0x40 0x79
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0xe3 0x43 0xc0 0x79
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0x25 0x31 0x80 0x79
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0xe9 0x03 0x82 0xb9
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0xe5 0x13 0x80 0xf9
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0x40 0x00 0x80 0xf9
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0x41 0x00 0x80 0xf9
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0x42 0x00 0x80 0xf9
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0x43 0x00 0x80 0xf9
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0x44 0x00 0x80 0xf9
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0x45 0x00 0x80 0xf9
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0x50 0x00 0x80 0xf9
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0x51 0x00 0x80 0xf9
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0x52 0x00 0x80 0xf9
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0x53 0x00 0x80 0xf9
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0x54 0x00 0x80 0xf9
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0x55 0x00 0x80 0xf9
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# CHECK: prfm pldl1keep, [x2]
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# CHECK: prfm pldl1strm, [x2]
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# CHECK: prfm pldl2keep, [x2]
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# CHECK: prfm pldl2strm, [x2]
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# CHECK: prfm pldl3keep, [x2]
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# CHECK: prfm pldl3strm, [x2]
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# CHECK: prfm pstl1keep, [x2]
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# CHECK: prfm pstl1strm, [x2]
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# CHECK: prfm pstl2keep, [x2]
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# CHECK: prfm pstl2strm, [x2]
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# CHECK: prfm pstl3keep, [x2]
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# CHECK: prfm pstl3strm, [x2]
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#-----------------------------------------------------------------------------
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# Indexed stores
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#-----------------------------------------------------------------------------
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0x64 0x00 0x00 0xf9
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0xe2 0x13 0x00 0xf9
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0x85 0x14 0x00 0xb9
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0xe5 0x07 0x00 0x3d
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0xe6 0x07 0x00 0x7d
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0xe7 0x07 0x00 0xbd
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0xe8 0x07 0x00 0xfd
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0xe9 0x07 0x80 0x3d
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0x64 0x00 0x00 0x39
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0x85 0x50 0x00 0x39
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0xe2 0x43 0x00 0x79
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0x00 0xe8 0x20 0x38
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0x00 0x48 0x20 0x38
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# CHECK: str x4, [x3]
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# CHECK: str x2, [sp, #32]
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# CHECK: str w5, [x4, #20]
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# CHECK: str b5, [sp, #1]
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# CHECK: str h6, [sp, #2]
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# CHECK: str s7, [sp, #4]
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# CHECK: str d8, [sp, #8]
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# CHECK: str q9, [sp, #16]
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# CHECK: strb w4, [x3]
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# CHECK: strb w5, [x4, #20]
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# CHECK: strh w2, [sp, #32]
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# CHECK: strb w0, [x0, x0, sxtx]
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# CHECK: strb w0, [x0, w0, uxtw]
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#-----------------------------------------------------------------------------
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# Unscaled immediate loads and stores
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#-----------------------------------------------------------------------------
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0x62 0x00 0x40 0xb8
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0xe2 0x83 0x41 0xb8
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0x62 0x00 0x40 0xf8
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0xe2 0x83 0x41 0xf8
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0xe5 0x13 0x40 0x3c
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0xe6 0x23 0x40 0x7c
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0xe7 0x43 0x40 0xbc
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0xe8 0x83 0x40 0xfc
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0xe9 0x03 0xc1 0x3c
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0x69 0x00 0xc0 0x38
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0xe2 0x03 0x88 0x38
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0xe3 0x03 0xc2 0x78
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0x25 0x81 0x81 0x78
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0xe9 0x03 0x98 0xb8
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# CHECK: ldur w2, [x3]
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# CHECK: ldur w2, [sp, #24]
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# CHECK: ldur x2, [x3]
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# CHECK: ldur x2, [sp, #24]
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# CHECK: ldur b5, [sp, #1]
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# CHECK: ldur h6, [sp, #2]
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# CHECK: ldur s7, [sp, #4]
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# CHECK: ldur d8, [sp, #8]
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# CHECK: ldur q9, [sp, #16]
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# CHECK: ldursb w9, [x3]
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# CHECK: ldursb x2, [sp, #128]
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# CHECK: ldursh w3, [sp, #32]
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# CHECK: ldursh x5, [x9, #24]
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# CHECK: ldursw x9, [sp, #-128]
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0x64 0x00 0x00 0xb8
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0xe2 0x03 0x02 0xb8
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0x64 0x00 0x00 0xf8
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0xe2 0x03 0x02 0xf8
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0x85 0x40 0x01 0xb8
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0xe5 0x13 0x00 0x3c
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0xe6 0x23 0x00 0x7c
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0xe7 0x43 0x00 0xbc
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0xe8 0x83 0x00 0xfc
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0xe9 0x03 0x81 0x3c
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0x64 0x00 0x00 0x38
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0x85 0x40 0x01 0x38
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0xe2 0x03 0x02 0x78
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0xe5 0x03 0x82 0xf8
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# CHECK: stur w4, [x3]
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# CHECK: stur w2, [sp, #32]
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# CHECK: stur x4, [x3]
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# CHECK: stur x2, [sp, #32]
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# CHECK: stur w5, [x4, #20]
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# CHECK: stur b5, [sp, #1]
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# CHECK: stur h6, [sp, #2]
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# CHECK: stur s7, [sp, #4]
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# CHECK: stur d8, [sp, #8]
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# CHECK: stur q9, [sp, #16]
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# CHECK: sturb w4, [x3]
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# CHECK: sturb w5, [x4, #20]
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# CHECK: sturh w2, [sp, #32]
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# CHECK: prfum pldl3strm, [sp, #32]
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#-----------------------------------------------------------------------------
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# Unprivileged loads and stores
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#-----------------------------------------------------------------------------
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0x83 0x08 0x41 0xb8
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0x83 0x08 0x41 0xf8
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0x83 0x08 0x41 0x38
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0x69 0x08 0xc0 0x38
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0xe2 0x0b 0x88 0x38
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0x83 0x08 0x41 0x78
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0xe3 0x0b 0xc2 0x78
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0x25 0x89 0x81 0x78
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0xe9 0x0b 0x98 0xb8
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# CHECK: ldtr w3, [x4, #16]
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# CHECK: ldtr x3, [x4, #16]
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# CHECK: ldtrb w3, [x4, #16]
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# CHECK: ldtrsb w9, [x3]
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# CHECK: ldtrsb x2, [sp, #128]
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# CHECK: ldtrh w3, [x4, #16]
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# CHECK: ldtrsh w3, [sp, #32]
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# CHECK: ldtrsh x5, [x9, #24]
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# CHECK: ldtrsw x9, [sp, #-128]
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0x85 0x48 0x01 0xb8
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0x64 0x08 0x00 0xf8
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0xe2 0x0b 0x02 0xf8
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0x64 0x08 0x00 0x38
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0x85 0x48 0x01 0x38
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0xe2 0x0b 0x02 0x78
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# CHECK: sttr w5, [x4, #20]
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# CHECK: sttr x4, [x3]
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# CHECK: sttr x2, [sp, #32]
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# CHECK: sttrb w4, [x3]
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# CHECK: sttrb w5, [x4, #20]
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# CHECK: sttrh w2, [sp, #32]
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#-----------------------------------------------------------------------------
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# Pre-indexed loads and stores
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#-----------------------------------------------------------------------------
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0xfd 0x8c 0x40 0xf8
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0xfe 0x8c 0x40 0xf8
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0x05 0x1c 0x40 0x3c
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0x06 0x2c 0x40 0x7c
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0x07 0x4c 0x40 0xbc
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0x08 0x8c 0x40 0xfc
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0x09 0x0c 0xc1 0x3c
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# CHECK: ldr x29, [x7, #8]!
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# CHECK: ldr x30, [x7, #8]!
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# CHECK: ldr b5, [x0, #1]!
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# CHECK: ldr h6, [x0, #2]!
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# CHECK: ldr s7, [x0, #4]!
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# CHECK: ldr d8, [x0, #8]!
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# CHECK: ldr q9, [x0, #16]!
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0xfe 0x8c 0x1f 0xf8
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0xfd 0x8c 0x1f 0xf8
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0x05 0xfc 0x1f 0x3c
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0x06 0xec 0x1f 0x7c
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0x07 0xcc 0x1f 0xbc
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0x08 0x8c 0x1f 0xfc
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0x09 0x0c 0x9f 0x3c
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# CHECK: str x30, [x7, #-8]!
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# CHECK: str x29, [x7, #-8]!
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# CHECK: str b5, [x0, #-1]!
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# CHECK: str h6, [x0, #-2]!
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# CHECK: str s7, [x0, #-4]!
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# CHECK: str d8, [x0, #-8]!
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# CHECK: str q9, [x0, #-16]!
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#-----------------------------------------------------------------------------
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# post-indexed loads and stores
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#-----------------------------------------------------------------------------
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0xfe 0x84 0x1f 0xf8
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0xfd 0x84 0x1f 0xf8
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0x05 0xf4 0x1f 0x3c
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0x06 0xe4 0x1f 0x7c
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0x07 0xc4 0x1f 0xbc
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0x08 0x84 0x1f 0xfc
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0x09 0x04 0x9f 0x3c
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# CHECK: str x30, [x7], #-8
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# CHECK: str x29, [x7], #-8
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# CHECK: str b5, [x0], #-1
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# CHECK: str h6, [x0], #-2
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# CHECK: str s7, [x0], #-4
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# CHECK: str d8, [x0], #-8
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# CHECK: str q9, [x0], #-16
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0xfd 0x84 0x40 0xf8
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0xfe 0x84 0x40 0xf8
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0x05 0x14 0x40 0x3c
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0x06 0x24 0x40 0x7c
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0x07 0x44 0x40 0xbc
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0x08 0x84 0x40 0xfc
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0x09 0x04 0xc1 0x3c
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# CHECK: ldr x29, [x7], #8
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# CHECK: ldr x30, [x7], #8
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# CHECK: ldr b5, [x0], #1
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# CHECK: ldr h6, [x0], #2
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# CHECK: ldr s7, [x0], #4
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# CHECK: ldr d8, [x0], #8
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# CHECK: ldr q9, [x0], #16
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#-----------------------------------------------------------------------------
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# Load/Store pair (indexed offset)
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#-----------------------------------------------------------------------------
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0xe3 0x09 0x42 0x29
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0xe4 0x27 0x7f 0xa9
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0xc2 0x0d 0x42 0x69
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0xe2 0x0f 0x7e 0x69
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0x4a 0x04 0x48 0x2d
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0x4a 0x04 0x40 0x6d
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# CHECK: ldp w3, w2, [x15, #16]
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# CHECK: ldp x4, x9, [sp, #-16]
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# CHECK: ldpsw x2, x3, [x14, #16]
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# CHECK: ldpsw x2, x3, [sp, #-16]
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# CHECK: ldp s10, s1, [x2, #64]
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# CHECK: ldp d10, d1, [x2]
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0xe3 0x09 0x02 0x29
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0xe4 0x27 0x3f 0xa9
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0x4a 0x04 0x08 0x2d
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0x4a 0x04 0x00 0x6d
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# CHECK: stp w3, w2, [x15, #16]
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# CHECK: stp x4, x9, [sp, #-16]
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# CHECK: stp s10, s1, [x2, #64]
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# CHECK: stp d10, d1, [x2]
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#-----------------------------------------------------------------------------
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# Load/Store pair (pre-indexed)
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#-----------------------------------------------------------------------------
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0xe3 0x09 0xc2 0x29
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0xe4 0x27 0xff 0xa9
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0xc2 0x0d 0xc2 0x69
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0xe2 0x0f 0xfe 0x69
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0x4a 0x04 0xc8 0x2d
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0x4a 0x04 0xc1 0x6d
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# CHECK: ldp w3, w2, [x15, #16]!
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# CHECK: ldp x4, x9, [sp, #-16]!
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# CHECK: ldpsw x2, x3, [x14, #16]!
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# CHECK: ldpsw x2, x3, [sp, #-16]!
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# CHECK: ldp s10, s1, [x2, #64]!
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# CHECK: ldp d10, d1, [x2, #16]!
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0xe3 0x09 0x82 0x29
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0xe4 0x27 0xbf 0xa9
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0x4a 0x04 0x88 0x2d
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0x4a 0x04 0x81 0x6d
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# CHECK: stp w3, w2, [x15, #16]!
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# CHECK: stp x4, x9, [sp, #-16]!
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# CHECK: stp s10, s1, [x2, #64]!
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# CHECK: stp d10, d1, [x2, #16]!
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#-----------------------------------------------------------------------------
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# Load/Store pair (post-indexed)
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#-----------------------------------------------------------------------------
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0xe3 0x09 0xc2 0x28
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0xe4 0x27 0xff 0xa8
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0xc2 0x0d 0xc2 0x68
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0xe2 0x0f 0xfe 0x68
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0x4a 0x04 0xc8 0x2c
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0x4a 0x04 0xc1 0x6c
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# CHECK: ldp w3, w2, [x15], #16
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# CHECK: ldp x4, x9, [sp], #-16
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# CHECK: ldpsw x2, x3, [x14], #16
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# CHECK: ldpsw x2, x3, [sp], #-16
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# CHECK: ldp s10, s1, [x2], #64
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# CHECK: ldp d10, d1, [x2], #16
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0xe3 0x09 0x82 0x28
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0xe4 0x27 0xbf 0xa8
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0x4a 0x04 0x88 0x2c
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0x4a 0x04 0x81 0x6c
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# CHECK: stp w3, w2, [x15], #16
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# CHECK: stp x4, x9, [sp], #-16
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# CHECK: stp s10, s1, [x2], #64
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# CHECK: stp d10, d1, [x2], #16
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#-----------------------------------------------------------------------------
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# Load/Store pair (no-allocate)
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#-----------------------------------------------------------------------------
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0xe3 0x09 0x42 0x28
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0xe4 0x27 0x7f 0xa8
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0x4a 0x04 0x48 0x2c
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0x4a 0x04 0x40 0x6c
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# CHECK: ldnp w3, w2, [x15, #16]
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# CHECK: ldnp x4, x9, [sp, #-16]
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# CHECK: ldnp s10, s1, [x2, #64]
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# CHECK: ldnp d10, d1, [x2]
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0xe3 0x09 0x02 0x28
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0xe4 0x27 0x3f 0xa8
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0x4a 0x04 0x08 0x2c
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0x4a 0x04 0x00 0x6c
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# CHECK: stnp w3, w2, [x15, #16]
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# CHECK: stnp x4, x9, [sp, #-16]
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# CHECK: stnp s10, s1, [x2, #64]
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# CHECK: stnp d10, d1, [x2]
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#-----------------------------------------------------------------------------
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# Load/Store register offset
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#-----------------------------------------------------------------------------
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0x00 0x68 0x60 0xb8
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0x00 0x78 0x60 0xb8
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0x00 0x68 0x60 0xf8
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0x00 0x78 0x60 0xf8
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0x00 0xe8 0x60 0xf8
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# CHECK: ldr w0, [x0, x0]
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# CHECK: ldr w0, [x0, x0, lsl #2]
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# CHECK: ldr x0, [x0, x0]
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# CHECK: ldr x0, [x0, x0, lsl #3]
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# CHECK: ldr x0, [x0, x0, sxtx]
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0x21 0x68 0x62 0x3c
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0x21 0x78 0x62 0x3c
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0x21 0x68 0x62 0x7c
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0x21 0x78 0x62 0x7c
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0x21 0x68 0x62 0xbc
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0x21 0x78 0x62 0xbc
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0x21 0x68 0x62 0xfc
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0x21 0x78 0x62 0xfc
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0x21 0x68 0xe2 0x3c
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0x21 0x78 0xe2 0x3c
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# CHECK: ldr b1, [x1, x2]
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# CHECK: ldr b1, [x1, x2, lsl #0]
|
|
# CHECK: ldr h1, [x1, x2]
|
|
# CHECK: ldr h1, [x1, x2, lsl #1]
|
|
# CHECK: ldr s1, [x1, x2]
|
|
# CHECK: ldr s1, [x1, x2, lsl #2]
|
|
# CHECK: ldr d1, [x1, x2]
|
|
# CHECK: ldr d1, [x1, x2, lsl #3]
|
|
# CHECK: ldr q1, [x1, x2]
|
|
# CHECK: ldr q1, [x1, x2, lsl #4]
|
|
|
|
0x00 0x48 0x20 0x7c
|
|
0xe1 0x6b 0x23 0xfc
|
|
0xe1 0x5b 0x23 0xfc
|
|
0xe1 0x6b 0xa3 0x3c
|
|
0xe1 0x5b 0xa3 0x3c
|
|
|
|
# CHECK: str h0, [x0, w0, uxtw]
|
|
# CHECK: str d1, [sp, x3]
|
|
# CHECK: str d1, [sp, w3, uxtw #3]
|
|
# CHECK: str q1, [sp, x3]
|
|
# CHECK: str q1, [sp, w3, uxtw #4]
|
|
|
|
#-----------------------------------------------------------------------------
|
|
# Load/Store exclusive
|
|
#-----------------------------------------------------------------------------
|
|
|
|
0x26 0x7c 0x5f 0x08
|
|
0x26 0x7c 0x5f 0x48
|
|
0x27 0x0d 0x7f 0x88
|
|
0x27 0x0d 0x7f 0xc8
|
|
|
|
# CHECK: ldxrb w6, [x1]
|
|
# CHECK: ldxrh w6, [x1]
|
|
# CHECK: ldxp w7, w3, [x9]
|
|
# CHECK: ldxp x7, x3, [x9]
|
|
|
|
0x64 0x7c 0x01 0xc8
|
|
0x64 0x7c 0x01 0x88
|
|
0x64 0x7c 0x01 0x08
|
|
0x64 0x7c 0x01 0x48
|
|
0x22 0x18 0x21 0xc8
|
|
0x22 0x18 0x21 0x88
|
|
|
|
# CHECK: stxr w1, x4, [x3]
|
|
# CHECK: stxr w1, w4, [x3]
|
|
# CHECK: stxrb w1, w4, [x3]
|
|
# CHECK: stxrh w1, w4, [x3]
|
|
# CHECK: stxp w1, x2, x6, [x1]
|
|
# CHECK: stxp w1, w2, w6, [x1]
|
|
|
|
#-----------------------------------------------------------------------------
|
|
# Load-acquire/Store-release non-exclusive
|
|
#-----------------------------------------------------------------------------
|
|
|
|
0xe4 0xff 0xdf 0x88
|
|
0xe4 0xff 0xdf 0xc8
|
|
0xe4 0xff 0xdf 0x08
|
|
0xe4 0xff 0xdf 0x48
|
|
|
|
# CHECK: ldar w4, [sp]
|
|
# CHECK: ldar x4, [sp]
|
|
# CHECK: ldarb w4, [sp]
|
|
# CHECK: ldarh w4, [sp]
|
|
|
|
0xc3 0xfc 0x9f 0x88
|
|
0xc3 0xfc 0x9f 0xc8
|
|
0xc3 0xfc 0x9f 0x08
|
|
0xc3 0xfc 0x9f 0x48
|
|
|
|
# CHECK: stlr w3, [x6]
|
|
# CHECK: stlr x3, [x6]
|
|
# CHECK: stlrb w3, [x6]
|
|
# CHECK: stlrh w3, [x6]
|
|
|
|
#-----------------------------------------------------------------------------
|
|
# Load-acquire/Store-release exclusive
|
|
#-----------------------------------------------------------------------------
|
|
|
|
0x82 0xfc 0x5f 0x88
|
|
0x82 0xfc 0x5f 0xc8
|
|
0x82 0xfc 0x5f 0x08
|
|
0x82 0xfc 0x5f 0x48
|
|
0x22 0x98 0x7f 0x88
|
|
0x22 0x98 0x7f 0xc8
|
|
|
|
# CHECK: ldaxr w2, [x4]
|
|
# CHECK: ldaxr x2, [x4]
|
|
# CHECK: ldaxrb w2, [x4]
|
|
# CHECK: ldaxrh w2, [x4]
|
|
# CHECK: ldaxp w2, w6, [x1]
|
|
# CHECK: ldaxp x2, x6, [x1]
|
|
|
|
0x27 0xfc 0x08 0xc8
|
|
0x27 0xfc 0x08 0x88
|
|
0x27 0xfc 0x08 0x08
|
|
0x27 0xfc 0x08 0x48
|
|
0x22 0x98 0x21 0xc8
|
|
0x22 0x98 0x21 0x88
|
|
|
|
# CHECK: stlxr w8, x7, [x1]
|
|
# CHECK: stlxr w8, w7, [x1]
|
|
# CHECK: stlxrb w8, w7, [x1]
|
|
# CHECK: stlxrh w8, w7, [x1]
|
|
# CHECK: stlxp w1, x2, x6, [x1]
|
|
# CHECK: stlxp w1, w2, w6, [x1]
|
|
|
|
#-----------------------------------------------------------------------------
|
|
# Load/Store with explicit LSL values
|
|
#-----------------------------------------------------------------------------
|
|
0x20 0x78 0xa0 0xb8
|
|
0x20 0x78 0x60 0xf8
|
|
0x20 0x78 0x20 0xf8
|
|
0x20 0x78 0x60 0xb8
|
|
0x20 0x78 0x20 0xb8
|
|
0x20 0x78 0xe0 0x3c
|
|
0x20 0x78 0xa0 0x3c
|
|
0x20 0x78 0x60 0xfc
|
|
0x20 0x78 0x20 0xfc
|
|
0x20 0x78 0x60 0xbc
|
|
0x20 0x78 0x20 0xbc
|
|
0x20 0x78 0x60 0x7c
|
|
0x20 0x78 0x60 0x3c
|
|
0x20 0x78 0x60 0x38
|
|
0x20 0x78 0x20 0x38
|
|
0x20 0x78 0xe0 0x38
|
|
0x20 0x78 0x60 0x78
|
|
0x20 0x78 0x20 0x78
|
|
0x20 0x78 0xe0 0x78
|
|
0x20 0x78 0xa0 0x38
|
|
0x20 0x78 0xa0 0x78
|
|
|
|
# CHECK: ldrsw x0, [x1, x0, lsl #2]
|
|
# CHECK: ldr x0, [x1, x0, lsl #3]
|
|
# CHECK: str x0, [x1, x0, lsl #3]
|
|
# CHECK: ldr w0, [x1, x0, lsl #2]
|
|
# CHECK: str w0, [x1, x0, lsl #2]
|
|
# CHECK: ldr q0, [x1, x0, lsl #4]
|
|
# CHECK: str q0, [x1, x0, lsl #4]
|
|
# CHECK: ldr d0, [x1, x0, lsl #3]
|
|
# CHECK: str d0, [x1, x0, lsl #3]
|
|
# CHECK: ldr s0, [x1, x0, lsl #2]
|
|
# CHECK: str s0, [x1, x0, lsl #2]
|
|
# CHECK: ldr h0, [x1, x0, lsl #1]
|
|
# CHECK: ldr b0, [x1, x0, lsl #0]
|
|
# CHECK: ldrb w0, [x1, x0, lsl #0]
|
|
# CHECK: strb w0, [x1, x0, lsl #0]
|
|
# CHECK: ldrsb w0, [x1, x0, lsl #0]
|
|
# CHECK: ldrh w0, [x1, x0, lsl #1]
|
|
# CHECK: strh w0, [x1, x0, lsl #1]
|
|
# CHECK: ldrsh w0, [x1, x0, lsl #1]
|
|
# CHECK: ldrsb x0, [x1, x0, lsl #0]
|
|
# CHECK: ldrsh x0, [x1, x0, lsl #1]
|