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https://github.com/RPCSX/llvm.git
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f2db9b88da
use -enable-ia64-dag-isel to turn this on
TODO: delete lowering stuff from the pattern isel
: get operations on predicate bits working
: get other bits of pseudocode going
: use sampo's mulh/mull-using divide-by-constant magic
: *so* many patterns ("extr", "tbit" and "dep" will be fun :)
: add FP
: add a JIT!
: get it working 100%
in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.
OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24058 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.7 KiB
C++
56 lines
1.7 KiB
C++
//===-- IA64.h - Top-level interface for IA64 representation ------*- C++ -*-===//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Duraid Madina and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the IA64
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// target library, as used by the LLVM JIT.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_IA64_H
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#define TARGET_IA64_H
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#include <iosfwd>
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namespace llvm {
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class TargetMachine;
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class FunctionPass;
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class IntrinsicLowering;
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/// createIA64DAGToDAGInstructionSelector - This pass converts an LLVM
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/// function into IA64 machine code in a sane, DAG->DAG transform.
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///
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FunctionPass *createIA64DAGToDAGInstructionSelector(TargetMachine &TM);
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/// createIA64PatternInstructionSelector - This pass converts an LLVM function
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/// into a machine code representation in a more aggressive way.
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///
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FunctionPass *createIA64PatternInstructionSelector(TargetMachine &TM);
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/// createIA64CodePrinterPass - Returns a pass that prints the IA64
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description. This should work
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/// regardless of whether the function is in SSA form.
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///
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FunctionPass *createIA64CodePrinterPass(std::ostream &o,TargetMachine &tm);
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} // End llvm namespace
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// Defines symbolic names for IA64 registers. This defines a mapping from
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// register name to register number.
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//
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#include "IA64GenRegisterNames.inc"
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// Defines symbolic names for the IA64 instructions.
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//
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#include "IA64GenInstrNames.inc"
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#endif
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