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This enables use of the 'R' and 'T' memory constraints for inline ASM operands on SystemZ, which allow an index register as well as an immediate displacement. This patch includes corresponding documentation and test case updates. As with the last patch of this kind, I moved the 'm' constraint to the most general case, which is now 'T' (base + 20-bit signed displacement + index register). Author: colpell Differential Revision: http://reviews.llvm.org/D21239 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272547 91177308-0d34-0410-b5e6-96231b3b80d8
159 lines
3.9 KiB
Plaintext
159 lines
3.9 KiB
Plaintext
//===---------------------------------------------------------------------===//
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// Random notes about and ideas for the SystemZ backend.
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//===---------------------------------------------------------------------===//
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The initial backend is deliberately restricted to z10. We should add support
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for later architectures at some point.
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--
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If an inline asm ties an i32 "r" result to an i64 input, the input
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will be treated as an i32, leaving the upper bits uninitialised.
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For example:
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define void @f4(i32 *%dst) {
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%val = call i32 asm "blah $0", "=r,0" (i64 103)
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store i32 %val, i32 *%dst
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ret void
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}
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from CodeGen/SystemZ/asm-09.ll will use LHI rather than LGHI.
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to load 103. This seems to be a general target-independent problem.
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--
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The tuning of the choice between LOAD ADDRESS (LA) and addition in
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SystemZISelDAGToDAG.cpp is suspect. It should be tweaked based on
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performance measurements.
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--
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There is no scheduling support.
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--
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We don't use the BRANCH ON INDEX instructions.
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--
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We don't use the TEST DATA CLASS instructions.
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--
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We only use MVC, XC and CLC for constant-length block operations.
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We could extend them to variable-length operations too,
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using EXECUTE RELATIVE LONG.
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MVCIN, MVCLE and CLCLE may be worthwhile too.
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--
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We don't use CUSE or the TRANSLATE family of instructions for string
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operations. The TRANSLATE ones are probably more difficult to exploit.
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--
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We don't take full advantage of builtins like fabsl because the calling
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conventions require f128s to be returned by invisible reference.
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--
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ADD LOGICAL WITH SIGNED IMMEDIATE could be useful when we need to
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produce a carry. SUBTRACT LOGICAL IMMEDIATE could be useful when we
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need to produce a borrow. (Note that there are no memory forms of
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ADD LOGICAL WITH CARRY and SUBTRACT LOGICAL WITH BORROW, so the high
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part of 128-bit memory operations would probably need to be done
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via a register.)
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--
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We don't use ICM or STCM.
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--
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DAGCombiner doesn't yet fold truncations of extended loads. Functions like:
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unsigned long f (unsigned long x, unsigned short *y)
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{
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return (x << 32) | *y;
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}
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therefore end up as:
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sllg %r2, %r2, 32
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llgh %r0, 0(%r3)
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lr %r2, %r0
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br %r14
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but truncating the load would give:
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sllg %r2, %r2, 32
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lh %r2, 0(%r3)
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br %r14
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--
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Functions like:
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define i64 @f1(i64 %a) {
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%and = and i64 %a, 1
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ret i64 %and
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}
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ought to be implemented as:
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lhi %r0, 1
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ngr %r2, %r0
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br %r14
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but two-address optimisations reverse the order of the AND and force:
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lhi %r0, 1
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ngr %r0, %r2
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lgr %r2, %r0
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br %r14
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CodeGen/SystemZ/and-04.ll has several examples of this.
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--
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Out-of-range displacements are usually handled by loading the full
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address into a register. In many cases it would be better to create
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an anchor point instead. E.g. for:
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define void @f4a(i128 *%aptr, i64 %base) {
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%addr = add i64 %base, 524288
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%bptr = inttoptr i64 %addr to i128 *
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%a = load volatile i128 *%aptr
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%b = load i128 *%bptr
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%add = add i128 %a, %b
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store i128 %add, i128 *%aptr
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ret void
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}
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(from CodeGen/SystemZ/int-add-08.ll) we load %base+524288 and %base+524296
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into separate registers, rather than using %base+524288 as a base for both.
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--
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Dynamic stack allocations round the size to 8 bytes and then allocate
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that rounded amount. It would be simpler to subtract the unrounded
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size from the copy of the stack pointer and then align the result.
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See CodeGen/SystemZ/alloca-01.ll for an example.
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--
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If needed, we can support 16-byte atomics using LPQ, STPQ and CSDG.
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--
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We might want to model all access registers and use them to spill
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32-bit values.
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--
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We might want to use the 'overflow' condition of eg. AR to support
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llvm.sadd.with.overflow.i32 and related instructions - the generated code
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for signed overflow check is currently quite bad. This would improve
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the results of using -ftrapv.
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