llvm/test/CodeGen/ARM/2009-09-27-CoalescerBug.ll
Evan Cheng 0e6b590b91 Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of
physical registers. This is especially critical for the later two since they
start the live interval of a super-register. e.g.
%DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
If this instruction is eliminated, the register scavenger will not be happy as
D0 is not defined previously.
This fixes PR5055.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28 05:28:43 +00:00

25 lines
853 B
LLVM

; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8
; PR5055
module asm ".globl\09__aeabi_f2lz"
module asm ".set\09__aeabi_f2lz, __fixsfdi"
module asm ""
define arm_aapcs_vfpcc i64 @__fixsfdi(float %a) nounwind {
entry:
%0 = fcmp olt float %a, 0.000000e+00 ; <i1> [#uses=1]
br i1 %0, label %bb, label %bb1
bb: ; preds = %entry
%1 = fsub float -0.000000e+00, %a ; <float> [#uses=1]
%2 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %1) nounwind ; <i64> [#uses=1]
%3 = sub i64 0, %2 ; <i64> [#uses=1]
ret i64 %3
bb1: ; preds = %entry
%4 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %a) nounwind ; <i64> [#uses=1]
ret i64 %4
}
declare arm_aapcs_vfpcc i64 @__fixunssfdi(float)