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cac51be31f
The patch disabled unrolling in loop vectorization pass when VF==1 on x86 architecture, by setting MaxInterleaveFactor to 1. Unrolling in loop vectorization pass may introduce the cost of overflow check, memory boundary check and extra prologue/epilogue code when regular unroller will unroll the loop another time. Disable it when VF==1 remove the unnecessary cost on x86. The same can be done for other platforms after verifying interleaving/memory bound checking to be not perf critical on those platforms. Differential Revision: http://reviews.llvm.org/D9515 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236613 91177308-0d34-0410-b5e6-96231b3b80d8
148 lines
4.7 KiB
C++
148 lines
4.7 KiB
C++
//===-- AArch64TargetTransformInfo.h - AArch64 specific TTI -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file a TargetTransformInfo::Concept conforming object specific to the
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/// AArch64 target machine. It uses the target's detailed information to
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/// provide more precise answers to certain TTI queries, while letting the
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/// target independent and default TTI implementations handle the rest.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
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#include "AArch64.h"
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#include "AArch64TargetMachine.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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#include "llvm/Target/TargetLowering.h"
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#include <algorithm>
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namespace llvm {
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class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
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typedef BasicTTIImplBase<AArch64TTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const AArch64TargetMachine *TM;
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const AArch64Subtarget *ST;
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const AArch64TargetLowering *TLI;
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/// Estimate the overhead of scalarizing an instruction. Insert and Extract
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/// are set if the result needs to be inserted and/or extracted from vectors.
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unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
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const AArch64Subtarget *getST() const { return ST; }
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const AArch64TargetLowering *getTLI() const { return TLI; }
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enum MemIntrinsicType {
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VECTOR_LDST_TWO_ELEMENTS,
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VECTOR_LDST_THREE_ELEMENTS,
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VECTOR_LDST_FOUR_ELEMENTS
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};
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public:
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explicit AArch64TTIImpl(const AArch64TargetMachine *TM, Function &F)
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: BaseT(TM), TM(TM), ST(TM->getSubtargetImpl(F)),
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TLI(ST->getTargetLowering()) {}
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// Provide value semantics. MSVC requires that we spell all of these out.
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AArch64TTIImpl(const AArch64TTIImpl &Arg)
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: BaseT(static_cast<const BaseT &>(Arg)), TM(Arg.TM), ST(Arg.ST),
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TLI(Arg.TLI) {}
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AArch64TTIImpl(AArch64TTIImpl &&Arg)
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: BaseT(std::move(static_cast<BaseT &>(Arg))), TM(std::move(Arg.TM)),
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ST(std::move(Arg.ST)), TLI(std::move(Arg.TLI)) {}
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AArch64TTIImpl &operator=(const AArch64TTIImpl &RHS) {
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BaseT::operator=(static_cast<const BaseT &>(RHS));
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TM = RHS.TM;
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ST = RHS.ST;
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TLI = RHS.TLI;
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return *this;
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}
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AArch64TTIImpl &operator=(AArch64TTIImpl &&RHS) {
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BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
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TM = std::move(RHS.TM);
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ST = std::move(RHS.ST);
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TLI = std::move(RHS.TLI);
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return *this;
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}
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/// \name Scalar TTI Implementations
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/// @{
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using BaseT::getIntImmCost;
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unsigned getIntImmCost(int64_t Val);
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unsigned getIntImmCost(const APInt &Imm, Type *Ty);
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unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
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Type *Ty);
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unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
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Type *Ty);
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TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
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/// @}
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/// \name Vector TTI Implementations
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/// @{
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unsigned getNumberOfRegisters(bool Vector) {
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if (Vector) {
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if (ST->hasNEON())
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return 32;
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return 0;
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}
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return 31;
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}
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unsigned getRegisterBitWidth(bool Vector) {
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if (Vector) {
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if (ST->hasNEON())
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return 128;
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return 0;
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}
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return 64;
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}
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unsigned getMaxInterleaveFactor(unsigned VF);
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unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
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unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
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unsigned getArithmeticInstrCost(
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unsigned Opcode, Type *Ty,
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TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
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TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
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TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
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TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
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unsigned getAddressComputationCost(Type *Ty, bool IsComplex);
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unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
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unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
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unsigned AddressSpace);
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unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys);
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void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP);
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Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
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Type *ExpectedType);
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bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info);
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/// @}
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};
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} // end namespace llvm
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#endif
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