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144 lines
5.2 KiB
Plaintext
144 lines
5.2 KiB
Plaintext
#BEGIN_LEGAL
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#
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#Copyright (c) 2016 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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#END_LEGAL
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#################################################################
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## file: xed-prefixes.txt
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#################################################################
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# SYNTAX:
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# conditions and input bytes | output-mode-state and captures...
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# FIXME: make ICLASS a possible field?
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# Remove the segment override if any supplied, from an LEA
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REMOVE_SEGMENT()::
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mode16 | SEG0=XED_REG_INVALID
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mode32 | SEG0=XED_REG_INVALID
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mode64 | SEG0=XED_REG_INVALID
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# FIXME 2007-07-10 full "otherwise" RHS's are not supported yet in decoder.
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#otherwise | SEG0=XED_REG_INVALID
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PREFIXES()::
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# The presence of the REX itself and the REXW are state bits because
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# they control decoding downstream.
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#
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# 64b mode prefixes
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#
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# rex prefixes
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mode64 0b0100 wrxb | XED_RESET REX=1 REXW=w REXR=r REXX=x REXB=b
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# Note that because of the REX rules, if we see a legacy prefix after
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# a rex prefix, we have to ignore the rex prefix and all its captures!
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# (reset_rex). The new state bits override existing captures and state
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# bits. That explains all the rex stuff.
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# other prefixes
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# NOTE: double denotation of f2/f3/osz.(eg f2_prefix and
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# f2_refining_prefix). That 2nd allows for table lookups indexing to
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# the 2B table.
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mode64 0xf2 MODE_FIRST_PREFIX=0 | XED_RESET reset_rex f2_prefix refining_f2
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mode64 0xf3 MODE_FIRST_PREFIX=0 | XED_RESET reset_rex f3_prefix refining_f3
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mode64 0xf2 MODE_FIRST_PREFIX=1 REP=0 | XED_RESET reset_rex f2_prefix refining_f2
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mode64 0xf3 MODE_FIRST_PREFIX=1 REP=0 | XED_RESET reset_rex f3_prefix refining_f3
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mode64 0xf2 MODE_FIRST_PREFIX=1 REP!=0 | XED_RESET reset_rex
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mode64 0xf3 MODE_FIRST_PREFIX=1 REP!=0 | XED_RESET reset_rex
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# 2009-08-17: The 66_prefix (OSZ=1) gets zero'ed by some instructions
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# that use 66 as a refining prefix. To ensure we have a 66 prefix
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# indicator, we also set PREFIX66=1.
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mode64 0x66 | XED_RESET 66_prefix PREFIX66=1 reset_rex
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mode64 0x67 | XED_RESET 67_prefix reset_rex
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mode64 0xf0 | XED_RESET lock_prefix reset_rex
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# CS and DS prefixes could be branch hints. cs_prefix and ds_prefix
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# translate to the correct values for the BRANCH_HINT nonterminal.
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mode64 0x2e | XED_RESET HINT=1 reset_rex
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mode64 0x3e | XED_RESET HINT=2 reset_rex
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mode64 0x26 | XED_RESET reset_rex
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mode64 0x64 | XED_RESET fs_prefix reset_rex
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mode64 0x65 | XED_RESET gs_prefix reset_rex
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mode64 0x36 | XED_RESET reset_rex
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#
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# 32b mode prefixes
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#
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mode32 0xf2 MODE_FIRST_PREFIX=0 | XED_RESET f2_prefix refining_f2
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mode32 0xf3 MODE_FIRST_PREFIX=0 | XED_RESET f3_prefix refining_f3
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mode32 0xf2 MODE_FIRST_PREFIX=1 REP=0 | XED_RESET f2_prefix refining_f2
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mode32 0xf3 MODE_FIRST_PREFIX=1 REP=0 | XED_RESET f3_prefix refining_f3
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mode32 0xf2 MODE_FIRST_PREFIX=1 REP!=0 | XED_RESET
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mode32 0xf3 MODE_FIRST_PREFIX=1 REP!=0 | XED_RESET
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mode32 0x66 | XED_RESET 66_prefix PREFIX66=1
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mode32 0x67 | XED_RESET 67_prefix
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mode32 0xf0 | XED_RESET lock_prefix
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# CS and DS prefixes could be branch hints. cs_prefix and ds_prefix
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# translate to the correct values for the BRANCH_HINT nonterminal.
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mode32 0x2e | XED_RESET cs_prefix HINT=1
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mode32 0x3e | XED_RESET ds_prefix HINT=2
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mode32 0x26 | XED_RESET es_prefix
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mode32 0x64 | XED_RESET fs_prefix
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mode32 0x65 | XED_RESET gs_prefix
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mode32 0x36 | XED_RESET ss_prefix
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#
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# 16b mode prefixes
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#
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mode16 0xf2 MODE_FIRST_PREFIX=0 | XED_RESET f2_prefix refining_f2
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mode16 0xf3 MODE_FIRST_PREFIX=0 | XED_RESET f3_prefix refining_f3
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mode16 0xf2 MODE_FIRST_PREFIX=1 REP=0 | XED_RESET f2_prefix refining_f2
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mode16 0xf3 MODE_FIRST_PREFIX=1 REP=0 | XED_RESET f3_prefix refining_f3
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mode16 0xf2 MODE_FIRST_PREFIX=1 REP!=0 | XED_RESET
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mode16 0xf3 MODE_FIRST_PREFIX=1 REP!=0 | XED_RESET
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mode16 0x66 | XED_RESET 66_prefix PREFIX66=1
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mode16 0x67 | XED_RESET 67_prefix
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mode16 0xf0 | XED_RESET lock_prefix
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# CS and DS prefixes could be branch hints. cs_prefix and ds_prefix
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# translate to the correct values for the BRANCH_HINT nonterminal.
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mode16 0x2e | XED_RESET cs_prefix HINT=1
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mode16 0x3e | XED_RESET ds_prefix HINT=2
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mode16 0x26 | XED_RESET es_prefix
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mode16 0x64 | XED_RESET fs_prefix
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mode16 0x65 | XED_RESET gs_prefix
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mode16 0x36 | XED_RESET ss_prefix
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# This is the epsilon action indicating that it is okay to
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# accept nothing at this point in the traversal.
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otherwise |
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BRANCH_HINT()::
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HINT=0 |
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HINT=1 | HINT=3
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HINT=2 | HINT=4
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