Kernel/riscv64: Add Svpbmt support

This makes `MemoryType`s actually work on RISC-V systems with Svpbmt.

Kernel/Arch/riscv64/PageDirectory.h

@@ -84,7 +84,20 @@ public:
     bool is_writable() const { return (m_raw & to_underlying(PageTableEntryBits::Writeable)) != 0; }
     void set_writable(bool b) { set_bit(PageTableEntryBits::Writeable, b); }
 
-    void set_memory_type(MemoryType) { }
+    void set_memory_type(MemoryType memory_type)
+    {
+        if (!Processor::current().has_feature(CPUFeature::Svpbmt))
+            return;
+
+        m_raw &= ~(PTE_PBMT_MASK << PTE_PBMT_OFFSET);
+
+        if (memory_type == MemoryType::Normal)
+            m_raw |= to_underlying(PageBasedMemoryType::PMA) << PTE_PBMT_OFFSET;
+        else if (memory_type == MemoryType::NonCacheable)
+            m_raw |= to_underlying(PageBasedMemoryType::NonCacheable) << PTE_PBMT_OFFSET;
+        else if (memory_type == MemoryType::IO)
+            m_raw |= to_underlying(PageBasedMemoryType::IO) << PTE_PBMT_OFFSET;
+    }
 
     bool is_global() const { return (m_raw & to_underlying(PageTableEntryBits::Global)) != 0; }
     void set_global(bool b) { set_bit(PageTableEntryBits::Global, b); }

Kernel/Arch/riscv64/VirtualMemoryDefinitions.h

@@ -35,6 +35,9 @@ constexpr size_t VPN_0_OFFSET = 12;
 constexpr size_t PPN_MASK = (1LU << PPN_SIZE) - 1;
 constexpr size_t PTE_PPN_MASK = PPN_MASK << PTE_PPN_OFFSET;
 
+constexpr size_t PTE_PBMT_OFFSET = 61;
+constexpr size_t PTE_PBMT_MASK = 0b11;
+
 constexpr size_t PAGE_TABLE_INDEX_BITS = 9;
 constexpr size_t PAGE_TABLE_INDEX_MASK = (1 << PAGE_TABLE_INDEX_BITS) - 1;
 
@@ -54,4 +57,12 @@ enum class PageTableEntryBits {
 };
 AK_ENUM_BITWISE_OPERATORS(PageTableEntryBits);
 
+// 12.3. "Svpbmt" Extension for Page-Based Memory Types, Version 1.0
+// https://docs.riscv.org/reference/isa/priv/supervisor.html#svpbmt
+enum class PageBasedMemoryType : u64 {
+    PMA = 0,          // PMA: None
+    NonCacheable = 1, // NC:  Non-cacheable, idempotent, weakly-ordered (RVWMO), main memory
+    IO = 2,           // IO:  Non-cacheable, non-idempotent, strongly-ordered (I/O ordering), I/O
+};
+
 }