Added assert

This commit is contained in:
emdel 2016-02-18 06:21:04 -08:00
parent 6e5a3a6d5b
commit 0383db9d27

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@ -23,7 +23,7 @@ import regress
mu = 0
zf = 1 # (0:clear, 1:set)
zf = 0 # (0:clear, 1:set)
class Init(regress.RegressTest):
@ -159,8 +159,8 @@ class Init(regress.RegressTest):
except UcError as e:
print("ERROR: %s" % e)
# now print out some registers
print(">>> Emulation done. Below is the CPU context")
rdx = mu.reg_read(UC_X86_REG_RDX)
self.assertEqual(rdx, 0xbabe, "RDX contains the wrong value. Eflags modification failed.")
if __name__ == '__main__':