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fix some gcc warnings

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This commit is contained in:
Nguyen Anh Quynh 2018-07-25 12:38:15 +08:00
parent 2a240079d8
commit 86313650f9
2 changed files with 4 additions and 4 deletions
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4
qemu/target-arm/cpu64.c
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@ -163,8 +163,8 @@ static void aarch64_cpu_finalizefn(struct uc_struct *uc, Object *obj, void *opaq
static void aarch64_cpu_set_pc(CPUState *cs, vaddr value)
{
CPUARMState *env = cs->env_ptr;
ARMCPU *cpu = ARM_CPU(env->uc, cs);
//CPUARMState *env = cs->env_ptr;
ARMCPU *cpu = ARM_CPU(NULL, cs);
/* It's OK to look at env for the current mode here, because it's
* never possible for an AArch64 TB to chain to an AArch32 TB.
* (Otherwise we would need to use synchronize_from_tb instead.)

4
qemu/target-arm/translate.c
View File

@ -2692,8 +2692,8 @@ static int disas_dsp_insn(DisasContext *s, uint32_t insn)
// on msvc, so is replaced with separate versions for the shift to perform.
//#define VFP_REG_SHR(x, n) (((n) > 0) ? (x) >> (n) : (x) << -(n))
#if 0
//#define VFP_SREG(insn, bigbit, smallbit) \
// ((VFP_REG_SHR(insn, bigbit - 1) & 0x1e) | (((insn) >> (smallbit)) & 1))
#define VFP_SREG(insn, bigbit, smallbit) \
((VFP_REG_SHR(insn, bigbit - 1) & 0x1e) | (((insn) >> (smallbit)) & 1))
#endif
#define VFP_REG_SHR_NEG(insn, n) ((insn) << -(n))