mirror of
https://github.com/darlinghq/darling-JavaScriptCore.git
synced 2025-04-12 20:08:13 +00:00
478 lines
17 KiB
C++
478 lines
17 KiB
C++
/*
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* Copyright (C) 2018-2020 Apple Inc. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#pragma once
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#if ENABLE(ASSEMBLER) && CPU(ARM64E)
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#include "DisallowMacroScratchRegisterUsage.h"
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// We need to include this before MacroAssemblerARM64.h because MacroAssemblerARM64
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// will be defined in terms of ARM64EAssembler for ARM64E.
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#include "ARM64EAssembler.h"
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#include "JSCPtrTag.h"
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#include "MacroAssemblerARM64.h"
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#if ENABLE(JIT_CAGE)
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#include <WebKitAdditions/JITCageAdditions.h>
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#endif
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namespace JSC {
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using Assembler = TARGET_ASSEMBLER;
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class MacroAssemblerARM64E : public MacroAssemblerARM64 {
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public:
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static constexpr unsigned numberOfPACBits = 25;
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static constexpr uintptr_t nonPACBitsMask = (1ull << (64 - numberOfPACBits)) - 1;
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ALWAYS_INLINE void tagReturnAddress()
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{
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tagPtr(ARM64Registers::sp, ARM64Registers::lr);
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}
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ALWAYS_INLINE void untagReturnAddress(RegisterID scratch = InvalidGPR)
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{
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untagPtr(ARM64Registers::sp, ARM64Registers::lr);
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validateUntaggedPtr(ARM64Registers::lr, scratch);
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}
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ALWAYS_INLINE void tagPtr(PtrTag tag, RegisterID target)
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{
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auto tagGPR = getCachedDataTempRegisterIDAndInvalidate();
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move(TrustedImm64(tag), tagGPR);
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m_assembler.pacib(target, tagGPR);
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}
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ALWAYS_INLINE void tagPtr(RegisterID tag, RegisterID target)
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{
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if (target == ARM64Registers::lr && tag == ARM64Registers::sp) {
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m_assembler.pacibsp();
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return;
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}
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m_assembler.pacib(target, tag);
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}
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ALWAYS_INLINE void untagPtr(PtrTag tag, RegisterID target)
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{
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auto tagGPR = getCachedDataTempRegisterIDAndInvalidate();
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move(TrustedImm64(tag), tagGPR);
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m_assembler.autib(target, tagGPR);
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}
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ALWAYS_INLINE void validateUntaggedPtr(RegisterID target, RegisterID scratch = InvalidGPR)
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{
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if (scratch == InvalidGPR)
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scratch = getCachedDataTempRegisterIDAndInvalidate();
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DisallowMacroScratchRegisterUsage disallowScope(*this);
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ASSERT(target != scratch);
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rshift64(target, TrustedImm32(8), scratch);
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and64(TrustedImm64(0xff000000000000), scratch, scratch);
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or64(target, scratch, scratch);
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load8(Address(scratch), scratch);
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}
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ALWAYS_INLINE void untagPtr(RegisterID tag, RegisterID target)
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{
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m_assembler.autib(target, tag);
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}
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ALWAYS_INLINE void removePtrTag(RegisterID target)
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{
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m_assembler.xpaci(target);
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}
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ALWAYS_INLINE void tagArrayPtr(RegisterID length, RegisterID target)
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{
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m_assembler.pacdb(target, length);
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}
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ALWAYS_INLINE void untagArrayPtr(RegisterID length, RegisterID target)
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{
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m_assembler.autdb(target, length);
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}
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ALWAYS_INLINE void untagArrayPtr(Address length, RegisterID target)
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{
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auto lengthGPR = getCachedDataTempRegisterIDAndInvalidate();
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load32(length, lengthGPR);
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m_assembler.autdb(target, lengthGPR);
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}
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ALWAYS_INLINE void removeArrayPtrTag(RegisterID target)
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{
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m_assembler.xpacd(target);
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}
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static constexpr RegisterID InvalidGPR = static_cast<RegisterID>(-1);
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enum class CallSignatureType {
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JITCall,
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NativeCall,
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};
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enum class JumpSignatureType {
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JITJump,
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NativeJump,
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};
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template<CallSignatureType type>
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ALWAYS_INLINE Call callTrustedPtr(RegisterID tagGPR = InvalidGPR)
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{
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UNUSED_PARAM(type);
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ASSERT(tagGPR != dataTempRegister);
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AssemblerLabel pointerLabel = m_assembler.label();
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moveWithFixedWidth(TrustedImmPtr(nullptr), getCachedDataTempRegisterIDAndInvalidate());
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invalidateAllTempRegisters();
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#if ENABLE(JIT_CAGE)
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if (Options::useJITCage()) {
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JSC_JIT_CAGED_CALL(type, dataTempRegister, tagGPR);
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} else
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#endif
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m_assembler.blrab(dataTempRegister, tagGPR);
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AssemblerLabel callLabel = m_assembler.label();
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ASSERT_UNUSED(pointerLabel, ARM64Assembler::getDifferenceBetweenLabels(callLabel, pointerLabel) == REPATCH_OFFSET_CALL_TO_POINTER);
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return Call(callLabel, Call::Linkable);
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}
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ALWAYS_INLINE Call call(PtrTag tag)
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{
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ASSERT(tag != CFunctionPtrTag && tag != NoPtrTag);
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ASSERT(!Options::useJITCage() || callerType(tag) == PtrTagCallerType::JIT);
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move(TrustedImm64(tag), ARM64Registers::lr);
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if (calleeType(tag) == PtrTagCalleeType::JIT)
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return callTrustedPtr<CallSignatureType::JITCall>(ARM64Registers::lr);
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return callTrustedPtr<CallSignatureType::NativeCall>(ARM64Registers::lr);
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}
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ALWAYS_INLINE Call call(RegisterID tagGPR)
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{
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return callTrustedPtr<CallSignatureType::NativeCall>(tagGPR);
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}
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template<CallSignatureType type>
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ALWAYS_INLINE Call callRegister(RegisterID targetGPR, RegisterID tagGPR = InvalidGPR)
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{
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UNUSED_PARAM(type);
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ASSERT(tagGPR != targetGPR);
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invalidateAllTempRegisters();
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#if ENABLE(JIT_CAGE)
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if (Options::useJITCage()) {
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JSC_JIT_CAGED_CALL(type, targetGPR, tagGPR);
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} else
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#endif
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m_assembler.blrab(targetGPR, tagGPR);
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return Call(m_assembler.label(), Call::None);
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}
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ALWAYS_INLINE Call call(RegisterID targetGPR, PtrTag tag)
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{
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ASSERT(tag != CFunctionPtrTag && tag != NoPtrTag);
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ASSERT(!Options::useJITCage() || callerType(tag) == PtrTagCallerType::JIT);
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move(TrustedImm64(tag), ARM64Registers::lr);
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if (calleeType(tag) == PtrTagCalleeType::JIT)
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return callRegister<CallSignatureType::JITCall>(targetGPR, ARM64Registers::lr);
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return callRegister<CallSignatureType::NativeCall>(targetGPR, ARM64Registers::lr);
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}
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ALWAYS_INLINE Call call(RegisterID targetGPR, RegisterID tagGPR)
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{
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return callRegister<CallSignatureType::NativeCall>(targetGPR, tagGPR);
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}
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ALWAYS_INLINE Call call(Address address, PtrTag tag)
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{
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ASSERT(tag != CFunctionPtrTag && tag != NoPtrTag);
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ASSERT(!Options::useJITCage() || callerType(tag) == PtrTagCallerType::JIT);
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load64(address, getCachedDataTempRegisterIDAndInvalidate());
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return call(dataTempRegister, tag);
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}
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ALWAYS_INLINE Call call(Address address, RegisterID tag)
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{
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ASSERT(tag != dataTempRegister);
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load64(address, getCachedDataTempRegisterIDAndInvalidate());
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return call(dataTempRegister, tag);
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}
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ALWAYS_INLINE void callOperation(const FunctionPtr<OperationPtrTag> operation)
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{
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auto tmp = getCachedDataTempRegisterIDAndInvalidate();
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move(TrustedImmPtr(operation.executableAddress()), tmp);
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call(tmp, OperationPtrTag);
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}
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ALWAYS_INLINE Jump jump() { return MacroAssemblerARM64::jump(); }
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template<JumpSignatureType type>
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ALWAYS_INLINE void farJumpRegister(RegisterID targetGPR, RegisterID tagGPR = InvalidGPR)
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{
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UNUSED_PARAM(type);
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ASSERT(tagGPR != targetGPR);
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#if ENABLE(JIT_CAGE)
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if (Options::useJITCage()) {
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JSC_JIT_CAGED_FAR_JUMP(type, targetGPR, tagGPR);
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} else
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#endif
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m_assembler.brab(targetGPR, tagGPR);
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}
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void farJump(RegisterID targetGPR, PtrTag tag)
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{
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ASSERT(tag != CFunctionPtrTag && tag != NoPtrTag);
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ASSERT(!Options::useJITCage() || callerType(tag) == PtrTagCallerType::JIT);
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ASSERT(tag != CFunctionPtrTag);
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RegisterID diversityGPR = getCachedDataTempRegisterIDAndInvalidate();
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move(TrustedImm64(tag), diversityGPR);
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if (calleeType(tag) == PtrTagCalleeType::JIT)
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farJumpRegister<JumpSignatureType::JITJump>(targetGPR, diversityGPR);
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else
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farJumpRegister<JumpSignatureType::NativeJump>(targetGPR, diversityGPR);
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}
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void farJump(TrustedImmPtr target, PtrTag tag)
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{
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ASSERT(tag != CFunctionPtrTag && tag != NoPtrTag);
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ASSERT(!Options::useJITCage() || callerType(tag) == PtrTagCallerType::JIT);
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RegisterID targetGPR = getCachedDataTempRegisterIDAndInvalidate();
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RegisterID diversityGPR = getCachedMemoryTempRegisterIDAndInvalidate();
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move(target, targetGPR);
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move(TrustedImm64(tag), diversityGPR);
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if (calleeType(tag) == PtrTagCalleeType::JIT)
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farJumpRegister<JumpSignatureType::JITJump>(targetGPR, diversityGPR);
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else
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farJumpRegister<JumpSignatureType::NativeJump>(targetGPR, diversityGPR);
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}
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void farJump(RegisterID targetGPR, RegisterID tagGPR)
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{
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ASSERT(tagGPR != targetGPR);
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farJumpRegister<JumpSignatureType::JITJump>(targetGPR, tagGPR);
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}
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void farJump(Address address, RegisterID tagGPR)
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{
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RegisterID targetGPR = getCachedDataTempRegisterIDAndInvalidate();
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ASSERT(tagGPR != targetGPR);
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load64(address, targetGPR);
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farJumpRegister<JumpSignatureType::JITJump>(targetGPR, tagGPR);
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}
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void farJump(BaseIndex address, RegisterID tagGPR)
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{
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RegisterID targetGPR = getCachedDataTempRegisterIDAndInvalidate();
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ASSERT(tagGPR != targetGPR);
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load64(address, targetGPR);
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farJumpRegister<JumpSignatureType::JITJump>(targetGPR, tagGPR);
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}
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void farJump(AbsoluteAddress address, RegisterID tagGPR)
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{
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RegisterID targetGPR = getCachedDataTempRegisterIDAndInvalidate();
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ASSERT(tagGPR != targetGPR);
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move(TrustedImmPtr(address.m_ptr), targetGPR);
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load64(Address(targetGPR), targetGPR);
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farJumpRegister<JumpSignatureType::JITJump>(targetGPR, tagGPR);
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}
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void farJump(Address address, PtrTag tag)
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{
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ASSERT(tag != CFunctionPtrTag && tag != NoPtrTag);
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ASSERT(!Options::useJITCage() || callerType(tag) == PtrTagCallerType::JIT);
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RegisterID targetGPR = getCachedDataTempRegisterIDAndInvalidate();
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RegisterID diversityGPR = getCachedMemoryTempRegisterIDAndInvalidate();
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load64(address, targetGPR);
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move(TrustedImm64(tag), diversityGPR);
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if (calleeType(tag) == PtrTagCalleeType::JIT)
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farJumpRegister<JumpSignatureType::JITJump>(targetGPR, diversityGPR);
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else
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farJumpRegister<JumpSignatureType::NativeJump>(targetGPR, diversityGPR);
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}
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void farJump(BaseIndex address, PtrTag tag)
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{
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ASSERT(tag != CFunctionPtrTag && tag != NoPtrTag);
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ASSERT(!Options::useJITCage() || callerType(tag) == PtrTagCallerType::JIT);
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RegisterID targetGPR = getCachedDataTempRegisterIDAndInvalidate();
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RegisterID diversityGPR = getCachedMemoryTempRegisterIDAndInvalidate();
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load64(address, targetGPR);
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move(TrustedImm64(tag), diversityGPR);
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if (calleeType(tag) == PtrTagCalleeType::JIT)
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farJumpRegister<JumpSignatureType::JITJump>(targetGPR, diversityGPR);
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else
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farJumpRegister<JumpSignatureType::NativeJump>(targetGPR, diversityGPR);
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}
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void farJump(AbsoluteAddress address, PtrTag tag)
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{
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ASSERT(tag != CFunctionPtrTag && tag != NoPtrTag);
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ASSERT(!Options::useJITCage() || callerType(tag) == PtrTagCallerType::JIT);
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RegisterID targetGPR = getCachedDataTempRegisterIDAndInvalidate();
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RegisterID diversityGPR = getCachedMemoryTempRegisterIDAndInvalidate();
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move(TrustedImmPtr(address.m_ptr), targetGPR);
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load64(Address(targetGPR), targetGPR);
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move(TrustedImm64(tag), diversityGPR);
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if (calleeType(tag) == PtrTagCalleeType::JIT)
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farJumpRegister<JumpSignatureType::JITJump>(targetGPR, diversityGPR);
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else
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farJumpRegister<JumpSignatureType::NativeJump>(targetGPR, diversityGPR);
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}
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ALWAYS_INLINE void ret()
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{
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#if ENABLE(JIT_CAGE)
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if (Options::useJITCage()) {
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JSC_JIT_CAGED_RET();
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} else
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#endif
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m_assembler.retab();
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}
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void atomicXchgAdd8(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldaddal<8>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgAdd16(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldaddal<16>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgAdd32(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldaddal<32>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgAdd64(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldaddal<64>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgXor8(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldeoral<8>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgXor16(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldeoral<16>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgXor32(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldeoral<32>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgXor64(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldeoral<64>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgOr8(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldsetal<8>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgOr16(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldsetal<16>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgOr32(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldsetal<32>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgOr64(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldsetal<64>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgClear8(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldclral<8>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgClear16(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldclral<16>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgClear32(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldclral<32>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchgClear64(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.ldclral<64>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchg8(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.swpal<8>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchg16(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.swpal<16>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchg32(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.swpal<32>(src, dest, extractSimpleAddress(address));
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}
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void atomicXchg64(RegisterID src, ImplicitAddress address, RegisterID dest)
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{
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m_assembler.swpal<64>(src, dest, extractSimpleAddress(address));
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}
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void atomicStrongCAS8(RegisterID expectedAndResult, RegisterID newValue, ImplicitAddress address)
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{
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m_assembler.casal<8>(expectedAndResult, newValue, extractSimpleAddress(address));
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}
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void atomicStrongCAS16(RegisterID expectedAndResult, RegisterID newValue, ImplicitAddress address)
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{
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m_assembler.casal<16>(expectedAndResult, newValue, extractSimpleAddress(address));
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}
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void atomicStrongCAS32(RegisterID expectedAndResult, RegisterID newValue, ImplicitAddress address)
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{
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m_assembler.casal<32>(expectedAndResult, newValue, extractSimpleAddress(address));
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}
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void atomicStrongCAS64(RegisterID expectedAndResult, RegisterID newValue, ImplicitAddress address)
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{
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m_assembler.casal<64>(expectedAndResult, newValue, extractSimpleAddress(address));
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}
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};
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} // namespace JSC
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#endif // ENABLE(ASSEMBLER) && CPU(ARM64E)
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