1995-10-13 22:06:30 +00:00
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/* run front end support for arm
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1997-04-17 09:41:11 +00:00
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Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc.
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1995-10-13 22:06:30 +00:00
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1997-04-17 06:05:19 +00:00
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This file is part of ARM SIM.
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1995-10-13 22:06:30 +00:00
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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1997-04-17 06:05:19 +00:00
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* This file provides the interface between the simulator and run.c and gdb
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(when the simulator is linked with gdb).
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All simulator interaction should go through this file. */
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1995-10-13 22:06:30 +00:00
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#include <stdio.h>
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#include <stdarg.h>
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#include <bfd.h>
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#include <signal.h>
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#include "callback.h"
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#include "remote-sim.h"
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1997-04-17 06:05:19 +00:00
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#include "armdefs.h"
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#include "armemu.h"
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#include "dbg_rdi.h"
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host_callback *sim_callback;
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1995-10-13 22:06:30 +00:00
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static struct ARMul_State *state;
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1997-04-17 09:41:11 +00:00
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/* Who is using the simulator. */
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static SIM_OPEN_KIND sim_kind;
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/* argv[0] */
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static char *myname;
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1997-04-17 06:05:19 +00:00
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/* Memory size in bytes. */
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static int mem_size = (1 << 21);
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/* Non-zero to display start up banner, and maybe other things. */
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static int verbosity;
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1995-10-13 22:06:30 +00:00
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static void
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init ()
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{
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static int done;
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1997-04-17 06:05:19 +00:00
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1995-10-13 22:06:30 +00:00
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if (!done)
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{
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ARMul_EmulateInit();
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state = ARMul_NewState ();
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1997-04-17 06:05:19 +00:00
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ARMul_MemoryInit(state, mem_size);
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1995-10-13 22:06:30 +00:00
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ARMul_OSInit(state);
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ARMul_CoProInit(state);
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1997-04-17 06:05:19 +00:00
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state->verbose = verbosity;
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1995-10-13 22:06:30 +00:00
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done = 1;
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}
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}
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1997-04-17 06:05:19 +00:00
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/* Set verbosity level of simulator.
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This is not intended to produce detailed tracing or debugging information.
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Just summaries. */
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/* FIXME: common/run.c doesn't do this yet. */
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1995-10-13 22:06:30 +00:00
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1997-04-17 06:05:19 +00:00
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void
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sim_set_verbose (v)
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int v;
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{
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verbosity = v;
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1995-10-13 22:06:30 +00:00
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}
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1997-04-17 06:05:19 +00:00
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/* Set the memory size to SIZE bytes.
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Must be called before initializing simulator. */
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/* FIXME: Rename to sim_set_mem_size. */
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1995-10-13 22:06:30 +00:00
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void
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sim_size (size)
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int size;
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{
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1997-04-17 06:05:19 +00:00
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mem_size = size;
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1995-10-13 22:06:30 +00:00
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}
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void
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1997-04-17 06:05:19 +00:00
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ARMul_ConsolePrint (ARMul_State * state, const char *format,...)
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1995-10-13 22:06:30 +00:00
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{
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1997-04-17 06:05:19 +00:00
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va_list ap;
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if (state->verbose)
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{
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va_start (ap, format);
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vprintf (format, ap);
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va_end (ap);
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}
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1995-10-13 22:06:30 +00:00
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}
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1997-04-17 06:05:19 +00:00
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ARMword
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ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr)
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1995-10-13 22:06:30 +00:00
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{
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1997-04-17 06:05:19 +00:00
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1995-10-13 22:06:30 +00:00
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}
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int
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1997-04-17 06:05:19 +00:00
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sim_write (sd, addr, buffer, size)
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SIM_DESC sd;
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1995-10-13 22:06:30 +00:00
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SIM_ADDR addr;
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unsigned char *buffer;
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int size;
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{
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int i;
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init ();
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for (i = 0; i < size; i++)
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{
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ARMul_WriteByte (state, addr+i, buffer[i]);
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}
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return size;
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}
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int
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1997-04-17 06:05:19 +00:00
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sim_read (sd, addr, buffer, size)
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SIM_DESC sd;
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1995-10-13 22:06:30 +00:00
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SIM_ADDR addr;
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unsigned char *buffer;
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int size;
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{
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int i;
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init ();
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for (i = 0; i < size; i++)
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{
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buffer[i] = ARMul_ReadByte (state, addr + i);
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}
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return size;
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}
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1997-04-17 06:05:19 +00:00
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int
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sim_trace (sd)
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SIM_DESC sd;
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1995-10-13 22:06:30 +00:00
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{
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1997-04-17 06:05:19 +00:00
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(*sim_callback->printf_filtered) (sim_callback, "This simulator does not support tracing\n");
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return 1;
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1995-10-13 22:06:30 +00:00
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}
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1997-08-25 23:14:25 +00:00
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int
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sim_stop (sd)
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SIM_DESC sd;
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{
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return 0;
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}
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1995-10-13 22:06:30 +00:00
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void
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1997-04-17 06:05:19 +00:00
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sim_resume (sd, step, siggnal)
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SIM_DESC sd;
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1995-10-13 22:06:30 +00:00
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int step, siggnal;
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{
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1997-04-17 06:05:19 +00:00
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state->EndCondition = 0;
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1995-10-13 22:06:30 +00:00
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if (step)
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{
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1997-04-17 06:05:19 +00:00
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state->Reg[15] = ARMul_DoInstr (state);
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if (state->EndCondition == 0)
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state->EndCondition = RDIError_BreakpointReached;
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1995-10-13 22:06:30 +00:00
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}
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else
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{
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1997-04-17 06:05:19 +00:00
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state->Reg[15] = ARMul_DoProg (state);
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1995-10-13 22:06:30 +00:00
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}
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1997-04-17 06:05:19 +00:00
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FLUSHPIPE;
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1995-10-13 22:06:30 +00:00
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}
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1997-04-17 09:41:11 +00:00
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SIM_RC
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1997-10-22 05:26:27 +00:00
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sim_create_inferior (sd, abfd, argv, env)
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1997-04-17 06:05:19 +00:00
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SIM_DESC sd;
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1997-10-22 05:26:27 +00:00
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struct _bfd *abfd;
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1995-10-13 22:06:30 +00:00
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char **argv;
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char **env;
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{
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1997-10-30 21:52:16 +00:00
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int argvlen=0;
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char **arg;
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#if 1 /* JGS */
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/* We explicitly select a processor capable of supporting the ARM
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32bit mode, and then we force the simulated CPU into the 32bit
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User mode: */
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ARMul_SelectProcessor(state, ARM600);
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ARMul_SetCPSR(state, USER32MODE);
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#endif
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if (argv != NULL)
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{
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/*
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** Set up the command line (by laboriously stringing together the
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** environment carefully picked apart by our caller...)
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*/
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/* Free any old stuff */
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if (state->CommandLine != NULL)
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{
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free(state->CommandLine);
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state->CommandLine = NULL;
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}
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/* See how much we need */
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for (arg = argv; *arg != NULL; arg++)
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argvlen += strlen(*arg)+1;
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/* allocate it... */
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state->CommandLine = malloc(argvlen+1);
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if (state->CommandLine != NULL)
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{
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arg = argv;
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state->CommandLine[0]='\0';
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for (arg = argv; *arg != NULL; arg++)
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{
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strcat(state->CommandLine, *arg);
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strcat(state->CommandLine, " ");
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}
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}
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}
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if (env != NULL)
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{
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/* Now see if there's a MEMSIZE spec in the environment */
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while (*env)
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{
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if (strncmp(*env, "MEMSIZE=", sizeof("MEMSIZE=")-1)==0)
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{
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unsigned long top_of_memory;
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char *end_of_num;
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/* Set up memory limit */
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state->MemSize = strtoul(*env + sizeof("MEMSIZE=")-1, &end_of_num, 0);
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}
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env++;
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}
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}
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1997-04-17 09:41:11 +00:00
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return SIM_RC_OK;
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1995-10-13 22:06:30 +00:00
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}
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void
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1997-04-17 06:05:19 +00:00
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sim_info (sd, verbose)
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SIM_DESC sd;
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1995-10-13 22:06:30 +00:00
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int verbose;
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{
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}
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1997-04-17 06:05:19 +00:00
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static int
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1995-10-13 22:06:30 +00:00
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frommem (state, memory)
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struct ARMul_State *state;
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unsigned char *memory;
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{
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if (state->bigendSig == HIGH)
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{
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return (memory[0] << 24)
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| (memory[1] << 16)
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| (memory[2] << 8)
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| (memory[3] << 0);
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}
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else
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{
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return (memory[3] << 24)
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| (memory[2] << 16)
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| (memory[1] << 8)
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| (memory[0] << 0);
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}
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}
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1997-04-17 06:05:19 +00:00
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static void
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1995-10-13 22:06:30 +00:00
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tomem (state, memory, val)
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struct ARMul_State *state;
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unsigned char *memory;
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int val;
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{
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if (state->bigendSig == HIGH)
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{
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memory[0] = val >> 24;
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memory[1] = val >> 16;
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memory[2] = val >> 8;
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memory[3] = val >> 0;
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}
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else
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{
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memory[3] = val >> 24;
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memory[2] = val >> 16;
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memory[1] = val >> 8;
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memory[0] = val >> 0;
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}
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}
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void
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1997-04-17 06:05:19 +00:00
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sim_store_register (sd, rn, memory)
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SIM_DESC sd;
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1995-10-13 22:06:30 +00:00
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int rn;
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unsigned char *memory;
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{
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init ();
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ARMul_SetReg(state, state->Mode, rn, frommem (state, memory));
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}
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void
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1997-04-17 06:05:19 +00:00
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sim_fetch_register (sd, rn, memory)
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SIM_DESC sd;
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1995-10-13 22:06:30 +00:00
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int rn;
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unsigned char *memory;
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{
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init ();
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tomem (state, memory, ARMul_GetReg(state, state->Mode, rn));
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}
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1997-04-17 06:05:19 +00:00
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SIM_DESC
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1997-08-25 23:14:25 +00:00
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sim_open (kind, ptr, abfd, argv)
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1997-04-17 06:05:19 +00:00
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SIM_OPEN_KIND kind;
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1997-08-25 23:14:25 +00:00
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host_callback *ptr;
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struct _bfd *abfd;
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1997-04-17 06:05:19 +00:00
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char **argv;
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1995-10-13 22:06:30 +00:00
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{
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1997-04-17 09:41:11 +00:00
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sim_kind = kind;
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myname = argv[0];
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1997-08-25 23:14:25 +00:00
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sim_callback = ptr;
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1997-04-17 06:05:19 +00:00
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return (SIM_DESC) 1;
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1995-10-13 22:06:30 +00:00
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}
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void
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1997-04-17 06:05:19 +00:00
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sim_close (sd, quitting)
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SIM_DESC sd;
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1995-10-13 22:06:30 +00:00
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int quitting;
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{
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/* nothing to do */
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}
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1997-04-17 09:41:11 +00:00
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SIM_RC
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sim_load (sd, prog, abfd, from_tty)
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1997-04-17 06:05:19 +00:00
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SIM_DESC sd;
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1995-10-13 22:06:30 +00:00
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char *prog;
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1997-04-17 09:41:11 +00:00
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bfd *abfd;
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1995-10-13 22:06:30 +00:00
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int from_tty;
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{
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1997-04-17 09:41:11 +00:00
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extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
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bfd *prog_bfd;
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prog_bfd = sim_load_file (sd, myname, sim_callback, prog, abfd,
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1997-10-22 05:26:27 +00:00
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sim_kind == SIM_OPEN_DEBUG,
|
|
|
|
0, sim_write);
|
1997-04-17 09:41:11 +00:00
|
|
|
if (prog_bfd == NULL)
|
|
|
|
return SIM_RC_FAIL;
|
|
|
|
if (abfd == NULL)
|
|
|
|
bfd_close (prog_bfd);
|
|
|
|
return SIM_RC_OK;
|
1995-10-13 22:06:30 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1997-04-17 06:05:19 +00:00
|
|
|
sim_stop_reason (sd, reason, sigrc)
|
|
|
|
SIM_DESC sd;
|
1995-10-13 22:06:30 +00:00
|
|
|
enum sim_stop *reason;
|
|
|
|
int *sigrc;
|
|
|
|
{
|
1997-04-17 06:05:19 +00:00
|
|
|
if (state->EndCondition == 0)
|
|
|
|
{
|
|
|
|
*reason = sim_exited;
|
|
|
|
*sigrc = state->Reg[0] & 255;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
*reason = sim_stopped;
|
|
|
|
if (state->EndCondition == RDIError_BreakpointReached)
|
|
|
|
*sigrc = SIGTRAP;
|
|
|
|
else
|
|
|
|
*sigrc = 0;
|
|
|
|
}
|
1995-10-13 22:06:30 +00:00
|
|
|
}
|
1997-04-17 06:05:19 +00:00
|
|
|
|
1995-10-13 22:06:30 +00:00
|
|
|
void
|
1997-04-17 06:05:19 +00:00
|
|
|
sim_do_command (sd, cmd)
|
|
|
|
SIM_DESC sd;
|
1995-10-13 22:06:30 +00:00
|
|
|
char *cmd;
|
|
|
|
{
|
1997-04-17 06:05:19 +00:00
|
|
|
(*sim_callback->printf_filtered) (sim_callback, "This simulator does not accept any commands.\n");
|
1995-10-13 22:06:30 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
1997-08-25 23:14:25 +00:00
|
|
|
sim_set_callbacks (ptr)
|
1997-04-17 06:05:19 +00:00
|
|
|
host_callback *ptr;
|
1995-10-13 22:06:30 +00:00
|
|
|
{
|
1997-04-17 06:05:19 +00:00
|
|
|
sim_callback = ptr;
|
1995-10-13 22:06:30 +00:00
|
|
|
}
|