2004-04-22 21:13:06 +00:00
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/* Target-dependent code for OpenBSD/powerpc.
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2005-04-09 11:39:38 +00:00
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Copyright 2004, 2005 Free Software Foundation, Inc.
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2004-04-22 21:13:06 +00:00
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "arch-utils.h"
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#include "osabi.h"
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#include "regcache.h"
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#include "regset.h"
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2005-04-09 11:39:38 +00:00
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#include "trad-frame.h"
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#include "tramp-frame.h"
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2004-04-22 21:13:06 +00:00
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2005-04-09 11:39:38 +00:00
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#include "gdb_assert.h"
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2004-04-22 21:13:06 +00:00
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#include "gdb_string.h"
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#include "ppc-tdep.h"
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#include "ppcobsd-tdep.h"
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#include "solib-svr4.h"
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/* Register offsets from <machine/reg.h>. */
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struct ppc_reg_offsets ppcobsd_reg_offsets;
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/* Core file support. */
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/* Supply register REGNUM in the general-purpose register set REGSET
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from the buffer specified by GREGS and LEN to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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void
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ppcobsd_supply_gregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *gregs, size_t len)
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{
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* ppc-tdep.h (struct gdbarch_tdep): Change definition of
ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this
processor variant lacks those registers.
(ppc_floating_point_unit_p): Change description to make it clear
that this returns info about the ISA, not the ABI.
* rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to
return true or false by checking tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum. The original code replicated the BFD
arch/mach switching done in rs6000_gdbarch_init; it's better to
keep that logic there, and just check the results here.
(rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum to -1 to indicate that we have no
floating-point registers.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_store_return_value): Assert that we have floating-point
registers.
(rs6000_dwarf2_stab_reg_to_regnum): Add FIXME.
(rs6000_frame_cache): Don't note the locations at which
floating-point registers were saved if we have no fprs.
* aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP
registers.
(fetch_regs_user_thread, fetch_regs_kernel_thread)
(store_regs_user_thread, store_regs_kernel_thread): Only call
supply_fprs / fill_fprs if we actually have floating-point
registers.
(special_register_p): Check ppc_fpscr_regnum before matching
against it.
(supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't
supply / collect fpscr if we don't have it.
* ppc-bdm.c: #include "gdb_assert.h".
(bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we
have floating-point registers, since I can't test this code on
FP-free systems to adapt it.
* ppc-linux-nat.c (ppc_register_u_addr): Don't match against the
fpscr and floating point register numbers if they don't exist.
(fetch_register): Assert that we have floating-point registers
before we reach the code that handles them.
(store_register): Same. And use tdep instead of calling
gdbarch_tdep again.
(fill_fpregset): Don't try to collect FP registers and fpscr if we
don't have them.
(ppc_linux_sigtramp_cache): Don't record the saved locations of
fprs and fpscr if we don't have them.
(ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we
don't have them.
* ppcnbsd-nat.c: #include "gdb_assert.h".
(getfpregs_supplies): Assert that we have floating-point registers.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same.
* ppcobsd-tdep.c: #include "gdb_assert.h".
(ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we
have floating-point registers.
* rs6000-nat.c (regmap): Don't match against the fpscr and
floating point register numbers if they don't exist.
(fetch_inferior_registers, store_inferior_registers,
fetch_core_registers): Only fetch / store / supply the
floating-point registers and the fpscr if we have them.
* Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o)
(ppcobsd-tdep.o): Update dependencies.
2004-05-11 04:55:32 +00:00
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/* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
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point registers. Traditionally, GDB's register set has still
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listed the floating point registers for such machines, so this
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code is harmless. However, the new E500 port actually omits the
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floating point registers entirely from the register set --- they
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don't even have register numbers assigned to them.
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It's not clear to me how best to update this code, so this assert
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will alert the first person to encounter the OpenBSD/E500
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combination to the problem. */
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gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
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2004-04-22 21:13:06 +00:00
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ppc_supply_gregset (regset, regcache, regnum, gregs, len);
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ppc_supply_fpregset (regset, regcache, regnum, gregs, len);
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}
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/* Collect register REGNUM in the general-purpose register set
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REGSET. from register cache REGCACHE into the buffer specified by
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GREGS and LEN. If REGNUM is -1, do this for all registers in
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REGSET. */
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void
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ppcobsd_collect_gregset (const struct regset *regset,
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const struct regcache *regcache, int regnum,
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void *gregs, size_t len)
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{
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* ppc-tdep.h (struct gdbarch_tdep): Change definition of
ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this
processor variant lacks those registers.
(ppc_floating_point_unit_p): Change description to make it clear
that this returns info about the ISA, not the ABI.
* rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to
return true or false by checking tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum. The original code replicated the BFD
arch/mach switching done in rs6000_gdbarch_init; it's better to
keep that logic there, and just check the results here.
(rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum to -1 to indicate that we have no
floating-point registers.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_store_return_value): Assert that we have floating-point
registers.
(rs6000_dwarf2_stab_reg_to_regnum): Add FIXME.
(rs6000_frame_cache): Don't note the locations at which
floating-point registers were saved if we have no fprs.
* aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP
registers.
(fetch_regs_user_thread, fetch_regs_kernel_thread)
(store_regs_user_thread, store_regs_kernel_thread): Only call
supply_fprs / fill_fprs if we actually have floating-point
registers.
(special_register_p): Check ppc_fpscr_regnum before matching
against it.
(supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't
supply / collect fpscr if we don't have it.
* ppc-bdm.c: #include "gdb_assert.h".
(bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we
have floating-point registers, since I can't test this code on
FP-free systems to adapt it.
* ppc-linux-nat.c (ppc_register_u_addr): Don't match against the
fpscr and floating point register numbers if they don't exist.
(fetch_register): Assert that we have floating-point registers
before we reach the code that handles them.
(store_register): Same. And use tdep instead of calling
gdbarch_tdep again.
(fill_fpregset): Don't try to collect FP registers and fpscr if we
don't have them.
(ppc_linux_sigtramp_cache): Don't record the saved locations of
fprs and fpscr if we don't have them.
(ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we
don't have them.
* ppcnbsd-nat.c: #include "gdb_assert.h".
(getfpregs_supplies): Assert that we have floating-point registers.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same.
* ppcobsd-tdep.c: #include "gdb_assert.h".
(ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we
have floating-point registers.
* rs6000-nat.c (regmap): Don't match against the fpscr and
floating point register numbers if they don't exist.
(fetch_inferior_registers, store_inferior_registers,
fetch_core_registers): Only fetch / store / supply the
floating-point registers and the fpscr if we have them.
* Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o)
(ppcobsd-tdep.o): Update dependencies.
2004-05-11 04:55:32 +00:00
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/* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
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point registers. Traditionally, GDB's register set has still
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listed the floating point registers for such machines, so this
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code is harmless. However, the new E500 port actually omits the
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floating point registers entirely from the register set --- they
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don't even have register numbers assigned to them.
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It's not clear to me how best to update this code, so this assert
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will alert the first person to encounter the OpenBSD/E500
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combination to the problem. */
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gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
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2004-04-22 21:13:06 +00:00
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ppc_collect_gregset (regset, regcache, regnum, gregs, len);
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ppc_collect_fpregset (regset, regcache, regnum, gregs, len);
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}
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/* OpenBS/powerpc register set. */
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struct regset ppcobsd_gregset =
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{
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&ppcobsd_reg_offsets,
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ppcobsd_supply_gregset
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};
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/* Return the appropriate register set for the core section identified
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by SECT_NAME and SECT_SIZE. */
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static const struct regset *
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ppcobsd_regset_from_core_section (struct gdbarch *gdbarch,
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const char *sect_name, size_t sect_size)
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{
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if (strcmp (sect_name, ".reg") == 0 && sect_size >= 412)
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return &ppcobsd_gregset;
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return NULL;
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}
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2005-04-09 11:39:38 +00:00
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/* Signal trampolines. */
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static void
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ppcobsd_sigtramp_cache_init (const struct tramp_frame *self,
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struct frame_info *next_frame,
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struct trad_frame_cache *this_cache,
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CORE_ADDR func)
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{
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struct gdbarch *gdbarch = get_frame_arch (next_frame);
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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CORE_ADDR addr, base;
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int i;
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base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
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addr = base + 0x18 + 2 * tdep->wordsize;
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for (i = 0; i < ppc_num_gprs; i++, addr += tdep->wordsize)
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{
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int regnum = i + tdep->ppc_gp0_regnum;
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trad_frame_set_reg_addr (this_cache, regnum, addr);
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}
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trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, addr);
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addr += tdep->wordsize;
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trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, addr);
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addr += tdep->wordsize;
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trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, addr);
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addr += tdep->wordsize;
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trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, addr);
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addr += tdep->wordsize;
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trad_frame_set_reg_addr (this_cache, PC_REGNUM, addr); /* SRR0? */
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addr += tdep->wordsize;
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/* Construct the frame ID using the function start. */
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trad_frame_set_id (this_cache, frame_id_build (base, func));
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}
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static const struct tramp_frame ppcobsd_sigtramp =
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{
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SIGTRAMP_FRAME,
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4,
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{
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{ 0x3821fff0, -1 }, /* add r1,r1,-16 */
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{ 0x4e800021, -1 }, /* blrl */
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{ 0x38610018, -1 }, /* addi r3,r1,24 */
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{ 0x38000067, -1 }, /* li r0,103 */
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{ 0x44000002, -1 }, /* sc */
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{ 0x38000001, -1 }, /* li r0,1 */
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{ 0x44000002, -1 }, /* sc */
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{ TRAMP_SENTINEL_INSN, -1 }
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},
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ppcobsd_sigtramp_cache_init
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};
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2004-04-22 21:13:06 +00:00
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static void
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ppcobsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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/* OpenBSD uses SVR4-style shared libraries. */
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set_solib_svr4_fetch_link_map_offsets
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(gdbarch, svr4_ilp32_fetch_link_map_offsets);
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set_gdbarch_regset_from_core_section
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(gdbarch, ppcobsd_regset_from_core_section);
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2005-04-09 11:39:38 +00:00
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tramp_frame_prepend_unwinder (gdbarch, &ppcobsd_sigtramp);
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2004-04-22 21:13:06 +00:00
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}
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/* OpenBSD uses uses the traditional NetBSD core file format, even for
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ports that use ELF. */
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#define GDB_OSABI_NETBSD_CORE GDB_OSABI_OPENBSD_ELF
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static enum gdb_osabi
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ppcobsd_core_osabi_sniffer (bfd *abfd)
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{
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if (strcmp (bfd_get_target (abfd), "netbsd-core") == 0)
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return GDB_OSABI_NETBSD_CORE;
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return GDB_OSABI_UNKNOWN;
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}
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/* Provide a prototype to silence -Wmissing-prototypes. */
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void _initialize_ppcobsd_tdep (void);
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void
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_initialize_ppcobsd_tdep (void)
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{
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/* BFD doesn't set a flavour for NetBSD style a.out core files. */
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gdbarch_register_osabi_sniffer (bfd_arch_powerpc, bfd_target_unknown_flavour,
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ppcobsd_core_osabi_sniffer);
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gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_OPENBSD_ELF,
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ppcobsd_init_abi);
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/* Avoid initializing the register offsets again if they were
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already initailized by ppcobsd-nat.c. */
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if (ppcobsd_reg_offsets.pc_offset == 0)
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{
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/* General-purpose registers. */
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ppcobsd_reg_offsets.r0_offset = 0;
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ppcobsd_reg_offsets.pc_offset = 384;
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ppcobsd_reg_offsets.ps_offset = 388;
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ppcobsd_reg_offsets.cr_offset = 392;
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ppcobsd_reg_offsets.lr_offset = 396;
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ppcobsd_reg_offsets.ctr_offset = 400;
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ppcobsd_reg_offsets.xer_offset = 404;
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ppcobsd_reg_offsets.mq_offset = 408;
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/* Floating-point registers. */
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ppcobsd_reg_offsets.f0_offset = 128;
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ppcobsd_reg_offsets.fpscr_offset = -1;
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/* AltiVec registers. */
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ppcobsd_reg_offsets.vr0_offset = 0;
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ppcobsd_reg_offsets.vscr_offset = 512;
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ppcobsd_reg_offsets.vrsave_offset = 520;
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}
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}
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