darling-gdb/gdb/ia64-tdep.h

206 lines
8.5 KiB
C
Raw Normal View History

/* Target-dependent code for the ia64.
Copyright (C) 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef IA64_TDEP_H
#define IA64_TDEP_H
/* Register numbers of various important registers. */
/* General registers; there are 128 of these 64 bit wide registers.
The first 32 are static and the last 96 are stacked. */
#define IA64_GR0_REGNUM 0
#define IA64_GR1_REGNUM (IA64_GR0_REGNUM + 1)
#define IA64_GR2_REGNUM (IA64_GR0_REGNUM + 2)
#define IA64_GR3_REGNUM (IA64_GR0_REGNUM + 3)
#define IA64_GR4_REGNUM (IA64_GR0_REGNUM + 4)
#define IA64_GR5_REGNUM (IA64_GR0_REGNUM + 5)
#define IA64_GR6_REGNUM (IA64_GR0_REGNUM + 6)
#define IA64_GR7_REGNUM (IA64_GR0_REGNUM + 7)
#define IA64_GR8_REGNUM (IA64_GR0_REGNUM + 8)
#define IA64_GR9_REGNUM (IA64_GR0_REGNUM + 9)
#define IA64_GR10_REGNUM (IA64_GR0_REGNUM + 10)
#define IA64_GR11_REGNUM (IA64_GR0_REGNUM + 11)
#define IA64_GR12_REGNUM (IA64_GR0_REGNUM + 12)
#define IA64_GR31_REGNUM (IA64_GR0_REGNUM + 31)
#define IA64_GR32_REGNUM (IA64_GR0_REGNUM + 32)
#define IA64_GR127_REGNUM (IA64_GR0_REGNUM + 127)
/* Floating point registers; 128 82-bit wide registers. */
#define IA64_FR0_REGNUM 128
#define IA64_FR1_REGNUM (IA64_FR0_REGNUM + 1)
#define IA64_FR2_REGNUM (IA64_FR0_REGNUM + 2)
#define IA64_FR8_REGNUM (IA64_FR0_REGNUM + 8)
#define IA64_FR9_REGNUM (IA64_FR0_REGNUM + 9)
#define IA64_FR10_REGNUM (IA64_FR0_REGNUM + 10)
#define IA64_FR11_REGNUM (IA64_FR0_REGNUM + 11)
#define IA64_FR12_REGNUM (IA64_FR0_REGNUM + 12)
#define IA64_FR13_REGNUM (IA64_FR0_REGNUM + 13)
#define IA64_FR14_REGNUM (IA64_FR0_REGNUM + 14)
#define IA64_FR15_REGNUM (IA64_FR0_REGNUM + 15)
#define IA64_FR16_REGNUM (IA64_FR0_REGNUM + 16)
#define IA64_FR31_REGNUM (IA64_FR0_REGNUM + 31)
#define IA64_FR32_REGNUM (IA64_FR0_REGNUM + 32)
#define IA64_FR127_REGNUM (IA64_FR0_REGNUM + 127)
/* Predicate registers; There are 64 of these one bit registers. It'd
be more convenient (implementation-wise) to use a single 64 bit
word with all of these register in them. Note that there's also a
IA64_PR_REGNUM below which contains all the bits and is used for
communicating the actual values to the target. */
#define IA64_PR0_REGNUM 256
#define IA64_PR1_REGNUM (IA64_PR0_REGNUM + 1)
#define IA64_PR2_REGNUM (IA64_PR0_REGNUM + 2)
#define IA64_PR3_REGNUM (IA64_PR0_REGNUM + 3)
#define IA64_PR4_REGNUM (IA64_PR0_REGNUM + 4)
#define IA64_PR5_REGNUM (IA64_PR0_REGNUM + 5)
#define IA64_PR6_REGNUM (IA64_PR0_REGNUM + 6)
#define IA64_PR7_REGNUM (IA64_PR0_REGNUM + 7)
#define IA64_PR8_REGNUM (IA64_PR0_REGNUM + 8)
#define IA64_PR9_REGNUM (IA64_PR0_REGNUM + 9)
#define IA64_PR10_REGNUM (IA64_PR0_REGNUM + 10)
#define IA64_PR11_REGNUM (IA64_PR0_REGNUM + 11)
#define IA64_PR12_REGNUM (IA64_PR0_REGNUM + 12)
#define IA64_PR13_REGNUM (IA64_PR0_REGNUM + 13)
#define IA64_PR14_REGNUM (IA64_PR0_REGNUM + 14)
#define IA64_PR15_REGNUM (IA64_PR0_REGNUM + 15)
#define IA64_PR16_REGNUM (IA64_PR0_REGNUM + 16)
#define IA64_PR17_REGNUM (IA64_PR0_REGNUM + 17)
#define IA64_PR18_REGNUM (IA64_PR0_REGNUM + 18)
#define IA64_PR19_REGNUM (IA64_PR0_REGNUM + 19)
#define IA64_PR20_REGNUM (IA64_PR0_REGNUM + 20)
#define IA64_PR21_REGNUM (IA64_PR0_REGNUM + 21)
#define IA64_PR22_REGNUM (IA64_PR0_REGNUM + 22)
#define IA64_PR23_REGNUM (IA64_PR0_REGNUM + 23)
#define IA64_PR24_REGNUM (IA64_PR0_REGNUM + 24)
#define IA64_PR25_REGNUM (IA64_PR0_REGNUM + 25)
#define IA64_PR26_REGNUM (IA64_PR0_REGNUM + 26)
#define IA64_PR27_REGNUM (IA64_PR0_REGNUM + 27)
#define IA64_PR28_REGNUM (IA64_PR0_REGNUM + 28)
#define IA64_PR29_REGNUM (IA64_PR0_REGNUM + 29)
#define IA64_PR30_REGNUM (IA64_PR0_REGNUM + 30)
#define IA64_PR31_REGNUM (IA64_PR0_REGNUM + 31)
#define IA64_PR32_REGNUM (IA64_PR0_REGNUM + 32)
#define IA64_PR33_REGNUM (IA64_PR0_REGNUM + 33)
#define IA64_PR34_REGNUM (IA64_PR0_REGNUM + 34)
#define IA64_PR35_REGNUM (IA64_PR0_REGNUM + 35)
#define IA64_PR36_REGNUM (IA64_PR0_REGNUM + 36)
#define IA64_PR37_REGNUM (IA64_PR0_REGNUM + 37)
#define IA64_PR38_REGNUM (IA64_PR0_REGNUM + 38)
#define IA64_PR39_REGNUM (IA64_PR0_REGNUM + 39)
#define IA64_PR40_REGNUM (IA64_PR0_REGNUM + 40)
#define IA64_PR41_REGNUM (IA64_PR0_REGNUM + 41)
#define IA64_PR42_REGNUM (IA64_PR0_REGNUM + 42)
#define IA64_PR43_REGNUM (IA64_PR0_REGNUM + 43)
#define IA64_PR44_REGNUM (IA64_PR0_REGNUM + 44)
#define IA64_PR45_REGNUM (IA64_PR0_REGNUM + 45)
#define IA64_PR46_REGNUM (IA64_PR0_REGNUM + 46)
#define IA64_PR47_REGNUM (IA64_PR0_REGNUM + 47)
#define IA64_PR48_REGNUM (IA64_PR0_REGNUM + 48)
#define IA64_PR49_REGNUM (IA64_PR0_REGNUM + 49)
#define IA64_PR50_REGNUM (IA64_PR0_REGNUM + 50)
#define IA64_PR51_REGNUM (IA64_PR0_REGNUM + 51)
#define IA64_PR52_REGNUM (IA64_PR0_REGNUM + 52)
#define IA64_PR53_REGNUM (IA64_PR0_REGNUM + 53)
#define IA64_PR54_REGNUM (IA64_PR0_REGNUM + 54)
#define IA64_PR55_REGNUM (IA64_PR0_REGNUM + 55)
#define IA64_PR56_REGNUM (IA64_PR0_REGNUM + 56)
#define IA64_PR57_REGNUM (IA64_PR0_REGNUM + 57)
#define IA64_PR58_REGNUM (IA64_PR0_REGNUM + 58)
#define IA64_PR59_REGNUM (IA64_PR0_REGNUM + 59)
#define IA64_PR60_REGNUM (IA64_PR0_REGNUM + 60)
#define IA64_PR61_REGNUM (IA64_PR0_REGNUM + 61)
#define IA64_PR62_REGNUM (IA64_PR0_REGNUM + 62)
#define IA64_PR63_REGNUM (IA64_PR0_REGNUM + 63)
/* Branch registers: 8 64-bit registers for holding branch targets. */
#define IA64_BR0_REGNUM 320
#define IA64_BR1_REGNUM (IA64_BR0_REGNUM + 1)
#define IA64_BR2_REGNUM (IA64_BR0_REGNUM + 2)
#define IA64_BR3_REGNUM (IA64_BR0_REGNUM + 3)
#define IA64_BR4_REGNUM (IA64_BR0_REGNUM + 4)
#define IA64_BR5_REGNUM (IA64_BR0_REGNUM + 5)
#define IA64_BR6_REGNUM (IA64_BR0_REGNUM + 6)
#define IA64_BR7_REGNUM (IA64_BR0_REGNUM + 7)
/* Virtual frame pointer; this matches IA64_FRAME_POINTER_REGNUM in
gcc/config/ia64/ia64.h. */
#define IA64_VFP_REGNUM 328
/* Virtual return address pointer; this matches
IA64_RETURN_ADDRESS_POINTER_REGNUM in gcc/config/ia64/ia64.h. */
#define IA64_VRAP_REGNUM 329
/* Predicate registers: There are 64 of these 1-bit registers. We
define a single register which is used to communicate these values
to/from the target. We will somehow contrive to make it appear
that IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */
#define IA64_PR_REGNUM 330
/* Instruction pointer: 64 bits wide. */
#define IA64_IP_REGNUM 331
/* Process Status Register. */
#define IA64_PSR_REGNUM 332
/* Current Frame Marker (raw form may be the cr.ifs). */
#define IA64_CFM_REGNUM 333
/* Application registers; 128 64-bit wide registers possible, but some
of them are reserved. */
#define IA64_AR0_REGNUM 334
#define IA64_KR0_REGNUM (IA64_AR0_REGNUM + 0)
#define IA64_KR7_REGNUM (IA64_KR0_REGNUM + 7)
#define IA64_RSC_REGNUM (IA64_AR0_REGNUM + 16)
#define IA64_BSP_REGNUM (IA64_AR0_REGNUM + 17)
#define IA64_BSPSTORE_REGNUM (IA64_AR0_REGNUM + 18)
#define IA64_RNAT_REGNUM (IA64_AR0_REGNUM + 19)
#define IA64_FCR_REGNUM (IA64_AR0_REGNUM + 21)
#define IA64_EFLAG_REGNUM (IA64_AR0_REGNUM + 24)
#define IA64_CSD_REGNUM (IA64_AR0_REGNUM + 25)
#define IA64_SSD_REGNUM (IA64_AR0_REGNUM + 26)
#define IA64_CFLG_REGNUM (IA64_AR0_REGNUM + 27)
#define IA64_FSR_REGNUM (IA64_AR0_REGNUM + 28)
#define IA64_FIR_REGNUM (IA64_AR0_REGNUM + 29)
#define IA64_FDR_REGNUM (IA64_AR0_REGNUM + 30)
#define IA64_CCV_REGNUM (IA64_AR0_REGNUM + 32)
#define IA64_UNAT_REGNUM (IA64_AR0_REGNUM + 36)
#define IA64_FPSR_REGNUM (IA64_AR0_REGNUM + 40)
#define IA64_ITC_REGNUM (IA64_AR0_REGNUM + 44)
#define IA64_PFS_REGNUM (IA64_AR0_REGNUM + 64)
#define IA64_LC_REGNUM (IA64_AR0_REGNUM + 65)
#define IA64_EC_REGNUM (IA64_AR0_REGNUM + 66)
/* NAT (Not A Thing) Bits for the general registers; there are 128 of
these. */
#define IA64_NAT0_REGNUM 462
#define IA64_NAT31_REGNUM (IA64_NAT0_REGNUM + 31)
#define IA64_NAT32_REGNUM (IA64_NAT0_REGNUM + 32)
#define IA64_NAT127_REGNUM (IA64_NAT0_REGNUM + 127)
struct gdbarch_tdep
{
CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int);
* arch-utils.c (legacy_pc_in_sigtramp): Remove. * arch-utils.h (legacy_pc_in_sigtramp): Remove. * config/ia64/linux.mt (DEPRECATED_TM_FILE): Remove. * config/ia64/tm-linux.h: Remove file. * ia64-tdep.h (struct gdbarch_tdep): Add pc_in_sigtramp callback. * ia64-tdep.c (ia64_sigtramp_frame_sniffer): Use it instead of legacy_pc_in_sigtramp. (ia64_gdbarch_init): Initialize tdep->pc_in_sigtramp. * ia64-linux-tdep.c (ia64_linux_pc_in_sigtramp): Make static. Remove func_name argument. (ia64_linux_init_abi): Install it as tdep->pc_in_sigtramp. * infrun.c (HAVE_STEPPABLE_WATCHPOINT): Do not redefine. * target.c (update_current_target): Add to_have_steppable_watchpoint. * target.h (struct target_ops): Add to_have_steppable_watchpoint. (HAVE_STEPPABLE_WATCHPOINT): Define. * config/ia64/linux.mh (NATDEPFILES): Remove core-aout.o. * config/ia64/nm-linux.h (KERNEL_U_ADDR, U_REGS_OFFSET, CANNOT_FETCH_REGISTER, CANNOT_STORE_REGISTER, TARGET_CAN_USE_HARDWARE_WATCHPOINT, HAVE_STEPPABLE_WATCHPOINT, STOPPED_BY_WATCHPOINT, target_stopped_data_address, target_insert_watchpoint, target_remove_watchpoint): Remove. (FETCH_INFERIOR_REGISTERS): Define. * ia64-linux-nat.c (ia64_register_addr): Make static. (ia64_cannot_fetch_register, ia64_cannot_store_register): Likewise. (ia64_linux_insert_watchpoint): Make static. Remove ptid_p argument. (ia64_linux_remove_watchpoint): Likewise. Add type argument. (ia64_linux_stopped_data_address): Make static. Add target_ops. (ia64_linux_stopped_by_watchpoint): Make static. (ia64_linux_can_use_hw_breakpoint): New function. (ia64_linux_fetch_register, ia64_linux_fetch_registers): Likewise. (ia64_linux_store_register, ia64_linux_store_registers): Likewise. (_initialize_ia64_linux_nat): Install register and watchpoint ops.
2007-03-28 18:56:07 +00:00
int (*pc_in_sigtramp) (CORE_ADDR);
};
* gdbarch.sh (read_pc): Add REGCACHE argument. Remove PTID argument. (write_pc): Likewise. Remove default implementation, add predicate. * gdbarch.c, gdbarch.h: Regenerate. * regcache.c (read_pc_pid): Use current regcache instead of calling read_register_pid. (write_pc_pid): Check gdbarch_write_pc predicate, implement default case inline. (generic_target_write_pc): Remove. * inferior.h (generic_target_write_pc): Remove. * frv-tdep.c (frv_gdbarch_init): Do not install it. * m68hc11-tdep.c (m68hc11_gdbarch_init): Likewise. * rs6000-tdep.c (rs6000_gdbarch_init): Likewise. * sh64-tdep.c (sh64_gdbarch_init): Likewise. * sh-tdep.c (sh_gdbarch_init): Likewise. * xstormy16-tdep.c (xstormy16_gdbarch_init): Likewise. * avr-tdep.c (avr_read_pc): Add REGCACHE argument. Remove PTID argument. Use REGCACHE instead of calling read_register_pid. * hppa-hpux-tdep.c (hppa_hpux_read_pc): Likewise. * hppa-tdep.c (hppa_read_pc): Likewise. * hppa-tdep.h (hppa_read_pc): Likewise. * ia64-tdep.c (ia64_read_pc): Likewise. * m32r-tdep.c (m32r_read_pc): Likewise. * mep-tdep.c (mep_read_pc): Likewise. * mn10300-tdep.c (mn10300_read_pc): Likewise. * spu-tdep.c (spu_read_pc): Likewise. * arm-tdep.c (arm_write_pc): Add REGCACHE argument. Remove PTID argument. Use REGCACHE instead of calling write_register_pid. * avr-tdep.c (avr_write_pc): Likewise. * hppa-hpux-tdep.c (hppa_hpux_write_pc): Likewise. * hppa-tdep.c (hppa_write_pc): Likewise. * hppa-tdep.h (hppa_write_pc): Likewise. * i386-linux-tdep.c (i386_linux_write_pc): Likewise. * amd64-linux-tdep.c (amd64_linux_write_pc): Likewise. * ia64-linux-tdep.c (ia64_linux_write_pc): Likewise. * ia64-tdep.c (ia64_write_pc): Likewise. * ia64-tdep.h (ia64_write_pc): Likewise. * m32r-tdep.c (m32r_write_pc): Likewise. * m88k-tdep.c (m88k_write_pc): Likewise. * mep-tdep.c (mep_write_pc): Likewise. * mips-tdep.c (mips_write_pc): Likewise. * mips-linux-tdep.c (mips_linux_write_pc): Likewise. * mn10300-tdep.c (mn10300_write_pc): Likewise. * sparc-tdep.c (sparc_write_pc): Likewise. * spu-tdep.c (spu_write_pc): Likewise. * mips-tdep.c (read_signed_register): Remove. (read_signed_register_pid): Likewise. (mips_read_pc): Add REGCACHE argument. Remove PTID argument. Use REGCACHE instead of calling read_signed_register_pid.
2007-06-15 22:44:56 +00:00
extern void ia64_write_pc (struct regcache *, CORE_ADDR);
#endif /* ia64-tdep.h */