1999-05-03 07:29:11 +00:00
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/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
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2002-02-25 03:44:56 +00:00
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Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
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2000-01-31 19:13:47 +00:00
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Free Software Foundation, Inc.
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1999-05-03 07:29:11 +00:00
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Written by Ian Lance Taylor, Cygnus Support.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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2000-09-26 07:09:19 +00:00
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02111-1307, USA. */
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1999-05-03 07:29:11 +00:00
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#include <stdio.h>
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#include "as.h"
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2001-09-19 05:33:36 +00:00
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#include "safe-ctype.h"
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1999-05-03 07:29:11 +00:00
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#include "subsegs.h"
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#include "opcode/ppc.h"
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#ifdef OBJ_ELF
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#include "elf/ppc.h"
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2000-12-12 20:05:16 +00:00
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#include "dwarf2dbg.h"
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1999-05-03 07:29:11 +00:00
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#endif
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#ifdef TE_PE
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#include "coff/pe.h"
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#endif
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/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
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/* Tell the main code what the endianness is. */
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extern int target_big_endian;
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/* Whether or not, we've set target_big_endian. */
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static int set_target_endian = 0;
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/* Whether to use user friendly register names. */
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#ifndef TARGET_REG_NAMES_P
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#ifdef TE_PE
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2002-11-30 08:39:46 +00:00
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#define TARGET_REG_NAMES_P TRUE
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1999-05-03 07:29:11 +00:00
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#else
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2002-11-30 08:39:46 +00:00
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#define TARGET_REG_NAMES_P FALSE
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1999-05-03 07:29:11 +00:00
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#endif
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#endif
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* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
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/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
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HIGHESTA. */
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/* #lo(value) denotes the least significant 16 bits of the indicated. */
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#define PPC_LO(v) ((v) & 0xffff)
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/* #hi(value) denotes bits 16 through 31 of the indicated value. */
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#define PPC_HI(v) (((v) >> 16) & 0xffff)
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/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
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the indicated value, compensating for #lo() being treated as a
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signed number. */
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2001-10-17 06:03:41 +00:00
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#define PPC_HA(v) PPC_HI ((v) + 0x8000)
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* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
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/* #higher(value) denotes bits 32 through 47 of the indicated value. */
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2002-09-04 13:21:18 +00:00
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#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
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* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
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/* #highera(value) denotes bits 32 through 47 of the indicated value,
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compensating for #lo() being treated as a signed number. */
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2001-10-17 06:03:41 +00:00
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#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
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* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
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/* #highest(value) denotes bits 48 through 63 of the indicated value. */
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2002-09-04 13:21:18 +00:00
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#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
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* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
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/* #highesta(value) denotes bits 48 through 63 of the indicated value,
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2001-10-17 06:03:41 +00:00
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compensating for #lo being treated as a signed number. */
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#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
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* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
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#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
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2002-11-30 08:39:46 +00:00
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static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
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1999-05-03 07:29:11 +00:00
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2002-11-30 08:39:46 +00:00
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static bfd_boolean register_name PARAMS ((expressionS *));
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1999-05-03 07:29:11 +00:00
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static void ppc_set_cpu PARAMS ((void));
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static unsigned long ppc_insert_operand
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PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
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offsetT val, char *file, unsigned int line));
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static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
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static void ppc_byte PARAMS ((int));
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* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
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#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
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1999-05-03 07:29:11 +00:00
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static int ppc_is_toc_sym PARAMS ((symbolS *sym));
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static void ppc_tc PARAMS ((int));
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
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static void ppc_machine PARAMS ((int));
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#endif
|
1999-05-03 07:29:11 +00:00
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#ifdef OBJ_XCOFF
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static void ppc_comm PARAMS ((int));
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static void ppc_bb PARAMS ((int));
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static void ppc_bc PARAMS ((int));
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static void ppc_bf PARAMS ((int));
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static void ppc_biei PARAMS ((int));
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static void ppc_bs PARAMS ((int));
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static void ppc_eb PARAMS ((int));
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static void ppc_ec PARAMS ((int));
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static void ppc_ef PARAMS ((int));
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static void ppc_es PARAMS ((int));
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static void ppc_csect PARAMS ((int));
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static void ppc_change_csect PARAMS ((symbolS *));
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static void ppc_function PARAMS ((int));
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static void ppc_extern PARAMS ((int));
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static void ppc_lglobl PARAMS ((int));
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static void ppc_section PARAMS ((int));
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static void ppc_named_section PARAMS ((int));
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static void ppc_stabx PARAMS ((int));
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static void ppc_rename PARAMS ((int));
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static void ppc_toc PARAMS ((int));
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static void ppc_xcoff_cons PARAMS ((int));
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static void ppc_vbyte PARAMS ((int));
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#endif
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#ifdef OBJ_ELF
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static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
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static void ppc_elf_cons PARAMS ((int));
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static void ppc_elf_rdata PARAMS ((int));
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static void ppc_elf_lcomm PARAMS ((int));
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static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
|
2002-08-21 23:37:34 +00:00
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static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
|
1999-05-03 07:29:11 +00:00
|
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#endif
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#ifdef TE_PE
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static void ppc_set_current_section PARAMS ((segT));
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static void ppc_previous PARAMS ((int));
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static void ppc_pdata PARAMS ((int));
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static void ppc_ydata PARAMS ((int));
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static void ppc_reldata PARAMS ((int));
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static void ppc_rdata PARAMS ((int));
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static void ppc_ualong PARAMS ((int));
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static void ppc_znop PARAMS ((int));
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static void ppc_pe_comm PARAMS ((int));
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static void ppc_pe_section PARAMS ((int));
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static void ppc_pe_function PARAMS ((int));
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static void ppc_pe_tocd PARAMS ((int));
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#endif
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/* Generic assembler global variables which must be defined by all
|
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targets. */
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#ifdef OBJ_ELF
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/* This string holds the chars that always start a comment. If the
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|
pre-processor is disabled, these aren't very useful. The macro
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|
tc_comment_chars points to this. We use this, rather than the
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|
usual comment_chars, so that we can switch for Solaris conventions. */
|
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|
static const char ppc_solaris_comment_chars[] = "#!";
|
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|
static const char ppc_eabi_comment_chars[] = "#";
|
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|
#ifdef TARGET_SOLARIS_COMMENT
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|
const char *ppc_comment_chars = ppc_solaris_comment_chars;
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#else
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const char *ppc_comment_chars = ppc_eabi_comment_chars;
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#endif
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#else
|
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|
const char comment_chars[] = "#";
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|
#endif
|
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|
/* Characters which start a comment at the beginning of a line. */
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|
const char line_comment_chars[] = "#";
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/* Characters which may be used to separate multiple commands on a
|
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single line. */
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|
const char line_separator_chars[] = ";";
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/* Characters which are used to indicate an exponent in a floating
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|
point number. */
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|
const char EXP_CHARS[] = "eE";
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/* Characters which mean that a number is a floating point constant,
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as in 0d1.0. */
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const char FLT_CHARS[] = "dD";
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/* The target specific pseudo-ops which we support. */
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const pseudo_typeS md_pseudo_table[] =
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{
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/* Pseudo-ops which must be overridden. */
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{ "byte", ppc_byte, 0 },
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#ifdef OBJ_XCOFF
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/* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
|
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|
legitimately belong in the obj-*.c file. However, XCOFF is based
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|
on COFF, and is only implemented for the RS/6000. We just use
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obj-coff.c, and add what we need here. */
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{ "comm", ppc_comm, 0 },
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{ "lcomm", ppc_comm, 1 },
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{ "bb", ppc_bb, 0 },
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{ "bc", ppc_bc, 0 },
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{ "bf", ppc_bf, 0 },
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{ "bi", ppc_biei, 0 },
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{ "bs", ppc_bs, 0 },
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{ "csect", ppc_csect, 0 },
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{ "data", ppc_section, 'd' },
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{ "eb", ppc_eb, 0 },
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{ "ec", ppc_ec, 0 },
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{ "ef", ppc_ef, 0 },
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{ "ei", ppc_biei, 1 },
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{ "es", ppc_es, 0 },
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{ "extern", ppc_extern, 0 },
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{ "function", ppc_function, 0 },
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{ "lglobl", ppc_lglobl, 0 },
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{ "rename", ppc_rename, 0 },
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{ "section", ppc_named_section, 0 },
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{ "stabx", ppc_stabx, 0 },
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{ "text", ppc_section, 't' },
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{ "toc", ppc_toc, 0 },
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|
{ "long", ppc_xcoff_cons, 2 },
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
{ "llong", ppc_xcoff_cons, 3 },
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{ "word", ppc_xcoff_cons, 1 },
|
|
|
|
|
{ "short", ppc_xcoff_cons, 1 },
|
|
|
|
|
{ "vbyte", ppc_vbyte, 0 },
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
{ "llong", ppc_elf_cons, 8 },
|
|
|
|
|
{ "quad", ppc_elf_cons, 8 },
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{ "long", ppc_elf_cons, 4 },
|
|
|
|
|
{ "word", ppc_elf_cons, 2 },
|
|
|
|
|
{ "short", ppc_elf_cons, 2 },
|
|
|
|
|
{ "rdata", ppc_elf_rdata, 0 },
|
|
|
|
|
{ "rodata", ppc_elf_rdata, 0 },
|
|
|
|
|
{ "lcomm", ppc_elf_lcomm, 0 },
|
2002-07-11 01:06:58 +00:00
|
|
|
|
{ "file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
|
2000-12-12 20:05:16 +00:00
|
|
|
|
{ "loc", dwarf2_directive_loc, 0 },
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef TE_PE
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{ "previous", ppc_previous, 0 },
|
|
|
|
|
{ "pdata", ppc_pdata, 0 },
|
|
|
|
|
{ "ydata", ppc_ydata, 0 },
|
|
|
|
|
{ "reldata", ppc_reldata, 0 },
|
|
|
|
|
{ "rdata", ppc_rdata, 0 },
|
|
|
|
|
{ "ualong", ppc_ualong, 0 },
|
|
|
|
|
{ "znop", ppc_znop, 0 },
|
|
|
|
|
{ "comm", ppc_pe_comm, 0 },
|
|
|
|
|
{ "lcomm", ppc_pe_comm, 1 },
|
|
|
|
|
{ "section", ppc_pe_section, 0 },
|
|
|
|
|
{ "function", ppc_pe_function,0 },
|
|
|
|
|
{ "tocd", ppc_pe_tocd, 0 },
|
|
|
|
|
#endif
|
|
|
|
|
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{ "tc", ppc_tc, 0 },
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
{ "machine", ppc_machine, 0 },
|
|
|
|
|
#endif
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
{ NULL, NULL, 0 }
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Predefined register names if -mregnames (or default for Windows NT).
|
|
|
|
|
In general, there are lots of them, in an attempt to be compatible
|
|
|
|
|
with a number of other Windows NT assemblers. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* Structure to hold information about predefined registers. */
|
|
|
|
|
struct pd_reg
|
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
int value;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* List of registers that are pre-defined:
|
|
|
|
|
|
|
|
|
|
Each general register has predefined names of the form:
|
|
|
|
|
1. r<reg_num> which has the value <reg_num>.
|
|
|
|
|
2. r.<reg_num> which has the value <reg_num>.
|
|
|
|
|
|
|
|
|
|
Each floating point register has predefined names of the form:
|
|
|
|
|
1. f<reg_num> which has the value <reg_num>.
|
|
|
|
|
2. f.<reg_num> which has the value <reg_num>.
|
|
|
|
|
|
2000-05-03 22:23:01 +00:00
|
|
|
|
Each vector unit register has predefined names of the form:
|
|
|
|
|
1. v<reg_num> which has the value <reg_num>.
|
|
|
|
|
2. v.<reg_num> which has the value <reg_num>.
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
Each condition register has predefined names of the form:
|
|
|
|
|
1. cr<reg_num> which has the value <reg_num>.
|
|
|
|
|
2. cr.<reg_num> which has the value <reg_num>.
|
|
|
|
|
|
|
|
|
|
There are individual registers as well:
|
|
|
|
|
sp or r.sp has the value 1
|
|
|
|
|
rtoc or r.toc has the value 2
|
|
|
|
|
fpscr has the value 0
|
|
|
|
|
xer has the value 1
|
|
|
|
|
lr has the value 8
|
|
|
|
|
ctr has the value 9
|
|
|
|
|
pmr has the value 0
|
|
|
|
|
dar has the value 19
|
|
|
|
|
dsisr has the value 18
|
|
|
|
|
dec has the value 22
|
|
|
|
|
sdr1 has the value 25
|
|
|
|
|
srr0 has the value 26
|
|
|
|
|
srr1 has the value 27
|
|
|
|
|
|
2000-09-26 07:09:19 +00:00
|
|
|
|
The table is sorted. Suitable for searching by a binary search. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
static const struct pd_reg pre_defined_registers[] =
|
|
|
|
|
{
|
|
|
|
|
{ "cr.0", 0 }, /* Condition Registers */
|
|
|
|
|
{ "cr.1", 1 },
|
|
|
|
|
{ "cr.2", 2 },
|
|
|
|
|
{ "cr.3", 3 },
|
|
|
|
|
{ "cr.4", 4 },
|
|
|
|
|
{ "cr.5", 5 },
|
|
|
|
|
{ "cr.6", 6 },
|
|
|
|
|
{ "cr.7", 7 },
|
|
|
|
|
|
|
|
|
|
{ "cr0", 0 },
|
|
|
|
|
{ "cr1", 1 },
|
|
|
|
|
{ "cr2", 2 },
|
|
|
|
|
{ "cr3", 3 },
|
|
|
|
|
{ "cr4", 4 },
|
|
|
|
|
{ "cr5", 5 },
|
|
|
|
|
{ "cr6", 6 },
|
|
|
|
|
{ "cr7", 7 },
|
|
|
|
|
|
|
|
|
|
{ "ctr", 9 },
|
|
|
|
|
|
|
|
|
|
{ "dar", 19 }, /* Data Access Register */
|
|
|
|
|
{ "dec", 22 }, /* Decrementer */
|
|
|
|
|
{ "dsisr", 18 }, /* Data Storage Interrupt Status Register */
|
|
|
|
|
|
|
|
|
|
{ "f.0", 0 }, /* Floating point registers */
|
2000-09-26 07:09:19 +00:00
|
|
|
|
{ "f.1", 1 },
|
|
|
|
|
{ "f.10", 10 },
|
|
|
|
|
{ "f.11", 11 },
|
|
|
|
|
{ "f.12", 12 },
|
|
|
|
|
{ "f.13", 13 },
|
|
|
|
|
{ "f.14", 14 },
|
|
|
|
|
{ "f.15", 15 },
|
|
|
|
|
{ "f.16", 16 },
|
|
|
|
|
{ "f.17", 17 },
|
|
|
|
|
{ "f.18", 18 },
|
|
|
|
|
{ "f.19", 19 },
|
|
|
|
|
{ "f.2", 2 },
|
|
|
|
|
{ "f.20", 20 },
|
|
|
|
|
{ "f.21", 21 },
|
|
|
|
|
{ "f.22", 22 },
|
|
|
|
|
{ "f.23", 23 },
|
|
|
|
|
{ "f.24", 24 },
|
|
|
|
|
{ "f.25", 25 },
|
|
|
|
|
{ "f.26", 26 },
|
|
|
|
|
{ "f.27", 27 },
|
|
|
|
|
{ "f.28", 28 },
|
|
|
|
|
{ "f.29", 29 },
|
|
|
|
|
{ "f.3", 3 },
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{ "f.30", 30 },
|
|
|
|
|
{ "f.31", 31 },
|
2000-09-26 07:09:19 +00:00
|
|
|
|
{ "f.4", 4 },
|
|
|
|
|
{ "f.5", 5 },
|
|
|
|
|
{ "f.6", 6 },
|
|
|
|
|
{ "f.7", 7 },
|
|
|
|
|
{ "f.8", 8 },
|
|
|
|
|
{ "f.9", 9 },
|
|
|
|
|
|
|
|
|
|
{ "f0", 0 },
|
|
|
|
|
{ "f1", 1 },
|
|
|
|
|
{ "f10", 10 },
|
|
|
|
|
{ "f11", 11 },
|
|
|
|
|
{ "f12", 12 },
|
|
|
|
|
{ "f13", 13 },
|
|
|
|
|
{ "f14", 14 },
|
|
|
|
|
{ "f15", 15 },
|
|
|
|
|
{ "f16", 16 },
|
|
|
|
|
{ "f17", 17 },
|
|
|
|
|
{ "f18", 18 },
|
|
|
|
|
{ "f19", 19 },
|
|
|
|
|
{ "f2", 2 },
|
|
|
|
|
{ "f20", 20 },
|
|
|
|
|
{ "f21", 21 },
|
|
|
|
|
{ "f22", 22 },
|
|
|
|
|
{ "f23", 23 },
|
|
|
|
|
{ "f24", 24 },
|
|
|
|
|
{ "f25", 25 },
|
|
|
|
|
{ "f26", 26 },
|
|
|
|
|
{ "f27", 27 },
|
|
|
|
|
{ "f28", 28 },
|
|
|
|
|
{ "f29", 29 },
|
|
|
|
|
{ "f3", 3 },
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{ "f30", 30 },
|
|
|
|
|
{ "f31", 31 },
|
2000-09-26 07:09:19 +00:00
|
|
|
|
{ "f4", 4 },
|
|
|
|
|
{ "f5", 5 },
|
|
|
|
|
{ "f6", 6 },
|
|
|
|
|
{ "f7", 7 },
|
|
|
|
|
{ "f8", 8 },
|
|
|
|
|
{ "f9", 9 },
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
{ "fpscr", 0 },
|
|
|
|
|
|
|
|
|
|
{ "lr", 8 }, /* Link Register */
|
|
|
|
|
|
|
|
|
|
{ "pmr", 0 },
|
|
|
|
|
|
|
|
|
|
{ "r.0", 0 }, /* General Purpose Registers */
|
|
|
|
|
{ "r.1", 1 },
|
|
|
|
|
{ "r.10", 10 },
|
|
|
|
|
{ "r.11", 11 },
|
|
|
|
|
{ "r.12", 12 },
|
|
|
|
|
{ "r.13", 13 },
|
|
|
|
|
{ "r.14", 14 },
|
|
|
|
|
{ "r.15", 15 },
|
|
|
|
|
{ "r.16", 16 },
|
|
|
|
|
{ "r.17", 17 },
|
|
|
|
|
{ "r.18", 18 },
|
|
|
|
|
{ "r.19", 19 },
|
|
|
|
|
{ "r.2", 2 },
|
|
|
|
|
{ "r.20", 20 },
|
|
|
|
|
{ "r.21", 21 },
|
|
|
|
|
{ "r.22", 22 },
|
|
|
|
|
{ "r.23", 23 },
|
|
|
|
|
{ "r.24", 24 },
|
|
|
|
|
{ "r.25", 25 },
|
|
|
|
|
{ "r.26", 26 },
|
|
|
|
|
{ "r.27", 27 },
|
|
|
|
|
{ "r.28", 28 },
|
|
|
|
|
{ "r.29", 29 },
|
|
|
|
|
{ "r.3", 3 },
|
|
|
|
|
{ "r.30", 30 },
|
|
|
|
|
{ "r.31", 31 },
|
|
|
|
|
{ "r.4", 4 },
|
|
|
|
|
{ "r.5", 5 },
|
|
|
|
|
{ "r.6", 6 },
|
|
|
|
|
{ "r.7", 7 },
|
|
|
|
|
{ "r.8", 8 },
|
|
|
|
|
{ "r.9", 9 },
|
|
|
|
|
|
|
|
|
|
{ "r.sp", 1 }, /* Stack Pointer */
|
|
|
|
|
|
|
|
|
|
{ "r.toc", 2 }, /* Pointer to the table of contents */
|
|
|
|
|
|
|
|
|
|
{ "r0", 0 }, /* More general purpose registers */
|
|
|
|
|
{ "r1", 1 },
|
|
|
|
|
{ "r10", 10 },
|
|
|
|
|
{ "r11", 11 },
|
|
|
|
|
{ "r12", 12 },
|
|
|
|
|
{ "r13", 13 },
|
|
|
|
|
{ "r14", 14 },
|
|
|
|
|
{ "r15", 15 },
|
|
|
|
|
{ "r16", 16 },
|
|
|
|
|
{ "r17", 17 },
|
|
|
|
|
{ "r18", 18 },
|
|
|
|
|
{ "r19", 19 },
|
|
|
|
|
{ "r2", 2 },
|
|
|
|
|
{ "r20", 20 },
|
|
|
|
|
{ "r21", 21 },
|
|
|
|
|
{ "r22", 22 },
|
|
|
|
|
{ "r23", 23 },
|
|
|
|
|
{ "r24", 24 },
|
|
|
|
|
{ "r25", 25 },
|
|
|
|
|
{ "r26", 26 },
|
|
|
|
|
{ "r27", 27 },
|
|
|
|
|
{ "r28", 28 },
|
|
|
|
|
{ "r29", 29 },
|
|
|
|
|
{ "r3", 3 },
|
|
|
|
|
{ "r30", 30 },
|
|
|
|
|
{ "r31", 31 },
|
|
|
|
|
{ "r4", 4 },
|
|
|
|
|
{ "r5", 5 },
|
|
|
|
|
{ "r6", 6 },
|
|
|
|
|
{ "r7", 7 },
|
|
|
|
|
{ "r8", 8 },
|
|
|
|
|
{ "r9", 9 },
|
|
|
|
|
|
|
|
|
|
{ "rtoc", 2 }, /* Table of contents */
|
|
|
|
|
|
|
|
|
|
{ "sdr1", 25 }, /* Storage Description Register 1 */
|
|
|
|
|
|
|
|
|
|
{ "sp", 1 },
|
|
|
|
|
|
|
|
|
|
{ "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
|
|
|
|
|
{ "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
2000-05-03 22:23:01 +00:00
|
|
|
|
{ "v.0", 0 }, /* Vector registers */
|
2000-09-26 07:09:19 +00:00
|
|
|
|
{ "v.1", 1 },
|
|
|
|
|
{ "v.10", 10 },
|
|
|
|
|
{ "v.11", 11 },
|
|
|
|
|
{ "v.12", 12 },
|
|
|
|
|
{ "v.13", 13 },
|
|
|
|
|
{ "v.14", 14 },
|
|
|
|
|
{ "v.15", 15 },
|
|
|
|
|
{ "v.16", 16 },
|
|
|
|
|
{ "v.17", 17 },
|
|
|
|
|
{ "v.18", 18 },
|
|
|
|
|
{ "v.19", 19 },
|
|
|
|
|
{ "v.2", 2 },
|
|
|
|
|
{ "v.20", 20 },
|
|
|
|
|
{ "v.21", 21 },
|
|
|
|
|
{ "v.22", 22 },
|
|
|
|
|
{ "v.23", 23 },
|
|
|
|
|
{ "v.24", 24 },
|
|
|
|
|
{ "v.25", 25 },
|
|
|
|
|
{ "v.26", 26 },
|
|
|
|
|
{ "v.27", 27 },
|
|
|
|
|
{ "v.28", 28 },
|
|
|
|
|
{ "v.29", 29 },
|
|
|
|
|
{ "v.3", 3 },
|
2000-05-03 22:23:01 +00:00
|
|
|
|
{ "v.30", 30 },
|
|
|
|
|
{ "v.31", 31 },
|
2000-09-26 07:09:19 +00:00
|
|
|
|
{ "v.4", 4 },
|
|
|
|
|
{ "v.5", 5 },
|
|
|
|
|
{ "v.6", 6 },
|
|
|
|
|
{ "v.7", 7 },
|
|
|
|
|
{ "v.8", 8 },
|
|
|
|
|
{ "v.9", 9 },
|
2000-05-03 22:23:01 +00:00
|
|
|
|
|
|
|
|
|
{ "v0", 0 },
|
2000-09-26 07:09:19 +00:00
|
|
|
|
{ "v1", 1 },
|
|
|
|
|
{ "v10", 10 },
|
|
|
|
|
{ "v11", 11 },
|
|
|
|
|
{ "v12", 12 },
|
|
|
|
|
{ "v13", 13 },
|
|
|
|
|
{ "v14", 14 },
|
|
|
|
|
{ "v15", 15 },
|
|
|
|
|
{ "v16", 16 },
|
|
|
|
|
{ "v17", 17 },
|
|
|
|
|
{ "v18", 18 },
|
|
|
|
|
{ "v19", 19 },
|
|
|
|
|
{ "v2", 2 },
|
|
|
|
|
{ "v20", 20 },
|
|
|
|
|
{ "v21", 21 },
|
|
|
|
|
{ "v22", 22 },
|
|
|
|
|
{ "v23", 23 },
|
|
|
|
|
{ "v24", 24 },
|
|
|
|
|
{ "v25", 25 },
|
|
|
|
|
{ "v26", 26 },
|
|
|
|
|
{ "v27", 27 },
|
|
|
|
|
{ "v28", 28 },
|
|
|
|
|
{ "v29", 29 },
|
|
|
|
|
{ "v3", 3 },
|
2000-05-03 22:23:01 +00:00
|
|
|
|
{ "v30", 30 },
|
|
|
|
|
{ "v31", 31 },
|
2000-09-26 07:09:19 +00:00
|
|
|
|
{ "v4", 4 },
|
|
|
|
|
{ "v5", 5 },
|
|
|
|
|
{ "v6", 6 },
|
|
|
|
|
{ "v7", 7 },
|
|
|
|
|
{ "v8", 8 },
|
2000-05-03 22:23:01 +00:00
|
|
|
|
{ "v9", 9 },
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
{ "xer", 1 },
|
|
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
2000-12-03 06:49:23 +00:00
|
|
|
|
#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* Given NAME, find the register number associated with that name, return
|
|
|
|
|
the integer value associated with the given name or -1 on failure. */
|
|
|
|
|
|
|
|
|
|
static int reg_name_search
|
|
|
|
|
PARAMS ((const struct pd_reg *, int, const char * name));
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
reg_name_search (regs, regcount, name)
|
|
|
|
|
const struct pd_reg *regs;
|
|
|
|
|
int regcount;
|
|
|
|
|
const char *name;
|
|
|
|
|
{
|
|
|
|
|
int middle, low, high;
|
|
|
|
|
int cmp;
|
|
|
|
|
|
|
|
|
|
low = 0;
|
|
|
|
|
high = regcount - 1;
|
|
|
|
|
|
|
|
|
|
do
|
|
|
|
|
{
|
|
|
|
|
middle = (low + high) / 2;
|
|
|
|
|
cmp = strcasecmp (name, regs[middle].name);
|
|
|
|
|
if (cmp < 0)
|
|
|
|
|
high = middle - 1;
|
|
|
|
|
else if (cmp > 0)
|
|
|
|
|
low = middle + 1;
|
|
|
|
|
else
|
|
|
|
|
return regs[middle].value;
|
|
|
|
|
}
|
|
|
|
|
while (low <= high);
|
|
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
2001-07-02 10:54:49 +00:00
|
|
|
|
* Summary of register_name.
|
1999-05-03 07:29:11 +00:00
|
|
|
|
*
|
|
|
|
|
* in: Input_line_pointer points to 1st char of operand.
|
|
|
|
|
*
|
|
|
|
|
* out: A expressionS.
|
|
|
|
|
* The operand may have been a register: in this case, X_op == O_register,
|
|
|
|
|
* X_add_number is set to the register number, and truth is returned.
|
|
|
|
|
* Input_line_pointer->(next non-blank) char after operand, or is in its
|
|
|
|
|
* original state.
|
|
|
|
|
*/
|
|
|
|
|
|
2002-11-30 08:39:46 +00:00
|
|
|
|
static bfd_boolean
|
1999-05-03 07:29:11 +00:00
|
|
|
|
register_name (expressionP)
|
|
|
|
|
expressionS *expressionP;
|
|
|
|
|
{
|
|
|
|
|
int reg_number;
|
|
|
|
|
char *name;
|
|
|
|
|
char *start;
|
|
|
|
|
char c;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Find the spelling of the operand. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
start = name = input_line_pointer;
|
2001-09-19 05:33:36 +00:00
|
|
|
|
if (name[0] == '%' && ISALPHA (name[1]))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
name = ++input_line_pointer;
|
|
|
|
|
|
2001-09-19 05:33:36 +00:00
|
|
|
|
else if (!reg_names_p || !ISALPHA (name[0]))
|
2002-11-30 08:39:46 +00:00
|
|
|
|
return FALSE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
c = get_symbol_end ();
|
|
|
|
|
reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
|
|
|
|
|
|
2001-07-30 06:15:49 +00:00
|
|
|
|
/* Put back the delimiting char. */
|
|
|
|
|
*input_line_pointer = c;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Look to see if it's in the register table. */
|
2000-09-26 07:09:19 +00:00
|
|
|
|
if (reg_number >= 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
expressionP->X_op = O_register;
|
|
|
|
|
expressionP->X_add_number = reg_number;
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Make the rest nice. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
expressionP->X_add_symbol = NULL;
|
|
|
|
|
expressionP->X_op_symbol = NULL;
|
2002-11-30 08:39:46 +00:00
|
|
|
|
return TRUE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
2001-07-30 06:15:49 +00:00
|
|
|
|
|
|
|
|
|
/* Reset the line as if we had not done anything. */
|
|
|
|
|
input_line_pointer = start;
|
2002-11-30 08:39:46 +00:00
|
|
|
|
return FALSE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This function is called for each symbol seen in an expression. It
|
|
|
|
|
handles the special parsing which PowerPC assemblers are supposed
|
|
|
|
|
to use for condition codes. */
|
|
|
|
|
|
|
|
|
|
/* Whether to do the special parsing. */
|
2002-11-30 08:39:46 +00:00
|
|
|
|
static bfd_boolean cr_operand;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* Names to recognize in a condition code. This table is sorted. */
|
|
|
|
|
static const struct pd_reg cr_names[] =
|
|
|
|
|
{
|
|
|
|
|
{ "cr0", 0 },
|
|
|
|
|
{ "cr1", 1 },
|
|
|
|
|
{ "cr2", 2 },
|
|
|
|
|
{ "cr3", 3 },
|
|
|
|
|
{ "cr4", 4 },
|
|
|
|
|
{ "cr5", 5 },
|
|
|
|
|
{ "cr6", 6 },
|
|
|
|
|
{ "cr7", 7 },
|
|
|
|
|
{ "eq", 2 },
|
|
|
|
|
{ "gt", 1 },
|
|
|
|
|
{ "lt", 0 },
|
|
|
|
|
{ "so", 3 },
|
|
|
|
|
{ "un", 3 }
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Parsing function. This returns non-zero if it recognized an
|
|
|
|
|
expression. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
ppc_parse_name (name, expr)
|
|
|
|
|
const char *name;
|
|
|
|
|
expressionS *expr;
|
|
|
|
|
{
|
|
|
|
|
int val;
|
|
|
|
|
|
|
|
|
|
if (! cr_operand)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
|
|
|
|
|
name);
|
|
|
|
|
if (val < 0)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
expr->X_op = O_constant;
|
|
|
|
|
expr->X_add_number = val;
|
|
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Local variables. */
|
|
|
|
|
|
|
|
|
|
/* The type of processor we are assembling for. This is one or more
|
|
|
|
|
of the PPC_OPCODE flags defined in opcode/ppc.h. */
|
2002-07-11 01:06:58 +00:00
|
|
|
|
static unsigned long ppc_cpu = 0;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2002-07-11 01:06:58 +00:00
|
|
|
|
/* Whether to target xcoff64/elf64. */
|
|
|
|
|
static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* Opcode hash table. */
|
|
|
|
|
static struct hash_control *ppc_hash;
|
|
|
|
|
|
|
|
|
|
/* Macro hash table. */
|
|
|
|
|
static struct hash_control *ppc_macro_hash;
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* What type of shared library support to use. */
|
2000-12-12 20:05:16 +00:00
|
|
|
|
static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Flags to set in the elf header. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static flagword ppc_flags = 0;
|
|
|
|
|
|
|
|
|
|
/* Whether this is Solaris or not. */
|
|
|
|
|
#ifdef TARGET_SOLARIS_COMMENT
|
2002-11-30 08:39:46 +00:00
|
|
|
|
#define SOLARIS_P TRUE
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#else
|
2002-11-30 08:39:46 +00:00
|
|
|
|
#define SOLARIS_P FALSE
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#endif
|
|
|
|
|
|
2002-11-30 08:39:46 +00:00
|
|
|
|
static bfd_boolean msolaris = SOLARIS_P;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_XCOFF
|
|
|
|
|
|
|
|
|
|
/* The RS/6000 assembler uses the .csect pseudo-op to generate code
|
|
|
|
|
using a bunch of different sections. These assembler sections,
|
|
|
|
|
however, are all encompassed within the .text or .data sections of
|
|
|
|
|
the final output file. We handle this by using different
|
|
|
|
|
subsegments within these main segments. */
|
|
|
|
|
|
|
|
|
|
/* Next subsegment to allocate within the .text segment. */
|
|
|
|
|
static subsegT ppc_text_subsegment = 2;
|
|
|
|
|
|
|
|
|
|
/* Linked list of csects in the text section. */
|
|
|
|
|
static symbolS *ppc_text_csects;
|
|
|
|
|
|
|
|
|
|
/* Next subsegment to allocate within the .data segment. */
|
|
|
|
|
static subsegT ppc_data_subsegment = 2;
|
|
|
|
|
|
|
|
|
|
/* Linked list of csects in the data section. */
|
|
|
|
|
static symbolS *ppc_data_csects;
|
|
|
|
|
|
|
|
|
|
/* The current csect. */
|
|
|
|
|
static symbolS *ppc_current_csect;
|
|
|
|
|
|
|
|
|
|
/* The RS/6000 assembler uses a TOC which holds addresses of functions
|
|
|
|
|
and variables. Symbols are put in the TOC with the .tc pseudo-op.
|
|
|
|
|
A special relocation is used when accessing TOC entries. We handle
|
|
|
|
|
the TOC as a subsegment within the .data segment. We set it up if
|
|
|
|
|
we see a .toc pseudo-op, and save the csect symbol here. */
|
|
|
|
|
static symbolS *ppc_toc_csect;
|
|
|
|
|
|
|
|
|
|
/* The first frag in the TOC subsegment. */
|
|
|
|
|
static fragS *ppc_toc_frag;
|
|
|
|
|
|
|
|
|
|
/* The first frag in the first subsegment after the TOC in the .data
|
|
|
|
|
segment. NULL if there are no subsegments after the TOC. */
|
|
|
|
|
static fragS *ppc_after_toc_frag;
|
|
|
|
|
|
|
|
|
|
/* The current static block. */
|
|
|
|
|
static symbolS *ppc_current_block;
|
|
|
|
|
|
|
|
|
|
/* The COFF debugging section; set by md_begin. This is not the
|
|
|
|
|
.debug section, but is instead the secret BFD section which will
|
|
|
|
|
cause BFD to set the section number of a symbol to N_DEBUG. */
|
|
|
|
|
static asection *ppc_coff_debug_section;
|
|
|
|
|
|
|
|
|
|
#endif /* OBJ_XCOFF */
|
|
|
|
|
|
|
|
|
|
#ifdef TE_PE
|
|
|
|
|
|
|
|
|
|
/* Various sections that we need for PE coff support. */
|
|
|
|
|
static segT ydata_section;
|
|
|
|
|
static segT pdata_section;
|
|
|
|
|
static segT reldata_section;
|
|
|
|
|
static segT rdata_section;
|
|
|
|
|
static segT tocdata_section;
|
|
|
|
|
|
2000-09-26 07:09:19 +00:00
|
|
|
|
/* The current section and the previous section. See ppc_previous. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static segT ppc_previous_section;
|
|
|
|
|
static segT ppc_current_section;
|
|
|
|
|
|
|
|
|
|
#endif /* TE_PE */
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
|
2002-08-19 21:08:55 +00:00
|
|
|
|
#define PPC_APUINFO_ISEL 0x40
|
|
|
|
|
#define PPC_APUINFO_PMR 0x41
|
|
|
|
|
#define PPC_APUINFO_RFMCI 0x42
|
|
|
|
|
#define PPC_APUINFO_CACHELCK 0x43
|
|
|
|
|
#define PPC_APUINFO_SPE 0x100
|
|
|
|
|
#define PPC_APUINFO_EFS 0x101
|
|
|
|
|
#define PPC_APUINFO_BRLOCK 0x102
|
|
|
|
|
|
2002-11-30 08:39:46 +00:00
|
|
|
|
/*
|
|
|
|
|
* We keep a list of APUinfo
|
2002-08-19 21:08:55 +00:00
|
|
|
|
*/
|
|
|
|
|
unsigned long *ppc_apuinfo_list;
|
|
|
|
|
unsigned int ppc_apuinfo_num;
|
|
|
|
|
unsigned int ppc_apuinfo_num_alloc;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#endif /* OBJ_ELF */
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
2001-10-17 06:03:41 +00:00
|
|
|
|
const char *const md_shortopts = "b:l:usm:K:VQ:";
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#else
|
2001-10-17 06:03:41 +00:00
|
|
|
|
const char *const md_shortopts = "um:";
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#endif
|
2001-10-17 06:03:41 +00:00
|
|
|
|
const struct option md_longopts[] = {
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{NULL, no_argument, NULL, 0}
|
|
|
|
|
};
|
2001-10-17 06:03:41 +00:00
|
|
|
|
const size_t md_longopts_size = sizeof (md_longopts);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
md_parse_option (c, arg)
|
|
|
|
|
int c;
|
|
|
|
|
char *arg;
|
|
|
|
|
{
|
|
|
|
|
switch (c)
|
|
|
|
|
{
|
|
|
|
|
case 'u':
|
|
|
|
|
/* -u means that any undefined symbols should be treated as
|
|
|
|
|
external, which is the default for gas anyhow. */
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
case 'l':
|
|
|
|
|
/* Solaris as takes -le (presumably for little endian). For completeness
|
2001-07-02 10:54:49 +00:00
|
|
|
|
sake, recognize -be also. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (strcmp (arg, "e") == 0)
|
|
|
|
|
{
|
|
|
|
|
target_big_endian = 0;
|
|
|
|
|
set_target_endian = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'b':
|
|
|
|
|
if (strcmp (arg, "e") == 0)
|
|
|
|
|
{
|
|
|
|
|
target_big_endian = 1;
|
|
|
|
|
set_target_endian = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'K':
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Recognize -K PIC. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
|
|
|
|
|
{
|
|
|
|
|
shlib = SHLIB_PIC;
|
|
|
|
|
ppc_flags |= EF_PPC_RELOCATABLE_LIB;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
/* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
|
|
|
|
|
case 'a':
|
|
|
|
|
if (strcmp (arg, "64") == 0)
|
2002-09-04 13:21:18 +00:00
|
|
|
|
{
|
|
|
|
|
#ifdef BFD64
|
|
|
|
|
ppc_obj64 = 1;
|
|
|
|
|
#else
|
|
|
|
|
as_fatal (_("%s unsupported"), "-a64");
|
|
|
|
|
#endif
|
|
|
|
|
}
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
else if (strcmp (arg, "32") == 0)
|
2002-07-11 01:06:58 +00:00
|
|
|
|
ppc_obj64 = 0;
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
else
|
|
|
|
|
return 0;
|
|
|
|
|
break;
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
case 'm':
|
|
|
|
|
/* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
|
2001-07-02 10:54:49 +00:00
|
|
|
|
(RIOS2). */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
|
2002-07-11 01:06:58 +00:00
|
|
|
|
ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* -mpwr means to assemble for the IBM POWER (RIOS1). */
|
|
|
|
|
else if (strcmp (arg, "pwr") == 0)
|
2002-07-11 01:06:58 +00:00
|
|
|
|
ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
|
2002-02-25 03:44:56 +00:00
|
|
|
|
/* -m601 means to assemble for the PowerPC 601, which includes
|
2001-07-02 10:54:49 +00:00
|
|
|
|
instructions that are holdovers from the Power. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (arg, "601") == 0)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
|
|
|
|
|
| PPC_OPCODE_601 | PPC_OPCODE_32);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
|
2002-02-25 03:44:56 +00:00
|
|
|
|
PowerPC 603/604. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (arg, "ppc") == 0
|
|
|
|
|
|| strcmp (arg, "ppc32") == 0
|
|
|
|
|
|| strcmp (arg, "603") == 0
|
|
|
|
|
|| strcmp (arg, "604") == 0)
|
2002-08-19 21:08:55 +00:00
|
|
|
|
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
|
2002-02-25 03:44:56 +00:00
|
|
|
|
/* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
|
else if (strcmp (arg, "403") == 0
|
2002-11-30 08:39:46 +00:00
|
|
|
|
|| strcmp (arg, "405") == 0)
|
|
|
|
|
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
|
|
|
|
|
| PPC_OPCODE_403 | PPC_OPCODE_32);
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
|
else if (strcmp (arg, "7400") == 0
|
2002-11-30 08:39:46 +00:00
|
|
|
|
|| strcmp (arg, "7410") == 0
|
|
|
|
|
|| strcmp (arg, "7450") == 0
|
|
|
|
|
|| strcmp (arg, "7455") == 0)
|
|
|
|
|
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
|
|
|
|
|
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
|
else if (strcmp (arg, "altivec") == 0)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
{
|
|
|
|
|
if (ppc_cpu == 0)
|
|
|
|
|
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
|
|
|
|
|
else
|
|
|
|
|
ppc_cpu |= PPC_OPCODE_ALTIVEC;
|
|
|
|
|
}
|
2002-08-19 21:08:55 +00:00
|
|
|
|
else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
|
|
|
|
|
{
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
|
|
|
|
|
| PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
|
|
|
|
|
| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
|
|
|
|
|
| PPC_OPCODE_RFMCI);
|
|
|
|
|
}
|
2002-08-19 21:08:55 +00:00
|
|
|
|
else if (strcmp (arg, "spe") == 0)
|
|
|
|
|
{
|
|
|
|
|
if (ppc_cpu == 0)
|
|
|
|
|
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
|
|
|
|
|
else
|
|
|
|
|
ppc_cpu |= PPC_OPCODE_SPE;
|
|
|
|
|
}
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
|
2001-07-02 10:54:49 +00:00
|
|
|
|
620. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
|
|
|
|
|
{
|
2002-08-19 21:08:55 +00:00
|
|
|
|
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
1999-05-08 23:31:09 +00:00
|
|
|
|
else if (strcmp (arg, "ppc64bridge") == 0)
|
|
|
|
|
{
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
|
|
|
|
|
| PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
|
}
|
|
|
|
|
/* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
|
|
|
|
|
else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
|
2002-08-19 21:08:55 +00:00
|
|
|
|
{
|
|
|
|
|
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
|
|
|
|
|
}
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
|
/* -mbooke64 means enable 64-bit BookE support. */
|
|
|
|
|
else if (strcmp (arg, "booke64") == 0)
|
|
|
|
|
{
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
|
|
|
|
|
| PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
|
1999-05-08 23:31:09 +00:00
|
|
|
|
}
|
2002-02-25 03:44:56 +00:00
|
|
|
|
else if (strcmp (arg, "power4") == 0)
|
|
|
|
|
{
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
|
|
|
|
|
| PPC_OPCODE_64 | PPC_OPCODE_POWER4);
|
2002-02-25 03:44:56 +00:00
|
|
|
|
}
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* -mcom means assemble for the common intersection between Power
|
|
|
|
|
and PowerPC. At present, we just allow the union, rather
|
|
|
|
|
than the intersection. */
|
|
|
|
|
else if (strcmp (arg, "com") == 0)
|
2002-07-11 01:06:58 +00:00
|
|
|
|
ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* -many means to assemble for any architecture (PWR/PWRX/PPC). */
|
|
|
|
|
else if (strcmp (arg, "any") == 0)
|
2002-07-11 01:06:58 +00:00
|
|
|
|
ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
else if (strcmp (arg, "regnames") == 0)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
reg_names_p = TRUE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
else if (strcmp (arg, "no-regnames") == 0)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
reg_names_p = FALSE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* -mrelocatable/-mrelocatable-lib -- warn about initializations
|
|
|
|
|
that require relocation. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (arg, "relocatable") == 0)
|
|
|
|
|
{
|
2000-12-12 20:05:16 +00:00
|
|
|
|
shlib = SHLIB_MRELOCATABLE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
ppc_flags |= EF_PPC_RELOCATABLE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else if (strcmp (arg, "relocatable-lib") == 0)
|
|
|
|
|
{
|
2000-12-12 20:05:16 +00:00
|
|
|
|
shlib = SHLIB_MRELOCATABLE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
ppc_flags |= EF_PPC_RELOCATABLE_LIB;
|
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* -memb, set embedded bit. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (arg, "emb") == 0)
|
|
|
|
|
ppc_flags |= EF_PPC_EMB;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* -mlittle/-mbig set the endianess. */
|
|
|
|
|
else if (strcmp (arg, "little") == 0
|
|
|
|
|
|| strcmp (arg, "little-endian") == 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
target_big_endian = 0;
|
|
|
|
|
set_target_endian = 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
|
|
|
|
|
{
|
|
|
|
|
target_big_endian = 1;
|
|
|
|
|
set_target_endian = 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else if (strcmp (arg, "solaris") == 0)
|
|
|
|
|
{
|
2002-11-30 08:39:46 +00:00
|
|
|
|
msolaris = TRUE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
ppc_comment_chars = ppc_solaris_comment_chars;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else if (strcmp (arg, "no-solaris") == 0)
|
|
|
|
|
{
|
2002-11-30 08:39:46 +00:00
|
|
|
|
msolaris = FALSE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
ppc_comment_chars = ppc_eabi_comment_chars;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("invalid switch -m%s"), arg);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
/* -V: SVR4 argument to print version ID. */
|
|
|
|
|
case 'V':
|
|
|
|
|
print_version_id ();
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
/* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
|
|
|
|
|
should be emitted or not. FIXME: Not implemented. */
|
|
|
|
|
case 'Q':
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
/* Solaris takes -s to specify that .stabs go in a .stabs section,
|
|
|
|
|
rather than .stabs.excl, which is ignored by the linker.
|
|
|
|
|
FIXME: Not implemented. */
|
|
|
|
|
case 's':
|
|
|
|
|
if (arg)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_show_usage (stream)
|
|
|
|
|
FILE *stream;
|
|
|
|
|
{
|
2000-12-03 06:49:23 +00:00
|
|
|
|
fprintf (stream, _("\
|
1999-05-03 07:29:11 +00:00
|
|
|
|
PowerPC options:\n\
|
|
|
|
|
-u ignored\n\
|
2002-02-25 03:44:56 +00:00
|
|
|
|
-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
|
|
|
|
|
-mpwr generate code for POWER (RIOS1)\n\
|
|
|
|
|
-m601 generate code for PowerPC 601\n\
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
|
-mppc, -mppc32, -m603, -m604\n\
|
2002-02-25 03:44:56 +00:00
|
|
|
|
generate code for PowerPC 603/604\n\
|
|
|
|
|
-m403, -m405 generate code for PowerPC 403/405\n\
|
2001-10-17 13:13:16 +00:00
|
|
|
|
-m7400, -m7410, -m7450, -m7455\n\
|
2002-02-25 03:44:56 +00:00
|
|
|
|
generate code For PowerPC 7400/7410/7450/7455\n\
|
|
|
|
|
-mppc64, -m620 generate code for PowerPC 620/625/630\n\
|
1999-05-08 23:31:09 +00:00
|
|
|
|
-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
|
2002-01-03 02:07:19 +00:00
|
|
|
|
-mbooke64 generate code for 64-bit PowerPC BookE\n\
|
|
|
|
|
-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
|
2002-02-25 03:44:56 +00:00
|
|
|
|
-mpower4 generate code for Power4 architecture\n\
|
2001-10-17 13:13:16 +00:00
|
|
|
|
-maltivec generate code for AltiVec\n\
|
1999-05-03 07:29:11 +00:00
|
|
|
|
-mcom generate code Power/PowerPC common instructions\n\
|
|
|
|
|
-many generate code for any architecture (PWR/PWRX/PPC)\n\
|
|
|
|
|
-mregnames Allow symbolic names for registers\n\
|
|
|
|
|
-mno-regnames Do not allow symbolic names for registers\n"));
|
2002-08-19 21:08:55 +00:00
|
|
|
|
fprintf (stream, _("\
|
|
|
|
|
-me500, -me500x2 generate code for Motorola e500 core complex\n\
|
|
|
|
|
-mspe generate code for Motorola SPE instructions\n"));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#ifdef OBJ_ELF
|
2000-12-03 06:49:23 +00:00
|
|
|
|
fprintf (stream, _("\
|
1999-05-03 07:29:11 +00:00
|
|
|
|
-mrelocatable support for GCC's -mrelocatble option\n\
|
|
|
|
|
-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
|
|
|
|
|
-memb set PPC_EMB bit in ELF flags\n\
|
|
|
|
|
-mlittle, -mlittle-endian\n\
|
|
|
|
|
generate code for a little endian machine\n\
|
|
|
|
|
-mbig, -mbig-endian generate code for a big endian machine\n\
|
|
|
|
|
-msolaris generate code for Solaris\n\
|
|
|
|
|
-mno-solaris do not generate code for Solaris\n\
|
|
|
|
|
-V print assembler version number\n\
|
|
|
|
|
-Qy, -Qn ignored\n"));
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Set ppc_cpu if it is not already set. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_set_cpu ()
|
|
|
|
|
{
|
|
|
|
|
const char *default_os = TARGET_OS;
|
|
|
|
|
const char *default_cpu = TARGET_CPU;
|
|
|
|
|
|
|
|
|
|
if (ppc_cpu == 0)
|
|
|
|
|
{
|
2002-09-04 13:21:18 +00:00
|
|
|
|
if (ppc_obj64)
|
|
|
|
|
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
|
|
|
|
|
else if (strncmp (default_os, "aix", 3) == 0
|
|
|
|
|
&& default_os[3] >= '4' && default_os[3] <= '9')
|
2002-07-11 01:06:58 +00:00
|
|
|
|
ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strncmp (default_os, "aix3", 4) == 0)
|
2002-07-11 01:06:58 +00:00
|
|
|
|
ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (default_cpu, "rs6000") == 0)
|
2002-07-11 01:06:58 +00:00
|
|
|
|
ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
else if (strncmp (default_cpu, "powerpc", 7) == 0)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
{
|
|
|
|
|
if (default_cpu[7] == '6' && default_cpu[8] == '4')
|
|
|
|
|
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
|
|
|
|
|
else
|
|
|
|
|
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
|
|
|
|
|
}
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
2001-07-02 10:54:49 +00:00
|
|
|
|
as_fatal (_("Unknown default cpu = %s, os = %s"),
|
|
|
|
|
default_cpu, default_os);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Figure out the BFD architecture to use. */
|
|
|
|
|
|
|
|
|
|
enum bfd_architecture
|
|
|
|
|
ppc_arch ()
|
|
|
|
|
{
|
|
|
|
|
const char *default_cpu = TARGET_CPU;
|
|
|
|
|
ppc_set_cpu ();
|
|
|
|
|
|
|
|
|
|
if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
|
|
|
|
|
return bfd_arch_powerpc;
|
|
|
|
|
else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
|
|
|
|
|
return bfd_arch_rs6000;
|
|
|
|
|
else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
|
|
|
|
|
{
|
|
|
|
|
if (strcmp (default_cpu, "rs6000") == 0)
|
|
|
|
|
return bfd_arch_rs6000;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
else if (strncmp (default_cpu, "powerpc", 7) == 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
return bfd_arch_powerpc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
|
|
|
|
|
return bfd_arch_unknown;
|
|
|
|
|
}
|
|
|
|
|
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
unsigned long
|
|
|
|
|
ppc_mach ()
|
|
|
|
|
{
|
2002-09-04 13:21:18 +00:00
|
|
|
|
if (ppc_obj64)
|
|
|
|
|
return bfd_mach_ppc64;
|
|
|
|
|
else if (ppc_arch () == bfd_arch_rs6000)
|
|
|
|
|
return bfd_mach_rs6k;
|
|
|
|
|
else
|
|
|
|
|
return bfd_mach_ppc;
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
}
|
|
|
|
|
|
2000-09-26 07:09:19 +00:00
|
|
|
|
extern char*
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_target_format ()
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
{
|
|
|
|
|
#ifdef OBJ_COFF
|
|
|
|
|
#ifdef TE_PE
|
2001-07-02 10:54:49 +00:00
|
|
|
|
return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
#elif TE_POWERMAC
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
return "xcoff-powermac";
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
#else
|
2002-03-18 12:46:27 +00:00
|
|
|
|
# ifdef TE_AIX5
|
2002-07-11 01:06:58 +00:00
|
|
|
|
return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
|
2002-03-18 12:46:27 +00:00
|
|
|
|
# else
|
2002-07-11 01:06:58 +00:00
|
|
|
|
return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
|
2002-03-18 12:46:27 +00:00
|
|
|
|
# endif
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
#endif
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef OBJ_ELF
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
return (target_big_endian
|
2002-07-11 01:06:58 +00:00
|
|
|
|
? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
|
|
|
|
|
: (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* This function is called when the assembler starts up. It is called
|
|
|
|
|
after the options have been parsed and the output file has been
|
|
|
|
|
opened. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_begin ()
|
|
|
|
|
{
|
|
|
|
|
register const struct powerpc_opcode *op;
|
|
|
|
|
const struct powerpc_opcode *op_end;
|
|
|
|
|
const struct powerpc_macro *macro;
|
|
|
|
|
const struct powerpc_macro *macro_end;
|
2002-11-30 08:39:46 +00:00
|
|
|
|
bfd_boolean dup_insn = FALSE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
ppc_set_cpu ();
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
2000-09-26 07:09:19 +00:00
|
|
|
|
/* Set the ELF flags if desired. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (ppc_flags && !msolaris)
|
|
|
|
|
bfd_set_private_flags (stdoutput, ppc_flags);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/* Insert the opcodes into a hash table. */
|
|
|
|
|
ppc_hash = hash_new ();
|
|
|
|
|
|
|
|
|
|
op_end = powerpc_opcodes + powerpc_num_opcodes;
|
|
|
|
|
for (op = powerpc_opcodes; op < op_end; op++)
|
|
|
|
|
{
|
|
|
|
|
know ((op->opcode & op->mask) == op->opcode);
|
|
|
|
|
|
2002-07-11 01:06:58 +00:00
|
|
|
|
if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
|
1999-05-03 07:29:11 +00:00
|
|
|
|
&& ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
|
2002-07-11 01:06:58 +00:00
|
|
|
|
|| ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
|
|
|
|
|
== (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
|
2002-02-25 03:44:56 +00:00
|
|
|
|
|| (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
|
2002-09-04 12:37:30 +00:00
|
|
|
|
/* Certain instructions (eg: extsw) do not exist in the
|
|
|
|
|
32-bit BookE instruction set, but they do exist in the
|
|
|
|
|
64-bit BookE instruction set, and other PPC instruction
|
|
|
|
|
sets. Check to see if the opcode has the BOOKE64 flag set.
|
|
|
|
|
If it does make sure that the target CPU is not the BookE32. */
|
|
|
|
|
&& ((op->flags & PPC_OPCODE_BOOKE64) == 0
|
|
|
|
|
|| (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
|
|
|
|
|
|| (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
|
2002-02-25 03:44:56 +00:00
|
|
|
|
&& ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
|
|
|
|
|
|| ((op->flags & PPC_OPCODE_POWER4)
|
|
|
|
|
== (ppc_cpu & PPC_OPCODE_POWER4))))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
const char *retval;
|
|
|
|
|
|
|
|
|
|
retval = hash_insert (ppc_hash, op->name, (PTR) op);
|
|
|
|
|
if (retval != (const char *) NULL)
|
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Ignore Power duplicates for -m601. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if ((ppc_cpu & PPC_OPCODE_601) != 0
|
|
|
|
|
&& (op->flags & PPC_OPCODE_POWER) != 0)
|
|
|
|
|
continue;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
as_bad (_("Internal assembler error for instruction %s"),
|
|
|
|
|
op->name);
|
2002-11-30 08:39:46 +00:00
|
|
|
|
dup_insn = TRUE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Insert the macros into a hash table. */
|
|
|
|
|
ppc_macro_hash = hash_new ();
|
|
|
|
|
|
|
|
|
|
macro_end = powerpc_macros + powerpc_num_macros;
|
|
|
|
|
for (macro = powerpc_macros; macro < macro_end; macro++)
|
|
|
|
|
{
|
|
|
|
|
if ((macro->flags & ppc_cpu) != 0)
|
|
|
|
|
{
|
|
|
|
|
const char *retval;
|
|
|
|
|
|
|
|
|
|
retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
|
|
|
|
|
if (retval != (const char *) NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Internal assembler error for macro %s"), macro->name);
|
2002-11-30 08:39:46 +00:00
|
|
|
|
dup_insn = TRUE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (dup_insn)
|
|
|
|
|
abort ();
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Tell the main code what the endianness is if it is not overidden
|
|
|
|
|
by the user. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (!set_target_endian)
|
|
|
|
|
{
|
|
|
|
|
set_target_endian = 1;
|
|
|
|
|
target_big_endian = PPC_BIG_ENDIAN;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_XCOFF
|
|
|
|
|
ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
|
|
|
|
|
|
|
|
|
|
/* Create dummy symbols to serve as initial csects. This forces the
|
|
|
|
|
text csects to precede the data csects. These symbols will not
|
|
|
|
|
be output. */
|
|
|
|
|
ppc_text_csects = symbol_make ("dummy\001");
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
ppc_data_csects = symbol_make ("dummy\001");
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef TE_PE
|
|
|
|
|
|
|
|
|
|
ppc_current_section = text_section;
|
2000-09-26 07:09:19 +00:00
|
|
|
|
ppc_previous_section = 0;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
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2002-08-19 21:08:55 +00:00
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void
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ppc_cleanup ()
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{
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2002-08-21 23:37:34 +00:00
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#ifdef OBJ_ELF
|
2002-08-19 21:08:55 +00:00
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if (ppc_apuinfo_list == NULL)
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return;
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/* Ok, so write the section info out. We have this layout:
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byte data what
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---- ---- ----
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0 8 length of "APUinfo\0"
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4 (n*4) number of APU's (4 bytes each)
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8 2 note type 2
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12 "APUinfo\0" name
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20 APU#1 first APU's info
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24 APU#2 second APU's info
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... ...
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*/
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{
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char *p;
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asection *seg = now_seg;
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subsegT subseg = now_subseg;
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asection *apuinfo_secp = (asection *) NULL;
|
2002-10-12 10:23:17 +00:00
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unsigned int i;
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2002-08-19 21:08:55 +00:00
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/* Create the .PPC.EMB.apuinfo section. */
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apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
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bfd_set_section_flags (stdoutput,
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apuinfo_secp,
|
2002-12-03 18:24:33 +00:00
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SEC_HAS_CONTENTS | SEC_READONLY);
|
2002-08-19 21:08:55 +00:00
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p = frag_more (4);
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md_number_to_chars (p, (valueT) 8, 4);
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p = frag_more (4);
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md_number_to_chars (p, (valueT) ppc_apuinfo_num, 4);
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p = frag_more (4);
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md_number_to_chars (p, (valueT) 2, 4);
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p = frag_more (8);
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strcpy (p, "APUinfo");
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for (i = 0; i < ppc_apuinfo_num; i++)
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|
{
|
2002-11-30 08:39:46 +00:00
|
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|
|
p = frag_more (4);
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|
md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
|
2002-08-19 21:08:55 +00:00
|
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|
}
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frag_align (2, 0, 0);
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/* We probably can't restore the current segment, for there likely
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|
isn't one yet... */
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if (seg && subseg)
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|
subseg_set (seg, subseg);
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}
|
2002-08-21 23:37:34 +00:00
|
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|
#endif
|
2002-08-19 21:08:55 +00:00
|
|
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|
}
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|
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|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* Insert an operand value into an instruction. */
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|
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|
static unsigned long
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|
ppc_insert_operand (insn, operand, val, file, line)
|
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|
|
unsigned long insn;
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|
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|
|
const struct powerpc_operand *operand;
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|
|
offsetT val;
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|
char *file;
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|
|
unsigned int line;
|
|
|
|
|
{
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|
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|
|
if (operand->bits != 32)
|
|
|
|
|
{
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|
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|
|
long min, max;
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|
offsetT test;
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|
|
if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
|
|
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|
|
{
|
1999-05-08 23:31:09 +00:00
|
|
|
|
if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
max = (1 << operand->bits) - 1;
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|
|
|
else
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|
|
|
max = (1 << (operand->bits - 1)) - 1;
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|
|
min = - (1 << (operand->bits - 1));
|
|
|
|
|
|
2002-07-11 01:06:58 +00:00
|
|
|
|
if (!ppc_obj64)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
/* Some people write 32 bit hex constants with the sign
|
|
|
|
|
extension done by hand. This shouldn't really be
|
|
|
|
|
valid, but, to permit this code to assemble on a 64
|
|
|
|
|
bit host, we sign extend the 32 bit value. */
|
|
|
|
|
if (val > 0
|
2000-04-02 06:27:51 +00:00
|
|
|
|
&& (val & (offsetT) 0x80000000) != 0
|
|
|
|
|
&& (val & (offsetT) 0xffffffff) == val)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
val -= 0x80000000;
|
|
|
|
|
val -= 0x80000000;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
max = (1 << operand->bits) - 1;
|
|
|
|
|
min = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
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|
|
if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
|
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|
|
|
test = - val;
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|
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|
else
|
|
|
|
|
test = val;
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|
|
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|
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|
|
|
|
if (test < (offsetT) min || test > (offsetT) max)
|
|
|
|
|
{
|
|
|
|
|
const char *err =
|
|
|
|
|
_("operand out of range (%s not between %ld and %ld)");
|
|
|
|
|
char buf[100];
|
|
|
|
|
|
|
|
|
|
sprint_value (buf, test);
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
as_bad_where (file, line, err, buf, min, max);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (operand->insert)
|
|
|
|
|
{
|
|
|
|
|
const char *errmsg;
|
|
|
|
|
|
|
|
|
|
errmsg = NULL;
|
2002-07-11 01:06:58 +00:00
|
|
|
|
insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (errmsg != (const char *) NULL)
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
as_bad_where (file, line, errmsg);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
insn |= (((long) val & ((1 << operand->bits) - 1))
|
|
|
|
|
<< operand->shift);
|
|
|
|
|
|
|
|
|
|
return insn;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
/* Parse @got, etc. and return the desired relocation. */
|
|
|
|
|
static bfd_reloc_code_real_type
|
|
|
|
|
ppc_elf_suffix (str_p, exp_p)
|
|
|
|
|
char **str_p;
|
|
|
|
|
expressionS *exp_p;
|
|
|
|
|
{
|
|
|
|
|
struct map_bfd {
|
|
|
|
|
char *string;
|
|
|
|
|
int length;
|
2001-10-17 06:03:41 +00:00
|
|
|
|
int reloc;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
char ident[20];
|
|
|
|
|
char *str = *str_p;
|
|
|
|
|
char *str2;
|
|
|
|
|
int ch;
|
|
|
|
|
int len;
|
2001-10-17 06:03:41 +00:00
|
|
|
|
const struct map_bfd *ptr;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2000-12-03 06:49:23 +00:00
|
|
|
|
#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2001-10-17 06:03:41 +00:00
|
|
|
|
static const struct map_bfd mapping[] = {
|
|
|
|
|
MAP ("l", (int) BFD_RELOC_LO16),
|
|
|
|
|
MAP ("h", (int) BFD_RELOC_HI16),
|
|
|
|
|
MAP ("ha", (int) BFD_RELOC_HI16_S),
|
|
|
|
|
MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN),
|
|
|
|
|
MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN),
|
|
|
|
|
MAP ("got", (int) BFD_RELOC_16_GOTOFF),
|
|
|
|
|
MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF),
|
|
|
|
|
MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF),
|
|
|
|
|
MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF),
|
|
|
|
|
MAP ("fixup", (int) BFD_RELOC_CTOR), /* warning with -mrelocatable */
|
|
|
|
|
MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL),
|
|
|
|
|
MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL),
|
|
|
|
|
MAP ("copy", (int) BFD_RELOC_PPC_COPY),
|
|
|
|
|
MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT),
|
|
|
|
|
MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC),
|
|
|
|
|
MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC),
|
|
|
|
|
MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL),
|
|
|
|
|
MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF),
|
|
|
|
|
MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF),
|
|
|
|
|
MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF),
|
|
|
|
|
MAP ("sdarel", (int) BFD_RELOC_GPREL16),
|
2002-05-02 12:41:35 +00:00
|
|
|
|
MAP ("sectoff", (int) BFD_RELOC_16_BASEREL),
|
2001-10-17 06:03:41 +00:00
|
|
|
|
MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL),
|
|
|
|
|
MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL),
|
|
|
|
|
MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL),
|
|
|
|
|
MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32),
|
|
|
|
|
MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16),
|
|
|
|
|
MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO),
|
|
|
|
|
MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI),
|
|
|
|
|
MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA),
|
|
|
|
|
MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16),
|
|
|
|
|
MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL),
|
|
|
|
|
MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16),
|
|
|
|
|
MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21),
|
|
|
|
|
MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF),
|
|
|
|
|
MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16),
|
|
|
|
|
MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO),
|
|
|
|
|
MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI),
|
|
|
|
|
MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA),
|
|
|
|
|
MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD),
|
|
|
|
|
MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA),
|
|
|
|
|
MAP ("xgot", (int) BFD_RELOC_PPC_TOC16),
|
2002-07-11 01:06:58 +00:00
|
|
|
|
/* The following are only valid for ppc64. Negative values are
|
|
|
|
|
used instead of a flag. */
|
2001-10-17 06:03:41 +00:00
|
|
|
|
MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER),
|
|
|
|
|
MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S),
|
|
|
|
|
MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST),
|
|
|
|
|
MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S),
|
|
|
|
|
MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC),
|
|
|
|
|
MAP ("toc", - (int) BFD_RELOC_PPC_TOC16),
|
|
|
|
|
MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO),
|
|
|
|
|
MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI),
|
|
|
|
|
MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA),
|
|
|
|
|
{ (char *) 0, 0, (int) BFD_RELOC_UNUSED }
|
1999-05-03 07:29:11 +00:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
if (*str++ != '@')
|
|
|
|
|
return BFD_RELOC_UNUSED;
|
|
|
|
|
|
|
|
|
|
for (ch = *str, str2 = ident;
|
|
|
|
|
(str2 < ident + sizeof (ident) - 1
|
2001-09-19 05:33:36 +00:00
|
|
|
|
&& (ISALNUM (ch) || ch == '@'));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
ch = *++str)
|
|
|
|
|
{
|
2001-09-19 05:33:36 +00:00
|
|
|
|
*str2++ = TOLOWER (ch);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
*str2 = '\0';
|
|
|
|
|
len = str2 - ident;
|
|
|
|
|
|
|
|
|
|
ch = ident[0];
|
|
|
|
|
for (ptr = &mapping[0]; ptr->length > 0; ptr++)
|
|
|
|
|
if (ch == ptr->string[0]
|
|
|
|
|
&& len == ptr->length
|
|
|
|
|
&& memcmp (ident, ptr->string, ptr->length) == 0)
|
|
|
|
|
{
|
2001-10-17 06:03:41 +00:00
|
|
|
|
int reloc = ptr->reloc;
|
|
|
|
|
|
2002-07-11 01:06:58 +00:00
|
|
|
|
if (reloc < 0)
|
2001-10-17 06:03:41 +00:00
|
|
|
|
{
|
2002-07-11 01:06:58 +00:00
|
|
|
|
if (!ppc_obj64)
|
2001-10-17 06:03:41 +00:00
|
|
|
|
return BFD_RELOC_UNUSED;
|
|
|
|
|
reloc = -reloc;
|
|
|
|
|
}
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (exp_p->X_add_number != 0
|
2001-10-17 06:03:41 +00:00
|
|
|
|
&& (reloc == (int) BFD_RELOC_16_GOTOFF
|
|
|
|
|
|| reloc == (int) BFD_RELOC_LO16_GOTOFF
|
|
|
|
|
|| reloc == (int) BFD_RELOC_HI16_GOTOFF
|
|
|
|
|
|| reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
as_warn (_("identifier+constant@got means identifier@got+constant"));
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Now check for identifier@suffix+constant. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (*str == '-' || *str == '+')
|
|
|
|
|
{
|
|
|
|
|
char *orig_line = input_line_pointer;
|
|
|
|
|
expressionS new_exp;
|
|
|
|
|
|
|
|
|
|
input_line_pointer = str;
|
|
|
|
|
expression (&new_exp);
|
|
|
|
|
if (new_exp.X_op == O_constant)
|
|
|
|
|
{
|
|
|
|
|
exp_p->X_add_number += new_exp.X_add_number;
|
|
|
|
|
str = input_line_pointer;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (&input_line_pointer != str_p)
|
|
|
|
|
input_line_pointer = orig_line;
|
|
|
|
|
}
|
|
|
|
|
*str_p = str;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
2002-07-11 01:06:58 +00:00
|
|
|
|
if (reloc == (int) BFD_RELOC_PPC64_TOC
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
&& exp_p->X_op == O_symbol)
|
|
|
|
|
{
|
|
|
|
|
/* This reloc type ignores the symbol. Change the symbol
|
|
|
|
|
so that the dummy .TOC. symbol can be omitted from the
|
|
|
|
|
object file. */
|
|
|
|
|
exp_p->X_add_symbol = &abs_symbol;
|
|
|
|
|
}
|
|
|
|
|
|
2001-10-17 06:03:41 +00:00
|
|
|
|
return (bfd_reloc_code_real_type) reloc;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return BFD_RELOC_UNUSED;
|
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Like normal .long/.short/.word, except support @got, etc.
|
|
|
|
|
Clobbers input_line_pointer, checks end-of-line. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static void
|
|
|
|
|
ppc_elf_cons (nbytes)
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
expressionS exp;
|
|
|
|
|
bfd_reloc_code_real_type reloc;
|
|
|
|
|
|
|
|
|
|
if (is_it_end_of_statement ())
|
|
|
|
|
{
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
do
|
|
|
|
|
{
|
|
|
|
|
expression (&exp);
|
|
|
|
|
if (exp.X_op == O_symbol
|
|
|
|
|
&& *input_line_pointer == '@'
|
2001-07-02 10:54:49 +00:00
|
|
|
|
&& (reloc = ppc_elf_suffix (&input_line_pointer,
|
|
|
|
|
&exp)) != BFD_RELOC_UNUSED)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
reloc_howto_type *reloc_howto;
|
|
|
|
|
int size;
|
|
|
|
|
|
|
|
|
|
reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
|
|
|
|
|
size = bfd_get_reloc_size (reloc_howto);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (size > nbytes)
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
{
|
|
|
|
|
as_bad (_("%s relocations do not fit in %d bytes\n"),
|
|
|
|
|
reloc_howto->name, nbytes);
|
|
|
|
|
}
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
char *p;
|
|
|
|
|
int offset;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
p = frag_more (nbytes);
|
|
|
|
|
offset = 0;
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
offset = nbytes - size;
|
2001-07-02 10:54:49 +00:00
|
|
|
|
fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
|
|
|
|
|
&exp, 0, reloc);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
emit_expr (&exp, (unsigned int) nbytes);
|
|
|
|
|
}
|
|
|
|
|
while (*input_line_pointer++ == ',');
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Put terminator back into stream. */
|
|
|
|
|
input_line_pointer--;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Solaris pseduo op to change to the .rodata section. */
|
|
|
|
|
static void
|
|
|
|
|
ppc_elf_rdata (xxx)
|
|
|
|
|
int xxx;
|
|
|
|
|
{
|
|
|
|
|
char *save_line = input_line_pointer;
|
|
|
|
|
static char section[] = ".rodata\n";
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Just pretend this is .section .rodata */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
input_line_pointer = section;
|
|
|
|
|
obj_elf_section (xxx);
|
|
|
|
|
|
|
|
|
|
input_line_pointer = save_line;
|
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Pseudo op to make file scope bss items. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static void
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_elf_lcomm (xxx)
|
2000-04-02 06:27:51 +00:00
|
|
|
|
int xxx ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
register char *name;
|
|
|
|
|
register char c;
|
|
|
|
|
register char *p;
|
|
|
|
|
offsetT size;
|
|
|
|
|
register symbolS *symbolP;
|
|
|
|
|
offsetT align;
|
|
|
|
|
segT old_sec;
|
|
|
|
|
int old_subsec;
|
|
|
|
|
char *pfrag;
|
|
|
|
|
int align2;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
c = get_symbol_end ();
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* just after name is now '\0'. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
p = input_line_pointer;
|
|
|
|
|
*p = c;
|
|
|
|
|
SKIP_WHITESPACE ();
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Expected comma after symbol-name: rest of line ignored."));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
input_line_pointer++; /* skip ',' */
|
|
|
|
|
if ((size = get_absolute_expression ()) < 0)
|
|
|
|
|
{
|
|
|
|
|
as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The third argument to .lcomm is the alignment. */
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
align = 8;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
align = get_absolute_expression ();
|
|
|
|
|
if (align <= 0)
|
|
|
|
|
{
|
|
|
|
|
as_warn (_("ignoring bad alignment"));
|
|
|
|
|
align = 8;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
*p = 0;
|
|
|
|
|
symbolP = symbol_find_or_make (name);
|
|
|
|
|
*p = c;
|
|
|
|
|
|
|
|
|
|
if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Ignoring attempt to re-define symbol `%s'."),
|
|
|
|
|
S_GET_NAME (symbolP));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
|
|
|
|
|
S_GET_NAME (symbolP),
|
|
|
|
|
(long) S_GET_VALUE (symbolP),
|
|
|
|
|
(long) size);
|
|
|
|
|
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Allocate_bss. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
old_sec = now_seg;
|
|
|
|
|
old_subsec = now_subseg;
|
|
|
|
|
if (align)
|
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Convert to a power of 2 alignment. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
|
|
|
|
|
if (align != 1)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Common alignment not a power of 2"));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
align2 = 0;
|
|
|
|
|
|
|
|
|
|
record_alignment (bss_section, align2);
|
|
|
|
|
subseg_set (bss_section, 0);
|
|
|
|
|
if (align2)
|
|
|
|
|
frag_align (align2, 0, 0);
|
|
|
|
|
if (S_GET_SEGMENT (symbolP) == bss_section)
|
Add support for storing local symbols in a small structure to save
memory when assembling large files.
* as.h: Don't include struc-symbol.h.
(symbolS): Add typedef.
* symbols.c: Include struc-symbol.h.
(local_hash): New static variable.
(save_symbol_name): New static function, from symbol_create.
(symbol_create): Call save_symbol_name.
(local_symbol_count): New static variable.
(local_symbol_conversion_count): Likewise.
(LOCAL_SYMBOL_CHECK): Define.
(local_symbol_make): New static function.
(local_symbol_convert): New static function.
(colon): Handle local symbols. Create local symbol for local
label name.
(symbol_table_insert): Handle local symbols.
(symbol_find_or_make): Create local symbol for local label name.
(symbol_find_base): Check for local symbol.
(symbol_append, symbol_insert): Check for local symbols.
(symbol_clear_list_pointers, symbol_remove): Likewise.
(verify_symbol_chain): Likewise.
(copy_symbol_attributes): Likewise.
(resolve_symbol_value): Handle local symbols.
(resolve_local_symbol): New static function.
(resolve_local_symbol_values): New function.
(S_GET_VALUE, S_SET_VALUE): Handle local symbols.
(S_IS_FUNCTION, S_IS_EXTERNAL, S_IS_WEAK, S_IS_COMMON): Likewise.
(S_IS_DEFINED, S_IS_DEBUG, S_IS_LOCAL, S_GET_NAME): Likewise.
(S_GET_SEGMENT, S_SET_SEGMENT, S_SET_EXTERNAL): Likewise.
(S_CLEAR_EXTERNAL, S_SET_WEAK, S_SET_NAME): Likewise.
(symbol_previous, symbol_next): New functions.
(symbol_get_value_expression): Likewise.
(symbol_set_value_expression): Likewise.
(symbol_set_frag, symbol_get_frag): Likewise.
(symbol_mark_used, symbol_clear_used, symbol_used_p): Likewise.
(symbol_mark_used_in_reloc): Likewise.
(symbol_clear_used_in_reloc, symbol_used_in_reloc_p): Likewise.
(symbol_mark_mri_common, symbol_clear_mri_common): Likewise.
(symbol_mri_common_p): Likewise.
(symbol_mark_written, symbol_clear_written): Likewise.
(symbol_written_p): Likewise.
(symbol_mark_resolved, symbol_resolved_p): Likewise.
(symbol_section_p, symbol_equated_p): Likewise.
(symbol_constant_p): Likewise.
(symbol_get_bfdsym, symbol_set_bfdsym): Likewise.
(symbol_get_obj, symbol_set_obj): Likewise.
(symbol_get_tc, symbol_set_tc): Likewise.
(symbol_begin): Initialize local_hash.
(print_symbol_value_1): Handle local symbols.
(symbol_print_statistics): Print local symbol statistics.
* symbols.h: Include "struc-symbol.h" if not BFD_ASSEMBLER.
Declare new symbols.c functions. Move many declarations here from
struc-symbol.h.
(SYMBOLS_NEED_BACKPOINTERS): Define if needed.
* struc-symbol.h (SYMBOLS_NEED_BACKPOINTERS): Don't set.
(struct symbol): Move bsym to make it clearly the first field.
Remove TARGET_SYMBOL_FIELDS.
(symbolS): Don't typedef.
(struct broken_word): Remove.
(N_TYPE_seg, seg_N_TYPE): Move to symbol.h.
(SEGMENT_TO_SYMBOL_TYPE, N_REGISTER): Likewise.
(symbol_clear_list_pointers): Likewise.
(symbol_insert, symbol_remove): Likewise.
(symbol_previous, symbol_append): Likewise.
(verify_symbol_chain, verify_symbol_chain_2): Likewise.
(struct local_symbol): Define.
(local_symbol_converted_p, local_symbol_mark_converted): Define.
(local_symbol_resolved_p, local_symbol_mark_resolved): Define.
(local_symbol_get_frag, local_symbol_set_frag): Define.
(local_symbol_get_real_symbol): Define.
(local_symbol_set_real_symbol): Define.
Define.
* write.c (write_object_file): Call resolve_local_symbol_values.
* config/obj-ecoff.h (OBJ_SYMFIELD_TYPE): Define.
(TARGET_SYMBOL_FIELDS): Don't define.
* config/obj-elf.h (OBJ_SYMFIELD_TYPE): Add local field. If
ECOFF_DEBUGGING, add ECOFF fields.
(ELF_TARGET_SYMBOL_FIELDS, TARGET_SYMBOL_FIELDS): Don't define.
* config/obj-multi.h (struct elf_obj_sy): Add local field. If
ECOFF_DEBUGGING, add ECOFF fields.
(ELF_TARGET_SYMBOL_FIELDS, TARGET_SYMBOL_FIELDS): Don't define.
(ECOFF_DEBUG_TARGET_SYMBOL_FIELDS): Don't define.
* config/tc-mcore.h: Don't include struc-symbol.h.
(TARGET_SYMBOL_FIELDS): Don't define.
(struct mcore_tc_sy): Define.
(TC_SYMFIELD_TYPE): Define.
* Many files: Use symbolS instead of struct symbol. Use new
accessor functions rather than referring to symbolS fields
directly.
* read.c (s_mri_common): Don't add in value of line_label.
* config/tc-mips.c (md_apply_fix): Correct parenthesization when
checking for SEC_LINK_ONCE.
* config/tc-sh.h (sh_fix_adjustable): Declare.
1999-06-03 00:29:48 +00:00
|
|
|
|
symbol_get_frag (symbolP)->fr_symbol = 0;
|
|
|
|
|
symbol_set_frag (symbolP, frag_now);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
|
|
|
|
|
(char *) 0);
|
|
|
|
|
*pfrag = 0;
|
|
|
|
|
S_SET_SIZE (symbolP, size);
|
|
|
|
|
S_SET_SEGMENT (symbolP, bss_section);
|
|
|
|
|
subseg_set (old_sec, old_subsec);
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Validate any relocations emitted for -mrelocatable, possibly adding
|
|
|
|
|
fixups for word relocations in writable segments, so we can adjust
|
|
|
|
|
them at runtime. */
|
|
|
|
|
static void
|
|
|
|
|
ppc_elf_validate_fix (fixp, seg)
|
|
|
|
|
fixS *fixp;
|
|
|
|
|
segT seg;
|
|
|
|
|
{
|
|
|
|
|
if (fixp->fx_done || fixp->fx_pcrel)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
switch (shlib)
|
|
|
|
|
{
|
|
|
|
|
case SHLIB_NONE:
|
|
|
|
|
case SHLIB_PIC:
|
|
|
|
|
return;
|
|
|
|
|
|
2000-12-12 20:05:16 +00:00
|
|
|
|
case SHLIB_MRELOCATABLE:
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (fixp->fx_r_type <= BFD_RELOC_UNUSED
|
|
|
|
|
&& fixp->fx_r_type != BFD_RELOC_16_GOTOFF
|
|
|
|
|
&& fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
|
|
|
|
|
&& fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
|
|
|
|
|
&& fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
|
2002-05-02 12:41:35 +00:00
|
|
|
|
&& fixp->fx_r_type != BFD_RELOC_16_BASEREL
|
1999-05-03 07:29:11 +00:00
|
|
|
|
&& fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
|
|
|
|
|
&& fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
|
|
|
|
|
&& fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
|
2001-07-31 19:24:57 +00:00
|
|
|
|
&& (seg->flags & SEC_LOAD) != 0
|
1999-05-03 07:29:11 +00:00
|
|
|
|
&& strcmp (segment_name (seg), ".got2") != 0
|
|
|
|
|
&& strcmp (segment_name (seg), ".dtors") != 0
|
|
|
|
|
&& strcmp (segment_name (seg), ".ctors") != 0
|
|
|
|
|
&& strcmp (segment_name (seg), ".fixup") != 0
|
|
|
|
|
&& strcmp (segment_name (seg), ".gcc_except_table") != 0
|
|
|
|
|
&& strcmp (segment_name (seg), ".eh_frame") != 0
|
|
|
|
|
&& strcmp (segment_name (seg), ".ex_shared") != 0)
|
|
|
|
|
{
|
|
|
|
|
if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
|
|
|
|
|
|| fixp->fx_r_type != BFD_RELOC_CTOR)
|
|
|
|
|
{
|
|
|
|
|
as_bad_where (fixp->fx_file, fixp->fx_line,
|
|
|
|
|
_("Relocation cannot be done when using -mrelocatable"));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
}
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
2002-07-11 01:07:49 +00:00
|
|
|
|
/* Prevent elf_frob_file_before_adjust removing a weak undefined
|
|
|
|
|
function descriptor sym if the corresponding code sym is used. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
ppc_frob_file_before_adjust ()
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
{
|
2002-07-11 01:07:49 +00:00
|
|
|
|
symbolS *symp;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
2002-07-11 01:07:49 +00:00
|
|
|
|
if (!ppc_obj64)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
for (symp = symbol_rootP; symp; symp = symbol_next (symp))
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
{
|
2002-07-11 01:07:49 +00:00
|
|
|
|
const char *name;
|
|
|
|
|
char *dotname;
|
|
|
|
|
symbolS *dotsym;
|
|
|
|
|
size_t len;
|
|
|
|
|
|
|
|
|
|
name = S_GET_NAME (symp);
|
|
|
|
|
if (name[0] == '.')
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (! S_IS_WEAK (symp)
|
|
|
|
|
|| S_IS_DEFINED (symp))
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
len = strlen (name) + 1;
|
|
|
|
|
dotname = xmalloc (len + 1);
|
|
|
|
|
dotname[0] = '.';
|
|
|
|
|
memcpy (dotname + 1, name, len);
|
|
|
|
|
dotsym = symbol_find (dotname);
|
|
|
|
|
free (dotname);
|
|
|
|
|
if (dotsym != NULL && (symbol_used_p (dotsym)
|
|
|
|
|
|| symbol_used_in_reloc_p (dotsym)))
|
|
|
|
|
{
|
|
|
|
|
symbol_mark_used (symp);
|
|
|
|
|
}
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
}
|
|
|
|
|
|
2002-07-11 01:07:49 +00:00
|
|
|
|
/* Don't emit .TOC. symbol. */
|
|
|
|
|
symp = symbol_find (".TOC.");
|
|
|
|
|
if (symp != NULL)
|
|
|
|
|
symbol_remove (symp, &symbol_rootP, &symbol_lastP);
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
}
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#endif /* OBJ_ELF */
|
|
|
|
|
|
|
|
|
|
#ifdef TE_PE
|
|
|
|
|
|
|
|
|
|
/*
|
2001-07-02 10:54:49 +00:00
|
|
|
|
* Summary of parse_toc_entry.
|
1999-05-03 07:29:11 +00:00
|
|
|
|
*
|
|
|
|
|
* in: Input_line_pointer points to the '[' in one of:
|
|
|
|
|
*
|
|
|
|
|
* [toc] [tocv] [toc32] [toc64]
|
|
|
|
|
*
|
|
|
|
|
* Anything else is an error of one kind or another.
|
|
|
|
|
*
|
2000-09-26 07:09:19 +00:00
|
|
|
|
* out:
|
1999-05-03 07:29:11 +00:00
|
|
|
|
* return value: success or failure
|
|
|
|
|
* toc_kind: kind of toc reference
|
|
|
|
|
* input_line_pointer:
|
|
|
|
|
* success: first char after the ']'
|
|
|
|
|
* failure: unchanged
|
|
|
|
|
*
|
|
|
|
|
* settings:
|
|
|
|
|
*
|
|
|
|
|
* [toc] - rv == success, toc_kind = default_toc
|
|
|
|
|
* [tocv] - rv == success, toc_kind = data_in_toc
|
|
|
|
|
* [toc32] - rv == success, toc_kind = must_be_32
|
|
|
|
|
* [toc64] - rv == success, toc_kind = must_be_64
|
|
|
|
|
*
|
|
|
|
|
*/
|
|
|
|
|
|
2000-09-26 07:09:19 +00:00
|
|
|
|
enum toc_size_qualifier
|
|
|
|
|
{
|
1999-05-03 07:29:11 +00:00
|
|
|
|
default_toc, /* The toc cell constructed should be the system default size */
|
|
|
|
|
data_in_toc, /* This is a direct reference to a toc cell */
|
|
|
|
|
must_be_32, /* The toc cell constructed must be 32 bits wide */
|
|
|
|
|
must_be_64 /* The toc cell constructed must be 64 bits wide */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int
|
2001-07-02 10:54:49 +00:00
|
|
|
|
parse_toc_entry (toc_kind)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
enum toc_size_qualifier *toc_kind;
|
|
|
|
|
{
|
|
|
|
|
char *start;
|
|
|
|
|
char *toc_spec;
|
|
|
|
|
char c;
|
|
|
|
|
enum toc_size_qualifier t;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Save the input_line_pointer. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
start = input_line_pointer;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Skip over the '[' , and whitespace. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
++input_line_pointer;
|
|
|
|
|
SKIP_WHITESPACE ();
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Find the spelling of the operand. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
toc_spec = input_line_pointer;
|
|
|
|
|
c = get_symbol_end ();
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
if (strcmp (toc_spec, "toc") == 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
t = default_toc;
|
|
|
|
|
}
|
2001-07-02 10:54:49 +00:00
|
|
|
|
else if (strcmp (toc_spec, "tocv") == 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
t = data_in_toc;
|
|
|
|
|
}
|
2001-07-02 10:54:49 +00:00
|
|
|
|
else if (strcmp (toc_spec, "toc32") == 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
t = must_be_32;
|
|
|
|
|
}
|
2001-07-02 10:54:49 +00:00
|
|
|
|
else if (strcmp (toc_spec, "toc64") == 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
t = must_be_64;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
|
2001-07-02 10:54:49 +00:00
|
|
|
|
*input_line_pointer = c;
|
|
|
|
|
input_line_pointer = start;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Now find the ']'. */
|
|
|
|
|
*input_line_pointer = c;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2000-09-26 07:09:19 +00:00
|
|
|
|
SKIP_WHITESPACE (); /* leading whitespace could be there. */
|
|
|
|
|
c = *input_line_pointer++; /* input_line_pointer->past char in c. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (c != ']')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("syntax error: expected `]', found `%c'"), c);
|
2001-07-02 10:54:49 +00:00
|
|
|
|
input_line_pointer = start;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
*toc_kind = t;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
2002-08-21 23:37:34 +00:00
|
|
|
|
#ifdef OBJ_ELF
|
2002-08-19 21:08:55 +00:00
|
|
|
|
#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
|
|
|
|
|
static void
|
2002-08-21 23:37:34 +00:00
|
|
|
|
ppc_apuinfo_section_add (apu, version)
|
2002-08-19 21:08:55 +00:00
|
|
|
|
unsigned int apu, version;
|
|
|
|
|
{
|
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
|
|
/* Check we don't already exist. */
|
|
|
|
|
for (i = 0; i < ppc_apuinfo_num; i++)
|
2002-08-21 23:37:34 +00:00
|
|
|
|
if (ppc_apuinfo_list[i] == APUID (apu, version))
|
2002-08-19 21:08:55 +00:00
|
|
|
|
return;
|
2002-11-30 08:39:46 +00:00
|
|
|
|
|
2002-08-19 21:08:55 +00:00
|
|
|
|
if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
|
|
|
|
|
{
|
|
|
|
|
if (ppc_apuinfo_num_alloc == 0)
|
|
|
|
|
{
|
|
|
|
|
ppc_apuinfo_num_alloc = 4;
|
|
|
|
|
ppc_apuinfo_list = (unsigned long *)
|
|
|
|
|
xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ppc_apuinfo_num_alloc += 4;
|
|
|
|
|
ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
|
|
|
|
|
sizeof (unsigned long) * ppc_apuinfo_num_alloc);
|
|
|
|
|
}
|
|
|
|
|
}
|
2002-08-21 23:37:34 +00:00
|
|
|
|
ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
|
2002-08-19 21:08:55 +00:00
|
|
|
|
}
|
|
|
|
|
#undef APUID
|
2002-08-21 23:37:34 +00:00
|
|
|
|
#endif
|
2002-08-19 21:08:55 +00:00
|
|
|
|
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* We need to keep a list of fixups. We can't simply generate them as
|
|
|
|
|
we go, because that would require us to first create the frag, and
|
|
|
|
|
that would screw up references to ``.''. */
|
|
|
|
|
|
|
|
|
|
struct ppc_fixup
|
|
|
|
|
{
|
|
|
|
|
expressionS exp;
|
|
|
|
|
int opindex;
|
|
|
|
|
bfd_reloc_code_real_type reloc;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#define MAX_INSN_FIXUPS (5)
|
|
|
|
|
|
|
|
|
|
/* This routine is called for each instruction to be assembled. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_assemble (str)
|
|
|
|
|
char *str;
|
|
|
|
|
{
|
|
|
|
|
char *s;
|
|
|
|
|
const struct powerpc_opcode *opcode;
|
|
|
|
|
unsigned long insn;
|
|
|
|
|
const unsigned char *opindex_ptr;
|
|
|
|
|
int skip_optional;
|
|
|
|
|
int need_paren;
|
|
|
|
|
int next_opindex;
|
|
|
|
|
struct ppc_fixup fixups[MAX_INSN_FIXUPS];
|
|
|
|
|
int fc;
|
|
|
|
|
char *f;
|
|
|
|
|
int i;
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
bfd_reloc_code_real_type reloc;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/* Get the opcode. */
|
2001-09-19 05:33:36 +00:00
|
|
|
|
for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
;
|
|
|
|
|
if (*s != '\0')
|
|
|
|
|
*s++ = '\0';
|
|
|
|
|
|
|
|
|
|
/* Look up the opcode in the hash table. */
|
|
|
|
|
opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
|
|
|
|
|
if (opcode == (const struct powerpc_opcode *) NULL)
|
|
|
|
|
{
|
|
|
|
|
const struct powerpc_macro *macro;
|
|
|
|
|
|
|
|
|
|
macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
|
|
|
|
|
if (macro == (const struct powerpc_macro *) NULL)
|
|
|
|
|
as_bad (_("Unrecognized opcode: `%s'"), str);
|
|
|
|
|
else
|
|
|
|
|
ppc_macro (s, macro);
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
insn = opcode->opcode;
|
|
|
|
|
|
|
|
|
|
str = s;
|
2001-09-19 05:33:36 +00:00
|
|
|
|
while (ISSPACE (*str))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
++str;
|
|
|
|
|
|
|
|
|
|
/* PowerPC operands are just expressions. The only real issue is
|
|
|
|
|
that a few operand types are optional. All cases which might use
|
|
|
|
|
an optional operand separate the operands only with commas (in
|
|
|
|
|
some cases parentheses are used, as in ``lwz 1,0(1)'' but such
|
|
|
|
|
cases never have optional operands). There is never more than
|
|
|
|
|
one optional operand for an instruction. So, before we start
|
|
|
|
|
seriously parsing the operands, we check to see if we have an
|
|
|
|
|
optional operand, and, if we do, we count the number of commas to
|
|
|
|
|
see whether the operand should be omitted. */
|
|
|
|
|
skip_optional = 0;
|
|
|
|
|
for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
|
|
|
|
|
{
|
|
|
|
|
const struct powerpc_operand *operand;
|
|
|
|
|
|
|
|
|
|
operand = &powerpc_operands[*opindex_ptr];
|
|
|
|
|
if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
|
|
|
|
|
{
|
|
|
|
|
unsigned int opcount;
|
2002-09-13 09:16:02 +00:00
|
|
|
|
unsigned int num_operands_expected;
|
|
|
|
|
unsigned int i;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* There is an optional operand. Count the number of
|
|
|
|
|
commas in the input line. */
|
|
|
|
|
if (*str == '\0')
|
|
|
|
|
opcount = 0;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
opcount = 1;
|
|
|
|
|
s = str;
|
|
|
|
|
while ((s = strchr (s, ',')) != (char *) NULL)
|
|
|
|
|
{
|
|
|
|
|
++opcount;
|
|
|
|
|
++s;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2002-09-13 09:16:02 +00:00
|
|
|
|
/* Compute the number of expected operands.
|
|
|
|
|
Do not count fake operands. */
|
|
|
|
|
for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
|
|
|
|
|
if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
|
|
|
|
|
++ num_operands_expected;
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* If there are fewer operands in the line then are called
|
|
|
|
|
for by the instruction, we want to skip the optional
|
|
|
|
|
operand. */
|
2002-09-13 09:16:02 +00:00
|
|
|
|
if (opcount < num_operands_expected)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
skip_optional = 1;
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Gather the operands. */
|
|
|
|
|
need_paren = 0;
|
|
|
|
|
next_opindex = 0;
|
|
|
|
|
fc = 0;
|
|
|
|
|
for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
|
|
|
|
|
{
|
|
|
|
|
const struct powerpc_operand *operand;
|
|
|
|
|
const char *errmsg;
|
|
|
|
|
char *hold;
|
|
|
|
|
expressionS ex;
|
|
|
|
|
char endc;
|
|
|
|
|
|
|
|
|
|
if (next_opindex == 0)
|
|
|
|
|
operand = &powerpc_operands[*opindex_ptr];
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
operand = &powerpc_operands[next_opindex];
|
|
|
|
|
next_opindex = 0;
|
|
|
|
|
}
|
|
|
|
|
errmsg = NULL;
|
|
|
|
|
|
|
|
|
|
/* If this is a fake operand, then we do not expect anything
|
|
|
|
|
from the input. */
|
|
|
|
|
if ((operand->flags & PPC_OPERAND_FAKE) != 0)
|
|
|
|
|
{
|
2002-07-11 01:06:58 +00:00
|
|
|
|
insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (errmsg != (const char *) NULL)
|
|
|
|
|
as_bad (errmsg);
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* If this is an optional operand, and we are skipping it, just
|
|
|
|
|
insert a zero. */
|
|
|
|
|
if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
|
|
|
|
|
&& skip_optional)
|
|
|
|
|
{
|
|
|
|
|
if (operand->insert)
|
|
|
|
|
{
|
2002-07-11 01:06:58 +00:00
|
|
|
|
insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (errmsg != (const char *) NULL)
|
|
|
|
|
as_bad (errmsg);
|
|
|
|
|
}
|
|
|
|
|
if ((operand->flags & PPC_OPERAND_NEXT) != 0)
|
|
|
|
|
next_opindex = *opindex_ptr + 1;
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Gather the operand. */
|
|
|
|
|
hold = input_line_pointer;
|
|
|
|
|
input_line_pointer = str;
|
|
|
|
|
|
|
|
|
|
#ifdef TE_PE
|
2000-09-26 07:09:19 +00:00
|
|
|
|
if (*input_line_pointer == '[')
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
/* We are expecting something like the second argument here:
|
2001-07-02 10:54:49 +00:00
|
|
|
|
*
|
|
|
|
|
* lwz r4,[toc].GS.0.static_int(rtoc)
|
|
|
|
|
* ^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
|
|
|
* The argument following the `]' must be a symbol name, and the
|
|
|
|
|
* register must be the toc register: 'rtoc' or '2'
|
|
|
|
|
*
|
|
|
|
|
* The effect is to 0 as the displacement field
|
|
|
|
|
* in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
|
|
|
|
|
* the appropriate variation) reloc against it based on the symbol.
|
|
|
|
|
* The linker will build the toc, and insert the resolved toc offset.
|
|
|
|
|
*
|
|
|
|
|
* Note:
|
|
|
|
|
* o The size of the toc entry is currently assumed to be
|
|
|
|
|
* 32 bits. This should not be assumed to be a hard coded
|
|
|
|
|
* number.
|
|
|
|
|
* o In an effort to cope with a change from 32 to 64 bits,
|
|
|
|
|
* there are also toc entries that are specified to be
|
|
|
|
|
* either 32 or 64 bits:
|
|
|
|
|
* lwz r4,[toc32].GS.0.static_int(rtoc)
|
|
|
|
|
* lwz r4,[toc64].GS.0.static_int(rtoc)
|
|
|
|
|
* These demand toc entries of the specified size, and the
|
|
|
|
|
* instruction probably requires it.
|
|
|
|
|
*/
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
int valid_toc;
|
|
|
|
|
enum toc_size_qualifier toc_kind;
|
|
|
|
|
bfd_reloc_code_real_type toc_reloc;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Go parse off the [tocXX] part. */
|
|
|
|
|
valid_toc = parse_toc_entry (&toc_kind);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2000-09-26 07:09:19 +00:00
|
|
|
|
if (!valid_toc)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Note: message has already been issued.
|
|
|
|
|
FIXME: what sort of recovery should we do?
|
|
|
|
|
demand_rest_of_line (); return; ? */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Now get the symbol following the ']'. */
|
|
|
|
|
expression (&ex);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
switch (toc_kind)
|
|
|
|
|
{
|
|
|
|
|
case default_toc:
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* In this case, we may not have seen the symbol yet,
|
|
|
|
|
since it is allowed to appear on a .extern or .globl
|
|
|
|
|
or just be a label in the .data section. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
toc_reloc = BFD_RELOC_PPC_TOC16;
|
|
|
|
|
break;
|
|
|
|
|
case data_in_toc:
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* 1. The symbol must be defined and either in the toc
|
|
|
|
|
section, or a global.
|
|
|
|
|
2. The reloc generated must have the TOCDEFN flag set
|
|
|
|
|
in upper bit mess of the reloc type.
|
|
|
|
|
FIXME: It's a little confusing what the tocv
|
|
|
|
|
qualifier can be used for. At the very least, I've
|
|
|
|
|
seen three uses, only one of which I'm sure I can
|
|
|
|
|
explain. */
|
2000-09-26 07:09:19 +00:00
|
|
|
|
if (ex.X_op == O_symbol)
|
|
|
|
|
{
|
1999-05-03 07:29:11 +00:00
|
|
|
|
assert (ex.X_add_symbol != NULL);
|
1999-06-22 14:17:55 +00:00
|
|
|
|
if (symbol_get_bfdsym (ex.X_add_symbol)->section
|
|
|
|
|
!= tocdata_section)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
as_bad (_("[tocv] symbol is not a toc symbol"));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
toc_reloc = BFD_RELOC_PPC_TOC16;
|
|
|
|
|
break;
|
|
|
|
|
case must_be_32:
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* FIXME: these next two specifically specify 32/64 bit
|
|
|
|
|
toc entries. We don't support them today. Is this
|
|
|
|
|
the right way to say that? */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
toc_reloc = BFD_RELOC_UNUSED;
|
|
|
|
|
as_bad (_("Unimplemented toc32 expression modifier"));
|
|
|
|
|
break;
|
|
|
|
|
case must_be_64:
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* FIXME: see above. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
toc_reloc = BFD_RELOC_UNUSED;
|
|
|
|
|
as_bad (_("Unimplemented toc64 expression modifier"));
|
|
|
|
|
break;
|
|
|
|
|
default:
|
2000-12-03 06:49:23 +00:00
|
|
|
|
fprintf (stderr,
|
2001-07-02 10:54:49 +00:00
|
|
|
|
_("Unexpected return value [%d] from parse_toc_entry!\n"),
|
|
|
|
|
toc_kind);
|
2000-12-03 06:49:23 +00:00
|
|
|
|
abort ();
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We need to generate a fixup for this expression. */
|
|
|
|
|
if (fc >= MAX_INSN_FIXUPS)
|
|
|
|
|
as_fatal (_("too many fixups"));
|
|
|
|
|
|
|
|
|
|
fixups[fc].reloc = toc_reloc;
|
|
|
|
|
fixups[fc].exp = ex;
|
|
|
|
|
fixups[fc].opindex = *opindex_ptr;
|
|
|
|
|
++fc;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Ok. We've set up the fixup for the instruction. Now make it
|
|
|
|
|
look like the constant 0 was found here. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
ex.X_unsigned = 1;
|
|
|
|
|
ex.X_op = O_constant;
|
|
|
|
|
ex.X_add_number = 0;
|
|
|
|
|
ex.X_add_symbol = NULL;
|
|
|
|
|
ex.X_op_symbol = NULL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
else
|
|
|
|
|
#endif /* TE_PE */
|
|
|
|
|
{
|
|
|
|
|
if (! register_name (&ex))
|
|
|
|
|
{
|
|
|
|
|
if ((operand->flags & PPC_OPERAND_CR) != 0)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
cr_operand = TRUE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
expression (&ex);
|
2002-11-30 08:39:46 +00:00
|
|
|
|
cr_operand = FALSE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
str = input_line_pointer;
|
|
|
|
|
input_line_pointer = hold;
|
|
|
|
|
|
|
|
|
|
if (ex.X_op == O_illegal)
|
|
|
|
|
as_bad (_("illegal operand"));
|
|
|
|
|
else if (ex.X_op == O_absent)
|
|
|
|
|
as_bad (_("missing operand"));
|
|
|
|
|
else if (ex.X_op == O_register)
|
|
|
|
|
{
|
|
|
|
|
insn = ppc_insert_operand (insn, operand, ex.X_add_number,
|
|
|
|
|
(char *) NULL, 0);
|
|
|
|
|
}
|
|
|
|
|
else if (ex.X_op == O_constant)
|
|
|
|
|
{
|
|
|
|
|
#ifdef OBJ_ELF
|
2000-09-26 07:09:19 +00:00
|
|
|
|
/* Allow @HA, @L, @H on constants. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
char *orig_str = str;
|
|
|
|
|
|
|
|
|
|
if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
|
|
|
|
|
switch (reloc)
|
|
|
|
|
{
|
|
|
|
|
default:
|
|
|
|
|
str = orig_str;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_LO16:
|
|
|
|
|
/* X_unsigned is the default, so if the user has done
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
something which cleared it, we always produce a
|
|
|
|
|
signed value. */
|
|
|
|
|
if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
ex.X_add_number &= 0xffff;
|
|
|
|
|
else
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
ex.X_add_number = SEX16 (ex.X_add_number);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_HI16:
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
|
|
|
|
|
ex.X_add_number = PPC_HI (ex.X_add_number);
|
|
|
|
|
else
|
|
|
|
|
ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_HI16_S:
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
|
|
|
|
|
ex.X_add_number = PPC_HA (ex.X_add_number);
|
|
|
|
|
else
|
|
|
|
|
ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHER:
|
|
|
|
|
if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
|
|
|
|
|
ex.X_add_number = PPC_HIGHER (ex.X_add_number);
|
|
|
|
|
else
|
|
|
|
|
ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHER_S:
|
|
|
|
|
if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
|
|
|
|
|
ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
|
|
|
|
|
else
|
|
|
|
|
ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHEST:
|
|
|
|
|
if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
|
|
|
|
|
ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
|
|
|
|
|
else
|
|
|
|
|
ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHEST_S:
|
|
|
|
|
if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
|
|
|
|
|
ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
|
|
|
|
|
else
|
|
|
|
|
ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
|
|
|
|
|
break;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#endif /* OBJ_ELF */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
insn = ppc_insert_operand (insn, operand, ex.X_add_number,
|
|
|
|
|
(char *) NULL, 0);
|
|
|
|
|
}
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
|
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* For the absolute forms of branches, convert the PC
|
|
|
|
|
relative form back into the absolute. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
|
|
|
|
|
{
|
|
|
|
|
switch (reloc)
|
|
|
|
|
{
|
|
|
|
|
case BFD_RELOC_PPC_B26:
|
|
|
|
|
reloc = BFD_RELOC_PPC_BA26;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_PPC_B16:
|
|
|
|
|
reloc = BFD_RELOC_PPC_BA16;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_PPC_B16_BRTAKEN:
|
|
|
|
|
reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_PPC_B16_BRNTAKEN:
|
|
|
|
|
reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2002-07-11 01:06:58 +00:00
|
|
|
|
if (ppc_obj64
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
&& (operand->flags & PPC_OPERAND_DS) != 0)
|
|
|
|
|
{
|
|
|
|
|
switch (reloc)
|
|
|
|
|
{
|
|
|
|
|
case BFD_RELOC_16:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_ADDR16_DS;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_LO16:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_16_GOTOFF:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_GOT16_DS;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_LO16_GOTOFF:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_LO16_PLTOFF:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
|
|
|
|
|
break;
|
2002-05-02 12:41:35 +00:00
|
|
|
|
case BFD_RELOC_16_BASEREL:
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
reloc = BFD_RELOC_PPC64_SECTOFF_DS;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_LO16_BASEREL:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_PPC_TOC16:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_TOC16_DS;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_PPC64_TOC16_LO:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_PPC64_PLTGOT16:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
|
|
|
|
|
break;
|
|
|
|
|
case BFD_RELOC_PPC64_PLTGOT16_LO:
|
|
|
|
|
reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
as_bad (_("unsupported relocation for DS offset field"));
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* We need to generate a fixup for this expression. */
|
|
|
|
|
if (fc >= MAX_INSN_FIXUPS)
|
|
|
|
|
as_fatal (_("too many fixups"));
|
|
|
|
|
fixups[fc].exp = ex;
|
|
|
|
|
fixups[fc].opindex = 0;
|
|
|
|
|
fixups[fc].reloc = reloc;
|
|
|
|
|
++fc;
|
|
|
|
|
}
|
|
|
|
|
#endif /* OBJ_ELF */
|
|
|
|
|
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* We need to generate a fixup for this expression. */
|
|
|
|
|
if (fc >= MAX_INSN_FIXUPS)
|
|
|
|
|
as_fatal (_("too many fixups"));
|
|
|
|
|
fixups[fc].exp = ex;
|
|
|
|
|
fixups[fc].opindex = *opindex_ptr;
|
|
|
|
|
fixups[fc].reloc = BFD_RELOC_UNUSED;
|
|
|
|
|
++fc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (need_paren)
|
|
|
|
|
{
|
|
|
|
|
endc = ')';
|
|
|
|
|
need_paren = 0;
|
|
|
|
|
}
|
|
|
|
|
else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
|
|
|
|
|
{
|
|
|
|
|
endc = '(';
|
|
|
|
|
need_paren = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
endc = ',';
|
|
|
|
|
|
|
|
|
|
/* The call to expression should have advanced str past any
|
|
|
|
|
whitespace. */
|
|
|
|
|
if (*str != endc
|
|
|
|
|
&& (endc != ',' || *str != '\0'))
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (*str != '\0')
|
|
|
|
|
++str;
|
|
|
|
|
}
|
|
|
|
|
|
2001-09-19 05:33:36 +00:00
|
|
|
|
while (ISSPACE (*str))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
++str;
|
|
|
|
|
|
|
|
|
|
if (*str != '\0')
|
|
|
|
|
as_bad (_("junk at end of line: `%s'"), str);
|
|
|
|
|
|
2002-08-21 23:37:34 +00:00
|
|
|
|
#ifdef OBJ_ELF
|
2002-08-19 21:08:55 +00:00
|
|
|
|
/* Do we need/want a APUinfo section? */
|
|
|
|
|
if (ppc_cpu & (PPC_OPCODE_SPE
|
|
|
|
|
| PPC_OPCODE_ISEL | PPC_OPCODE_EFS
|
|
|
|
|
| PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
|
|
|
|
|
| PPC_OPCODE_RFMCI))
|
|
|
|
|
{
|
|
|
|
|
/* These are all version "1". */
|
|
|
|
|
if (opcode->flags & PPC_OPCODE_SPE)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
|
2002-08-19 21:08:55 +00:00
|
|
|
|
if (opcode->flags & PPC_OPCODE_ISEL)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
|
2002-08-19 21:08:55 +00:00
|
|
|
|
if (opcode->flags & PPC_OPCODE_EFS)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
|
2002-08-19 21:08:55 +00:00
|
|
|
|
if (opcode->flags & PPC_OPCODE_BRLOCK)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
|
2002-08-19 21:08:55 +00:00
|
|
|
|
if (opcode->flags & PPC_OPCODE_PMR)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
|
2002-08-19 21:08:55 +00:00
|
|
|
|
if (opcode->flags & PPC_OPCODE_CACHELCK)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
|
2002-08-19 21:08:55 +00:00
|
|
|
|
if (opcode->flags & PPC_OPCODE_RFMCI)
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
|
2002-08-19 21:08:55 +00:00
|
|
|
|
}
|
2002-08-21 23:37:34 +00:00
|
|
|
|
#endif
|
2002-08-19 21:08:55 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* Write out the instruction. */
|
|
|
|
|
f = frag_more (4);
|
|
|
|
|
md_number_to_chars (f, insn, 4);
|
|
|
|
|
|
2000-12-12 20:05:16 +00:00
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
dwarf2_emit_insn (4);
|
|
|
|
|
#endif
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* Create any fixups. At this point we do not use a
|
|
|
|
|
bfd_reloc_code_real_type, but instead just use the
|
|
|
|
|
BFD_RELOC_UNUSED plus the operand index. This lets us easily
|
|
|
|
|
handle fixups for any operand type, although that is admittedly
|
|
|
|
|
not a very exciting feature. We pick a BFD reloc type in
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_apply_fix3. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
for (i = 0; i < fc; i++)
|
|
|
|
|
{
|
|
|
|
|
const struct powerpc_operand *operand;
|
|
|
|
|
|
|
|
|
|
operand = &powerpc_operands[fixups[i].opindex];
|
|
|
|
|
if (fixups[i].reloc != BFD_RELOC_UNUSED)
|
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
reloc_howto_type *reloc_howto;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
int size;
|
|
|
|
|
int offset;
|
|
|
|
|
fixS *fixP;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (!reloc_howto)
|
|
|
|
|
abort ();
|
|
|
|
|
|
|
|
|
|
size = bfd_get_reloc_size (reloc_howto);
|
|
|
|
|
offset = target_big_endian ? (4 - size) : 0;
|
|
|
|
|
|
|
|
|
|
if (size < 1 || size > 4)
|
2000-12-03 06:49:23 +00:00
|
|
|
|
abort ();
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
fixP = fix_new_exp (frag_now,
|
|
|
|
|
f - frag_now->fr_literal + offset,
|
|
|
|
|
size,
|
|
|
|
|
&fixups[i].exp,
|
|
|
|
|
reloc_howto->pc_relative,
|
1999-05-03 07:29:11 +00:00
|
|
|
|
fixups[i].reloc);
|
|
|
|
|
|
|
|
|
|
/* Turn off complaints that the addend is too large for things like
|
|
|
|
|
foo+100000@ha. */
|
|
|
|
|
switch (fixups[i].reloc)
|
|
|
|
|
{
|
|
|
|
|
case BFD_RELOC_16_GOTOFF:
|
|
|
|
|
case BFD_RELOC_PPC_TOC16:
|
|
|
|
|
case BFD_RELOC_LO16:
|
|
|
|
|
case BFD_RELOC_HI16:
|
|
|
|
|
case BFD_RELOC_HI16_S:
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHER:
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHER_S:
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHEST:
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHEST_S:
|
|
|
|
|
#endif
|
1999-05-03 07:29:11 +00:00
|
|
|
|
fixP->fx_no_overflow = 1;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
2001-07-02 10:54:49 +00:00
|
|
|
|
fix_new_exp (frag_now,
|
|
|
|
|
f - frag_now->fr_literal,
|
|
|
|
|
4,
|
1999-05-03 07:29:11 +00:00
|
|
|
|
&fixups[i].exp,
|
|
|
|
|
(operand->flags & PPC_OPERAND_RELATIVE) != 0,
|
|
|
|
|
((bfd_reloc_code_real_type)
|
2001-07-02 10:54:49 +00:00
|
|
|
|
(fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Handle a macro. Gather all the operands, transform them as
|
|
|
|
|
described by the macro, and call md_assemble recursively. All the
|
|
|
|
|
operands are separated by commas; we don't accept parentheses
|
|
|
|
|
around operands here. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_macro (str, macro)
|
|
|
|
|
char *str;
|
|
|
|
|
const struct powerpc_macro *macro;
|
|
|
|
|
{
|
|
|
|
|
char *operands[10];
|
|
|
|
|
unsigned int count;
|
|
|
|
|
char *s;
|
|
|
|
|
unsigned int len;
|
|
|
|
|
const char *format;
|
|
|
|
|
int arg;
|
|
|
|
|
char *send;
|
|
|
|
|
char *complete;
|
|
|
|
|
|
|
|
|
|
/* Gather the users operands into the operands array. */
|
|
|
|
|
count = 0;
|
|
|
|
|
s = str;
|
|
|
|
|
while (1)
|
|
|
|
|
{
|
|
|
|
|
if (count >= sizeof operands / sizeof operands[0])
|
|
|
|
|
break;
|
|
|
|
|
operands[count++] = s;
|
|
|
|
|
s = strchr (s, ',');
|
|
|
|
|
if (s == (char *) NULL)
|
|
|
|
|
break;
|
|
|
|
|
*s++ = '\0';
|
2000-09-26 07:09:19 +00:00
|
|
|
|
}
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (count != macro->operands)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("wrong number of operands"));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Work out how large the string must be (the size is unbounded
|
|
|
|
|
because it includes user input). */
|
|
|
|
|
len = 0;
|
|
|
|
|
format = macro->format;
|
|
|
|
|
while (*format != '\0')
|
|
|
|
|
{
|
|
|
|
|
if (*format != '%')
|
|
|
|
|
{
|
|
|
|
|
++len;
|
|
|
|
|
++format;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
arg = strtol (format + 1, &send, 10);
|
|
|
|
|
know (send != format && arg >= 0 && arg < count);
|
|
|
|
|
len += strlen (operands[arg]);
|
|
|
|
|
format = send;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Put the string together. */
|
|
|
|
|
complete = s = (char *) alloca (len + 1);
|
|
|
|
|
format = macro->format;
|
|
|
|
|
while (*format != '\0')
|
|
|
|
|
{
|
|
|
|
|
if (*format != '%')
|
|
|
|
|
*s++ = *format++;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
arg = strtol (format + 1, &send, 10);
|
|
|
|
|
strcpy (s, operands[arg]);
|
|
|
|
|
s += strlen (s);
|
|
|
|
|
format = send;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
*s = '\0';
|
|
|
|
|
|
|
|
|
|
/* Assemble the constructed instruction. */
|
|
|
|
|
md_assemble (complete);
|
2000-09-26 07:09:19 +00:00
|
|
|
|
}
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
ppc_section_letter (letter, ptr_msg)
|
|
|
|
|
int letter;
|
|
|
|
|
char **ptr_msg;
|
|
|
|
|
{
|
|
|
|
|
if (letter == 'e')
|
|
|
|
|
return SHF_EXCLUDE;
|
|
|
|
|
|
* elf.c (_bfd_elf_make_section_from_shdr): Set SEC_THREAD_LOCAL
for symbols from SHF_TLS section.
(_bfd_elf_print_private_bfd_data): Add PT_TLS.
(elf_fake_sections): Set SHF_TLS for SEC_THREAD_LOCAL sections.
(map_sections_to_segments): Build PT_TLS segment if necessary.
(assign_file_positions_for_segments): Likewise.
(get_program_header_size): Account for PT_TLS segment.
(swap_out_syms): Set type of BSF_THREAD_LOCAL symbols and symbols from
SEC_THREAD_LOCAL sections to STT_TLS.
* reloc.c: Add 386 and IA-64 TLS relocs.
* section.c (SEC_THREAD_LOCAL): Define.
(SEC_CONSTRUCTOR_TEXT, SEC_CONSTRUCTOR_DATA, SEC_CONSTRUCTOR_BSS):
Remove.
* elflink.h (elf_link_add_object_symbols): Support .tcommon.
(size_dynamic_sections): If DF_STATIC_TLS, set DF_FLAGS
unconditionally.
(struct elf_final_link_info): Add first_tls_sec.
(elf_bfd_final_link): Set first_tls_sec.
Compute elf_hash_table (info)->tls_segment.
(elf_link_output_extsym): Handle STT_TLS symbols.
(elf_link_input_bfd): Likewise.
* syms.c (BSF_THREAD_LOCAL): Define.
* bfd-in2.h: Rebuilt.
* libbfd.h: Rebuilt.
* elf32-i386.c (elf_i386_tls_transition, dtpoff_base, tpoff,
elf_i386_mkobject, elf_i386_object_p): New functions.
(elf_howto_table): Add TLS relocs.
(elf_i386_reloc_type_lookup): Support TLS relocs.
(elf_i386_info_to_howto_rel): Likewise.
(struct elf_i386_link_hash_entry): Add tls_type.
(struct elf_i386_obj_tdata): New.
(elf_i386_hash_entry, elf_i386_tdata, elf_i386_local_got_tls_type):
New macros.
(struct elf_i386_link_hash_table): Add tls_ldm_got.
(link_hash_newfunc): Clear tls_type.
(elf_i386_check_relocs): Support TLS relocs.
(elf_i386_gc_sweep_hook): Likewise.
(allocate_dynrelocs): Likewise.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Likewise.
(elf_i386_finish_dynamic_symbol): Likewise.
(bfd_elf32_mkobject, elf_backend_object_p): Define.
* elfxx-ia64.c (struct elfNN_ia64_dyn_sym_info): Add tprel_offset,
dtpmod_offset, dtprel_offset, tprel_done, dtpmod_done, dtprel_done,
want_tprel, want_dtpmod, want_dtprel.
(elfNN_ia64_tprel_base, elfNN_ia64_dtprel_base): New functions.
(ia64_howto_table): Add TLS relocs, rename R_IA64_LTOFF_TP22 to
R_IA64_LTOFF_TPREL22.
(elf_code_to_howto_index): Add TLS relocs.
(elfNN_ia64_check_relocs): Support TLS relocs.
(allocate_global_data_got): Account for TLS .got data.
(allocate_dynrel_entries): Account for TLS dynamic relocations.
(elfNN_ia64_install_value): Supprt TLS relocs.
(set_got_entry): Support TLS relocs.
(elfNN_ia64_relocate_section): Likewise.
* config/obj-elf.c (elf_common): Renamed from obj_elf_common.
(obj_elf_common): Call elf_common.
(obj_elf_tls_common): New function.
(elf_pseudo_tab): Support .tls_common.
(special_sections): Add .tdata and .tbss.
(obj_elf_change_section): Set SEC_THREAD_LOCAL for SHF_TLS
sections.
(obj_elf_parse_section_letters): Support T in section flags (SHF_TLS).
(obj_elf_parse_section_letters): Include T in error message.
* config/tc-ppc.c (ppc_section_letter): Likewise.
* config/tc-alpha.c (alpha_elf_section_letter): Likewise.
(tc_gen_reloc): Handle SEC_THREAD_LOCAL the same way as
SEC_MERGE.
* config/tc-sparc.c (md_apply_fix3): Likewise.
* config/tc-i386.c (tc_i386_fix_adjustable): Add TLS relocs.
Define them if not BFD_ASSEMBLER.
(lex_got): Support @TLSGD, @TLSLDM, @GOTTPOFF, @TPOFF, @DTPOFF
and @NTPOFF.
(md_apply_fix3): Add TLS relocs.
* config/tc-ia64.c (enum reloc_func): Add FUNC_DTP_MODULE,
FUNC_DTP_RELATIVE, FUNC_TP_RELATIVE, FUNC_LT_DTP_MODULE,
FUNC_LT_DTP_RELATIVE, FUNC_LT_TP_RELATIVE.
(pseudo_func): Support @dtpmod(), @dtprel() and @tprel().
(ia64_elf_section_letter): Include T in error message.
(md_begin): Support TLS operators.
(md_operand): Likewise.
(ia64_gen_real_reloc_type): Support TLS relocs.
* testsuite/gas/i386/tlspic.s: New file.
* testsuite/gas/i386/tlsd.s: New file.
* testsuite/gas/i386/tlsnopic.s: New file.
* testsuite/gas/i386/tlsd.d: New file.
* testsuite/gas/i386/tlsnopic.d: New file.
* testsuite/gas/i386/tlspic.d: New file.
* testsuite/gas/i386/i386.exp: Add tlsd, tlsnopic and tlspic tests.
* testsuite/gas/ia64/tls.s: New file.
* testsuite/gas/ia64/tls.d: New file.
* testsuite/gas/ia64/ia64.exp: Add tls test.
* write.c (adjust_reloc_syms): Don't change symbols in
SEC_THREAD_LOCAL sections to STT_SECTION + addend.
* elf/common.h (PT_TLS, SHF_TLS, STT_TLS, DF_STATIC_TLS): Define.
* elf/ia64.h (R_IA64_LTOFF_TPREL22): Renamed from R_IA64_LTOFF_TP22.
* elf/i386.h: Add TLS relocs.
* scripttempl/elf.sc: Add .rel{,a}.t{bss,data}, .tdata and .tbss.
* ldlang.c (lang_add_section): Set SEC_THREAD_LOCAL for
output section if necessary. Handle .tbss.
(lang_size_sections): Clear _raw_size for .tbss section
(it allocates space in PT_TLS segment only).
* ldwrite.c (build_link_order): Build link order for .tbss too.
* readelf.c (get_segment_type): Add PT_TLS.
(get_elf_section_flags): Add SHF_TLS.
(get_dynamic_flags): Optimize. Add DF_STATIC_TLS.
(process_dynamic_segment): Use puts instead of printf.
(get_symbol_type): Support STT_TLS.
* objdump.c (dump_section_header): Remove SEC_CONSTRUCTOR_TEXT,
SEC_CONSTRUCTOR_DATA, SEC_CONSTRUCTOR_BSS.
Add SEC_THREAD_LOCAL.
2002-05-23 13:12:53 +00:00
|
|
|
|
*ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
|
1999-05-03 07:29:11 +00:00
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
1999-06-05 23:15:34 +00:00
|
|
|
|
ppc_section_word (str, len)
|
|
|
|
|
char *str;
|
|
|
|
|
size_t len;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
1999-06-05 23:15:34 +00:00
|
|
|
|
if (len == 7 && strncmp (str, "exclude", 7) == 0)
|
|
|
|
|
return SHF_EXCLUDE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
1999-06-05 23:15:34 +00:00
|
|
|
|
return -1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
1999-06-05 23:15:34 +00:00
|
|
|
|
ppc_section_type (str, len)
|
|
|
|
|
char *str;
|
|
|
|
|
size_t len;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
1999-06-05 23:15:34 +00:00
|
|
|
|
if (len == 7 && strncmp (str, "ordered", 7) == 0)
|
|
|
|
|
return SHT_ORDERED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
1999-06-05 23:15:34 +00:00
|
|
|
|
return -1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
ppc_section_flags (flags, attr, type)
|
|
|
|
|
int flags;
|
|
|
|
|
int attr;
|
|
|
|
|
int type;
|
|
|
|
|
{
|
|
|
|
|
if (type == SHT_ORDERED)
|
|
|
|
|
flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
|
|
|
|
|
|
|
|
|
|
if (attr & SHF_EXCLUDE)
|
|
|
|
|
flags |= SEC_EXCLUDE;
|
|
|
|
|
|
|
|
|
|
return flags;
|
|
|
|
|
}
|
|
|
|
|
#endif /* OBJ_ELF */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Pseudo-op handling. */
|
|
|
|
|
|
|
|
|
|
/* The .byte pseudo-op. This is similar to the normal .byte
|
|
|
|
|
pseudo-op, but it can also take a single ASCII string. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_byte (ignore)
|
2000-04-02 06:27:51 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
if (*input_line_pointer != '\"')
|
|
|
|
|
{
|
|
|
|
|
cons (1);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Gather characters. A real double quote is doubled. Unusual
|
|
|
|
|
characters are not permitted. */
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
while (1)
|
|
|
|
|
{
|
|
|
|
|
char c;
|
|
|
|
|
|
|
|
|
|
c = *input_line_pointer++;
|
|
|
|
|
|
|
|
|
|
if (c == '\"')
|
|
|
|
|
{
|
|
|
|
|
if (*input_line_pointer != '\"')
|
|
|
|
|
break;
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
FRAG_APPEND_1_CHAR (c);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_XCOFF
|
|
|
|
|
|
|
|
|
|
/* XCOFF specific pseudo-op handling. */
|
|
|
|
|
|
|
|
|
|
/* This is set if we are creating a .stabx symbol, since we don't want
|
|
|
|
|
to handle symbol suffixes for such symbols. */
|
2002-11-30 08:39:46 +00:00
|
|
|
|
static bfd_boolean ppc_stab_symbol;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
|
|
|
|
|
symbols in the .bss segment as though they were local common
|
2001-06-20 13:34:10 +00:00
|
|
|
|
symbols, and uses a different smclas. The native Aix 4.3.3 assember
|
|
|
|
|
aligns .comm and .lcomm to 4 bytes. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_comm (lcomm)
|
|
|
|
|
int lcomm;
|
|
|
|
|
{
|
|
|
|
|
asection *current_seg = now_seg;
|
|
|
|
|
subsegT current_subseg = now_subseg;
|
|
|
|
|
char *name;
|
|
|
|
|
char endc;
|
|
|
|
|
char *end_name;
|
|
|
|
|
offsetT size;
|
|
|
|
|
offsetT align;
|
|
|
|
|
symbolS *lcomm_sym = NULL;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
char *pfrag;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
|
|
|
|
end_name = input_line_pointer;
|
|
|
|
|
*end_name = endc;
|
|
|
|
|
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("missing size"));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
|
|
|
|
|
size = get_absolute_expression ();
|
|
|
|
|
if (size < 0)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("negative size"));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (! lcomm)
|
|
|
|
|
{
|
|
|
|
|
/* The third argument to .comm is the alignment. */
|
|
|
|
|
if (*input_line_pointer != ',')
|
2001-06-20 13:34:10 +00:00
|
|
|
|
align = 2;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
align = get_absolute_expression ();
|
|
|
|
|
if (align <= 0)
|
|
|
|
|
{
|
|
|
|
|
as_warn (_("ignoring bad alignment"));
|
2001-06-20 13:34:10 +00:00
|
|
|
|
align = 2;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
char *lcomm_name;
|
|
|
|
|
char lcomm_endc;
|
|
|
|
|
|
2001-06-20 13:34:10 +00:00
|
|
|
|
if (size <= 4)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
align = 2;
|
|
|
|
|
else
|
|
|
|
|
align = 3;
|
|
|
|
|
|
|
|
|
|
/* The third argument to .lcomm appears to be the real local
|
|
|
|
|
common symbol to create. References to the symbol named in
|
|
|
|
|
the first argument are turned into references to the third
|
|
|
|
|
argument. */
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("missing real symbol name"));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
|
|
|
|
|
lcomm_name = input_line_pointer;
|
|
|
|
|
lcomm_endc = get_symbol_end ();
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
lcomm_sym = symbol_find_or_make (lcomm_name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = lcomm_endc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
*end_name = '\0';
|
|
|
|
|
sym = symbol_find_or_make (name);
|
|
|
|
|
*end_name = endc;
|
|
|
|
|
|
|
|
|
|
if (S_IS_DEFINED (sym)
|
|
|
|
|
|| S_GET_VALUE (sym) != 0)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("attempt to redefine symbol"));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
record_alignment (bss_section, align);
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (! lcomm
|
|
|
|
|
|| ! S_IS_DEFINED (lcomm_sym))
|
|
|
|
|
{
|
|
|
|
|
symbolS *def_sym;
|
|
|
|
|
offsetT def_size;
|
|
|
|
|
|
|
|
|
|
if (! lcomm)
|
|
|
|
|
{
|
|
|
|
|
def_sym = sym;
|
|
|
|
|
def_size = size;
|
|
|
|
|
S_SET_EXTERNAL (sym);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (lcomm_sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
def_sym = lcomm_sym;
|
|
|
|
|
def_size = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
subseg_set (bss_section, 1);
|
|
|
|
|
frag_align (align, 0, 0);
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (def_sym, frag_now);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
|
|
|
|
|
def_size, (char *) NULL);
|
|
|
|
|
*pfrag = 0;
|
|
|
|
|
S_SET_SEGMENT (def_sym, bss_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (def_sym)->align = align;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
else if (lcomm)
|
|
|
|
|
{
|
|
|
|
|
/* Align the size of lcomm_sym. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_frag (lcomm_sym)->fr_offset =
|
|
|
|
|
((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
&~ ((1 << align) - 1));
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (align > symbol_get_tc (lcomm_sym)->align)
|
|
|
|
|
symbol_get_tc (lcomm_sym)->align = align;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (lcomm)
|
|
|
|
|
{
|
|
|
|
|
/* Make sym an offset from lcomm_sym. */
|
|
|
|
|
S_SET_SEGMENT (sym, bss_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
|
|
|
|
|
S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
|
|
|
|
|
symbol_get_frag (lcomm_sym)->fr_offset += size;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
subseg_set (current_seg, current_subseg);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .csect pseudo-op. This switches us into a different
|
|
|
|
|
subsegment. The first argument is a symbol whose value is the
|
|
|
|
|
start of the .csect. In COFF, csect symbols get special aux
|
|
|
|
|
entries defined by the x_csect field of union internal_auxent. The
|
|
|
|
|
optional second argument is the alignment (the default is 2). */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_csect (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
char endc;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
sym = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = endc;
|
|
|
|
|
|
|
|
|
|
if (S_GET_NAME (sym)[0] == '\0')
|
|
|
|
|
{
|
|
|
|
|
/* An unnamed csect is assumed to be [PR]. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->class = XMC_PR;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ppc_change_csect (sym);
|
|
|
|
|
|
|
|
|
|
if (*input_line_pointer == ',')
|
|
|
|
|
{
|
|
|
|
|
++input_line_pointer;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->align = get_absolute_expression ();
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Change to a different csect. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_change_csect (sym)
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
{
|
|
|
|
|
if (S_IS_DEFINED (sym))
|
1999-06-19 14:04:45 +00:00
|
|
|
|
subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
symbolS **list_ptr;
|
|
|
|
|
int after_toc;
|
|
|
|
|
int hold_chunksize;
|
|
|
|
|
symbolS *list;
|
|
|
|
|
|
|
|
|
|
/* This is a new csect. We need to look at the symbol class to
|
|
|
|
|
figure out whether it should go in the text section or the
|
|
|
|
|
data section. */
|
|
|
|
|
after_toc = 0;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
switch (symbol_get_tc (sym)->class)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
case XMC_PR:
|
|
|
|
|
case XMC_RO:
|
|
|
|
|
case XMC_DB:
|
|
|
|
|
case XMC_GL:
|
|
|
|
|
case XMC_XO:
|
|
|
|
|
case XMC_SV:
|
|
|
|
|
case XMC_TI:
|
|
|
|
|
case XMC_TB:
|
|
|
|
|
S_SET_SEGMENT (sym, text_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->subseg = ppc_text_subsegment;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
++ppc_text_subsegment;
|
|
|
|
|
list_ptr = &ppc_text_csects;
|
|
|
|
|
break;
|
|
|
|
|
case XMC_RW:
|
|
|
|
|
case XMC_TC0:
|
|
|
|
|
case XMC_TC:
|
|
|
|
|
case XMC_DS:
|
|
|
|
|
case XMC_UA:
|
|
|
|
|
case XMC_BS:
|
|
|
|
|
case XMC_UC:
|
|
|
|
|
if (ppc_toc_csect != NULL
|
1999-06-19 14:04:45 +00:00
|
|
|
|
&& (symbol_get_tc (ppc_toc_csect)->subseg + 1
|
|
|
|
|
== ppc_data_subsegment))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
after_toc = 1;
|
|
|
|
|
S_SET_SEGMENT (sym, data_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->subseg = ppc_data_subsegment;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
++ppc_data_subsegment;
|
|
|
|
|
list_ptr = &ppc_data_csects;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
abort ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We set the obstack chunk size to a small value before
|
2001-07-02 10:54:49 +00:00
|
|
|
|
changing subsegments, so that we don't use a lot of memory
|
|
|
|
|
space for what may be a small section. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
hold_chunksize = chunksize;
|
|
|
|
|
chunksize = 64;
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
subseg_new (segment_name (S_GET_SEGMENT (sym)),
|
|
|
|
|
symbol_get_tc (sym)->subseg);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
chunksize = hold_chunksize;
|
|
|
|
|
|
|
|
|
|
if (after_toc)
|
|
|
|
|
ppc_after_toc_frag = frag_now;
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, frag_now);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_VALUE (sym, (valueT) frag_now_fix ());
|
|
|
|
|
|
2002-06-12 16:14:02 +00:00
|
|
|
|
symbol_get_tc (sym)->align = 2;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
|
|
|
|
symbol_get_tc (sym)->within = sym;
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
for (list = *list_ptr;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (list)->next != (symbolS *) NULL;
|
|
|
|
|
list = symbol_get_tc (list)->next)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (list)->next = sym;
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
symbol_remove (sym, &symbol_rootP, &symbol_lastP);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
|
|
|
|
|
&symbol_lastP);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ppc_current_csect = sym;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This function handles the .text and .data pseudo-ops. These
|
|
|
|
|
pseudo-ops aren't really used by XCOFF; we implement them for the
|
|
|
|
|
convenience of people who aren't used to XCOFF. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_section (type)
|
|
|
|
|
int type;
|
|
|
|
|
{
|
|
|
|
|
const char *name;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
if (type == 't')
|
|
|
|
|
name = ".text[PR]";
|
|
|
|
|
else if (type == 'd')
|
|
|
|
|
name = ".data[RW]";
|
|
|
|
|
else
|
|
|
|
|
abort ();
|
|
|
|
|
|
|
|
|
|
sym = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
ppc_change_csect (sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This function handles the .section pseudo-op. This is mostly to
|
|
|
|
|
give an error, since XCOFF only supports .text, .data and .bss, but
|
|
|
|
|
we do permit the user to name the text or data section. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_named_section (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *user_name;
|
|
|
|
|
const char *real_name;
|
|
|
|
|
char c;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
user_name = input_line_pointer;
|
|
|
|
|
c = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
if (strcmp (user_name, ".text") == 0)
|
|
|
|
|
real_name = ".text[PR]";
|
|
|
|
|
else if (strcmp (user_name, ".data") == 0)
|
|
|
|
|
real_name = ".data[RW]";
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("The XCOFF file format does not support arbitrary sections"));
|
|
|
|
|
*input_line_pointer = c;
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = c;
|
|
|
|
|
|
|
|
|
|
sym = symbol_find_or_make (real_name);
|
|
|
|
|
|
|
|
|
|
ppc_change_csect (sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .extern pseudo-op. We create an undefined symbol. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_extern (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
char endc;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
(void) symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = endc;
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_lglobl (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
char endc;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
sym = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = endc;
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
|
|
|
|
|
although I don't know why it bothers. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_rename (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
char endc;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
int len;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
sym = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = endc;
|
|
|
|
|
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("missing rename string"));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .stabx pseudo-op. This is similar to a normal .stabs
|
|
|
|
|
pseudo-op, but slightly different. A sample is
|
|
|
|
|
.stabx "main:F-1",.main,142,0
|
|
|
|
|
The first argument is the symbol name to create. The second is the
|
|
|
|
|
value, and the third is the storage class. The fourth seems to be
|
|
|
|
|
always zero, and I am assuming it is the type. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_stabx (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
int len;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
expressionS exp;
|
|
|
|
|
|
|
|
|
|
name = demand_copy_C_string (&len);
|
|
|
|
|
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("missing value"));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_stab_symbol = TRUE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
sym = symbol_make (name);
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_stab_symbol = FALSE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->real_name = name;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
(void) expression (&exp);
|
|
|
|
|
|
|
|
|
|
switch (exp.X_op)
|
|
|
|
|
{
|
|
|
|
|
case O_illegal:
|
|
|
|
|
case O_absent:
|
|
|
|
|
case O_big:
|
|
|
|
|
as_bad (_("illegal .stabx expression; zero assumed"));
|
|
|
|
|
exp.X_add_number = 0;
|
|
|
|
|
/* Fall through. */
|
|
|
|
|
case O_constant:
|
|
|
|
|
S_SET_VALUE (sym, (valueT) exp.X_add_number);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, &zero_address_frag);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case O_symbol:
|
|
|
|
|
if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_value_expression (sym, &exp);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
S_SET_VALUE (sym,
|
|
|
|
|
exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
/* The value is some complex expression. This will probably
|
2001-07-02 10:54:49 +00:00
|
|
|
|
fail at some later point, but this is probably the right
|
|
|
|
|
thing to do here. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_value_expression (sym, &exp);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
S_SET_SEGMENT (sym, ppc_coff_debug_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("missing class"));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
|
|
|
|
|
S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
|
|
|
|
|
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("missing type"));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
|
|
|
|
|
S_SET_DATA_TYPE (sym, get_absolute_expression ());
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2001-05-24 21:39:09 +00:00
|
|
|
|
if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
|
2001-07-02 10:54:49 +00:00
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->within = ppc_current_block;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2001-05-29 14:53:22 +00:00
|
|
|
|
/* In this case :
|
2001-07-02 10:54:49 +00:00
|
|
|
|
|
2001-05-29 14:53:22 +00:00
|
|
|
|
.bs name
|
|
|
|
|
.stabx "z",arrays_,133,0
|
|
|
|
|
.es
|
2001-07-02 10:54:49 +00:00
|
|
|
|
|
2001-05-29 14:53:22 +00:00
|
|
|
|
.comm arrays_,13768,3
|
2001-07-02 10:54:49 +00:00
|
|
|
|
|
2001-05-29 14:53:22 +00:00
|
|
|
|
resolve_symbol_value will copy the exp's "within" into sym's when the
|
|
|
|
|
offset is 0. Since this seems to be corner case problem,
|
|
|
|
|
only do the correction for storage class C_STSYM. A better solution
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
would be to have the tc field updated in ppc_symbol_new_hook. */
|
2001-07-02 10:54:49 +00:00
|
|
|
|
|
|
|
|
|
if (exp.X_op == O_symbol)
|
2001-05-29 14:53:22 +00:00
|
|
|
|
{
|
|
|
|
|
symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
|
|
|
|
|
}
|
2001-05-24 21:39:09 +00:00
|
|
|
|
}
|
2001-07-02 10:54:49 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (exp.X_op != O_symbol
|
|
|
|
|
|| ! S_IS_EXTERNAL (exp.X_add_symbol)
|
|
|
|
|
|| S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
symbol_remove (sym, &symbol_rootP, &symbol_lastP);
|
|
|
|
|
symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
|
|
|
|
|
symbol_get_tc (ppc_current_csect)->within = sym;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .function pseudo-op. This takes several arguments. The first
|
|
|
|
|
argument seems to be the external name of the symbol. The second
|
|
|
|
|
argment seems to be the label for the start of the function. gcc
|
|
|
|
|
uses the same name for both. I have no idea what the third and
|
|
|
|
|
fourth arguments are meant to be. The optional fifth argument is
|
|
|
|
|
an expression for the size of the function. In COFF this symbol
|
|
|
|
|
gets an aux entry like that used for a csect. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_function (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
char endc;
|
|
|
|
|
char *s;
|
|
|
|
|
symbolS *ext_sym;
|
|
|
|
|
symbolS *lab_sym;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
/* Ignore any [PR] suffix. */
|
|
|
|
|
name = ppc_canonicalize_symbol_name (name);
|
|
|
|
|
s = strchr (name, '[');
|
|
|
|
|
if (s != (char *) NULL
|
|
|
|
|
&& strcmp (s + 1, "PR]") == 0)
|
|
|
|
|
*s = '\0';
|
|
|
|
|
|
|
|
|
|
ext_sym = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = endc;
|
|
|
|
|
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("missing symbol name"));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
lab_sym = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = endc;
|
|
|
|
|
|
|
|
|
|
if (ext_sym != lab_sym)
|
|
|
|
|
{
|
1999-06-19 14:04:45 +00:00
|
|
|
|
expressionS exp;
|
|
|
|
|
|
|
|
|
|
exp.X_op = O_symbol;
|
|
|
|
|
exp.X_add_symbol = lab_sym;
|
|
|
|
|
exp.X_op_symbol = NULL;
|
|
|
|
|
exp.X_add_number = 0;
|
|
|
|
|
exp.X_unsigned = 0;
|
|
|
|
|
symbol_set_value_expression (ext_sym, &exp);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (symbol_get_tc (ext_sym)->class == -1)
|
|
|
|
|
symbol_get_tc (ext_sym)->class = XMC_PR;
|
|
|
|
|
symbol_get_tc (ext_sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (*input_line_pointer == ',')
|
|
|
|
|
{
|
|
|
|
|
expressionS ignore;
|
|
|
|
|
|
|
|
|
|
/* Ignore the third argument. */
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
expression (&ignore);
|
|
|
|
|
if (*input_line_pointer == ',')
|
|
|
|
|
{
|
|
|
|
|
/* Ignore the fourth argument. */
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
expression (&ignore);
|
|
|
|
|
if (*input_line_pointer == ',')
|
|
|
|
|
{
|
|
|
|
|
/* The fifth argument is the function size. */
|
|
|
|
|
++input_line_pointer;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
|
|
|
|
|
absolute_section,
|
|
|
|
|
(valueT) 0,
|
|
|
|
|
&zero_address_frag);
|
|
|
|
|
pseudo_set (symbol_get_tc (ext_sym)->size);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
|
|
|
|
|
SF_SET_FUNCTION (ext_sym);
|
|
|
|
|
SF_SET_PROCESS (ext_sym);
|
|
|
|
|
coff_add_linesym (ext_sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
|
2001-10-08 18:14:43 +00:00
|
|
|
|
".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
|
|
|
|
|
with the correct line number */
|
2002-05-11 09:53:52 +00:00
|
|
|
|
|
2001-10-08 18:14:43 +00:00
|
|
|
|
static symbolS *saved_bi_sym = 0;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_bf (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
sym = symbol_make (".bf");
|
|
|
|
|
S_SET_SEGMENT (sym, text_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, frag_now);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_VALUE (sym, frag_now_fix ());
|
|
|
|
|
S_SET_STORAGE_CLASS (sym, C_FCN);
|
|
|
|
|
|
|
|
|
|
coff_line_base = get_absolute_expression ();
|
|
|
|
|
|
|
|
|
|
S_SET_NUMBER_AUXILIARY (sym, 1);
|
|
|
|
|
SA_SET_SYM_LNNO (sym, coff_line_base);
|
|
|
|
|
|
2001-10-08 18:14:43 +00:00
|
|
|
|
/* Line number for bi. */
|
2002-05-11 09:53:52 +00:00
|
|
|
|
if (saved_bi_sym)
|
2001-10-08 18:14:43 +00:00
|
|
|
|
{
|
|
|
|
|
S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
|
|
|
|
|
saved_bi_sym = 0;
|
|
|
|
|
}
|
2002-05-11 09:53:52 +00:00
|
|
|
|
|
2001-10-08 18:14:43 +00:00
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
|
|
|
|
|
".ef", except that the line number is absolute, not relative to the
|
|
|
|
|
most recent ".bf" symbol. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_ef (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
sym = symbol_make (".ef");
|
|
|
|
|
S_SET_SEGMENT (sym, text_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, frag_now);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_VALUE (sym, frag_now_fix ());
|
|
|
|
|
S_SET_STORAGE_CLASS (sym, C_FCN);
|
|
|
|
|
S_SET_NUMBER_AUXILIARY (sym, 1);
|
|
|
|
|
SA_SET_SYM_LNNO (sym, get_absolute_expression ());
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .bi and .ei pseudo-ops. These take a string argument and
|
|
|
|
|
generates a C_BINCL or C_EINCL symbol, which goes at the start of
|
2001-10-08 18:14:43 +00:00
|
|
|
|
the symbol list. The value of .bi will be know when the next .bf
|
|
|
|
|
is encountered. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_biei (ei)
|
|
|
|
|
int ei;
|
|
|
|
|
{
|
|
|
|
|
static symbolS *last_biei;
|
|
|
|
|
|
|
|
|
|
char *name;
|
|
|
|
|
int len;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
symbolS *look;
|
|
|
|
|
|
|
|
|
|
name = demand_copy_C_string (&len);
|
|
|
|
|
|
|
|
|
|
/* The value of these symbols is actually file offset. Here we set
|
|
|
|
|
the value to the index into the line number entries. In
|
|
|
|
|
ppc_frob_symbols we set the fix_line field, which will cause BFD
|
|
|
|
|
to do the right thing. */
|
|
|
|
|
|
|
|
|
|
sym = symbol_make (name);
|
|
|
|
|
/* obj-coff.c currently only handles line numbers correctly in the
|
|
|
|
|
.text section. */
|
|
|
|
|
S_SET_SEGMENT (sym, text_section);
|
|
|
|
|
S_SET_VALUE (sym, coff_n_line_nos);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
2001-10-08 18:14:43 +00:00
|
|
|
|
/* Save bi. */
|
2002-05-11 09:53:52 +00:00
|
|
|
|
if (ei)
|
2001-10-08 18:14:43 +00:00
|
|
|
|
saved_bi_sym = 0;
|
|
|
|
|
else
|
|
|
|
|
saved_bi_sym = sym;
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
for (look = last_biei ? last_biei : symbol_rootP;
|
|
|
|
|
(look != (symbolS *) NULL
|
|
|
|
|
&& (S_GET_STORAGE_CLASS (look) == C_FILE
|
|
|
|
|
|| S_GET_STORAGE_CLASS (look) == C_BINCL
|
|
|
|
|
|| S_GET_STORAGE_CLASS (look) == C_EINCL));
|
|
|
|
|
look = symbol_next (look))
|
|
|
|
|
;
|
|
|
|
|
if (look != (symbolS *) NULL)
|
|
|
|
|
{
|
|
|
|
|
symbol_remove (sym, &symbol_rootP, &symbol_lastP);
|
|
|
|
|
symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
|
|
|
|
|
last_biei = sym;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
|
|
|
|
|
There is one argument, which is a csect symbol. The value of the
|
|
|
|
|
.bs symbol is the index of this csect symbol. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_bs (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
char endc;
|
|
|
|
|
symbolS *csect;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
if (ppc_current_block != NULL)
|
|
|
|
|
as_bad (_("nested .bs blocks"));
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
csect = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = endc;
|
|
|
|
|
|
|
|
|
|
sym = symbol_make (".bs");
|
|
|
|
|
S_SET_SEGMENT (sym, now_seg);
|
|
|
|
|
S_SET_STORAGE_CLASS (sym, C_BSTAT);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
|
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->within = csect;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
|
|
|
|
|
ppc_current_block = sym;
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_es (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
if (ppc_current_block == NULL)
|
|
|
|
|
as_bad (_(".es without preceding .bs"));
|
|
|
|
|
|
|
|
|
|
sym = symbol_make (".es");
|
|
|
|
|
S_SET_SEGMENT (sym, now_seg);
|
|
|
|
|
S_SET_STORAGE_CLASS (sym, C_ESTAT);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
|
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
|
|
|
|
|
ppc_current_block = NULL;
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
|
|
|
|
|
line number. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_bb (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
sym = symbol_make (".bb");
|
|
|
|
|
S_SET_SEGMENT (sym, text_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, frag_now);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_VALUE (sym, frag_now_fix ());
|
|
|
|
|
S_SET_STORAGE_CLASS (sym, C_BLOCK);
|
|
|
|
|
|
|
|
|
|
S_SET_NUMBER_AUXILIARY (sym, 1);
|
|
|
|
|
SA_SET_SYM_LNNO (sym, get_absolute_expression ());
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
SF_SET_PROCESS (sym);
|
|
|
|
|
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
|
|
|
|
|
line number. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_eb (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
sym = symbol_make (".eb");
|
|
|
|
|
S_SET_SEGMENT (sym, text_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, frag_now);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_VALUE (sym, frag_now_fix ());
|
|
|
|
|
S_SET_STORAGE_CLASS (sym, C_BLOCK);
|
|
|
|
|
S_SET_NUMBER_AUXILIARY (sym, 1);
|
|
|
|
|
SA_SET_SYM_LNNO (sym, get_absolute_expression ());
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
SF_SET_PROCESS (sym);
|
|
|
|
|
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
|
|
|
|
|
specified name. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_bc (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
int len;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
name = demand_copy_C_string (&len);
|
|
|
|
|
sym = symbol_make (name);
|
|
|
|
|
S_SET_SEGMENT (sym, ppc_coff_debug_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_STORAGE_CLASS (sym, C_BCOMM);
|
|
|
|
|
S_SET_VALUE (sym, 0);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_ec (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
sym = symbol_make (".ec");
|
|
|
|
|
S_SET_SEGMENT (sym, ppc_coff_debug_section);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_STORAGE_CLASS (sym, C_ECOMM);
|
|
|
|
|
S_SET_VALUE (sym, 0);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The .toc pseudo-op. Switch to the .toc subsegment. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_toc (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
if (ppc_toc_csect != (symbolS *) NULL)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
subsegT subseg;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
symbolS *list;
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
subseg = ppc_data_subsegment;
|
|
|
|
|
++ppc_data_subsegment;
|
|
|
|
|
|
|
|
|
|
subseg_new (segment_name (data_section), subseg);
|
|
|
|
|
ppc_toc_frag = frag_now;
|
|
|
|
|
|
|
|
|
|
sym = symbol_find_or_make ("TOC[TC0]");
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, frag_now);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_SEGMENT (sym, data_section);
|
|
|
|
|
S_SET_VALUE (sym, (valueT) frag_now_fix ());
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->subseg = subseg;
|
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
|
|
|
|
symbol_get_tc (sym)->within = sym;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
ppc_toc_csect = sym;
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
for (list = ppc_data_csects;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (list)->next != (symbolS *) NULL;
|
|
|
|
|
list = symbol_get_tc (list)->next)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (list)->next = sym;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
symbol_remove (sym, &symbol_rootP, &symbol_lastP);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
|
|
|
|
|
&symbol_lastP);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ppc_current_csect = ppc_toc_csect;
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The AIX assembler automatically aligns the operands of a .long or
|
|
|
|
|
.short pseudo-op, and we want to be compatible. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_xcoff_cons (log_size)
|
|
|
|
|
int log_size;
|
|
|
|
|
{
|
|
|
|
|
frag_align (log_size, 0, 0);
|
|
|
|
|
record_alignment (now_seg, log_size);
|
|
|
|
|
cons (1 << log_size);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_vbyte (dummy)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int dummy ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
expressionS exp;
|
|
|
|
|
int byte_count;
|
|
|
|
|
|
|
|
|
|
(void) expression (&exp);
|
|
|
|
|
|
|
|
|
|
if (exp.X_op != O_constant)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("non-constant byte count"));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
byte_count = exp.X_add_number;
|
|
|
|
|
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("missing value"));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
cons (byte_count);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#endif /* OBJ_XCOFF */
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* The .tc pseudo-op. This is used when generating either XCOFF or
|
|
|
|
|
ELF. This takes two or more arguments.
|
|
|
|
|
|
|
|
|
|
When generating XCOFF output, the first argument is the name to
|
|
|
|
|
give to this location in the toc; this will be a symbol with class
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
TC. The rest of the arguments are N-byte values to actually put at
|
1999-05-03 07:29:11 +00:00
|
|
|
|
this location in the TOC; often there is just one more argument, a
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
relocateable symbol reference. The size of the value to store
|
|
|
|
|
depends on target word size. A 32-bit target uses 4-byte values, a
|
|
|
|
|
64-bit target uses 8-byte values.
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
When not generating XCOFF output, the arguments are the same, but
|
|
|
|
|
the first argument is simply ignored. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_tc (ignore)
|
2000-04-02 06:27:51 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
#ifdef OBJ_XCOFF
|
|
|
|
|
|
|
|
|
|
/* Define the TOC symbol name. */
|
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
char endc;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
if (ppc_toc_csect == (symbolS *) NULL
|
|
|
|
|
|| ppc_toc_csect != ppc_current_csect)
|
|
|
|
|
{
|
|
|
|
|
as_bad (_(".tc not in .toc section"));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
sym = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = endc;
|
|
|
|
|
|
|
|
|
|
if (S_IS_DEFINED (sym))
|
|
|
|
|
{
|
|
|
|
|
symbolS *label;
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
label = symbol_get_tc (ppc_current_csect)->within;
|
|
|
|
|
if (symbol_get_tc (label)->class != XMC_TC0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
as_bad (_(".tc with no label"));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (label, symbol_get_frag (sym));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_VALUE (label, S_GET_VALUE (sym));
|
|
|
|
|
|
|
|
|
|
while (! is_end_of_line[(unsigned char) *input_line_pointer])
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
S_SET_SEGMENT (sym, now_seg);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_set_frag (sym, frag_now);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_VALUE (sym, (valueT) frag_now_fix ());
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->class = XMC_TC;
|
|
|
|
|
symbol_get_tc (sym)->output = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
ppc_frob_label (sym);
|
|
|
|
|
}
|
|
|
|
|
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#endif /* OBJ_XCOFF */
|
|
|
|
|
#ifdef OBJ_ELF
|
2001-10-04 05:03:44 +00:00
|
|
|
|
int align;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* Skip the TOC symbol name. */
|
|
|
|
|
while (is_part_of_name (*input_line_pointer)
|
|
|
|
|
|| *input_line_pointer == '['
|
|
|
|
|
|| *input_line_pointer == ']'
|
|
|
|
|
|| *input_line_pointer == '{'
|
|
|
|
|
|| *input_line_pointer == '}')
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
/* Align to a four/eight byte boundary. */
|
2002-07-11 01:06:58 +00:00
|
|
|
|
align = ppc_obj64 ? 3 : 2;
|
2001-10-04 05:03:44 +00:00
|
|
|
|
frag_align (align, 0, 0);
|
|
|
|
|
record_alignment (now_seg, align);
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#endif /* OBJ_ELF */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
++input_line_pointer;
|
2002-07-11 01:06:58 +00:00
|
|
|
|
cons (ppc_obj64 ? 8 : 4);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
|
|
|
|
/* Pseudo-op .machine. */
|
2001-10-17 06:03:41 +00:00
|
|
|
|
/* FIXME: `.machine' is a nop for the moment. It would be nice to
|
2002-07-11 01:06:58 +00:00
|
|
|
|
accept this directive on the first line of input and set ppc_obj64
|
2001-10-17 06:03:41 +00:00
|
|
|
|
and the target format accordingly. Unfortunately, the target
|
|
|
|
|
format is selected in output-file.c:output_file_create before we
|
|
|
|
|
even get to md_begin, so it's not possible without changing
|
|
|
|
|
as.c:main. */
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_machine (ignore)
|
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
|
|
|
|
{
|
|
|
|
|
discard_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* See whether a symbol is in the TOC section. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ppc_is_toc_sym (sym)
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
{
|
|
|
|
|
#ifdef OBJ_XCOFF
|
|
|
|
|
return symbol_get_tc (sym)->class == XMC_TC;
|
|
|
|
|
#endif
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
const char *sname = segment_name (S_GET_SEGMENT (sym));
|
2002-07-11 01:06:58 +00:00
|
|
|
|
if (ppc_obj64)
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
return strcmp (sname, ".toc") == 0;
|
|
|
|
|
else
|
|
|
|
|
return strcmp (sname, ".got") == 0;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
#ifdef TE_PE
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* Set the current section. */
|
|
|
|
|
static void
|
|
|
|
|
ppc_set_current_section (new)
|
|
|
|
|
segT new;
|
|
|
|
|
{
|
|
|
|
|
ppc_previous_section = ppc_current_section;
|
|
|
|
|
ppc_current_section = new;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* pseudo-op: .previous
|
|
|
|
|
behaviour: toggles the current section with the previous section.
|
|
|
|
|
errors: None
|
2001-07-02 10:54:49 +00:00
|
|
|
|
warnings: "No previous section" */
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static void
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_previous (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
symbolS *tmp;
|
|
|
|
|
|
2000-09-26 07:09:19 +00:00
|
|
|
|
if (ppc_previous_section == NULL)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
as_warn (_("No previous section to return to. Directive ignored."));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
subseg_set (ppc_previous_section, 0);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_set_current_section (ppc_previous_section);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* pseudo-op: .pdata
|
|
|
|
|
behaviour: predefined read only data section
|
2002-11-30 08:39:46 +00:00
|
|
|
|
double word aligned
|
1999-05-03 07:29:11 +00:00
|
|
|
|
errors: None
|
|
|
|
|
warnings: None
|
|
|
|
|
initial: .section .pdata "adr3"
|
2002-11-30 08:39:46 +00:00
|
|
|
|
a - don't know -- maybe a misprint
|
1999-05-03 07:29:11 +00:00
|
|
|
|
d - initialized data
|
|
|
|
|
r - readable
|
|
|
|
|
3 - double word aligned (that would be 4 byte boundary)
|
|
|
|
|
|
|
|
|
|
commentary:
|
|
|
|
|
Tag index tables (also known as the function table) for exception
|
2001-07-02 10:54:49 +00:00
|
|
|
|
handling, debugging, etc. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
static void
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_pdata (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2000-09-26 07:09:19 +00:00
|
|
|
|
if (pdata_section == 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
pdata_section = subseg_new (".pdata", 0);
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
bfd_set_section_flags (stdoutput, pdata_section,
|
|
|
|
|
(SEC_ALLOC | SEC_LOAD | SEC_RELOC
|
|
|
|
|
| SEC_READONLY | SEC_DATA ));
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
bfd_set_section_alignment (stdoutput, pdata_section, 2);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
pdata_section = subseg_new (".pdata", 0);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_set_current_section (pdata_section);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* pseudo-op: .ydata
|
|
|
|
|
behaviour: predefined read only data section
|
2002-11-30 08:39:46 +00:00
|
|
|
|
double word aligned
|
1999-05-03 07:29:11 +00:00
|
|
|
|
errors: None
|
|
|
|
|
warnings: None
|
|
|
|
|
initial: .section .ydata "drw3"
|
2002-11-30 08:39:46 +00:00
|
|
|
|
a - don't know -- maybe a misprint
|
1999-05-03 07:29:11 +00:00
|
|
|
|
d - initialized data
|
|
|
|
|
r - readable
|
|
|
|
|
3 - double word aligned (that would be 4 byte boundary)
|
|
|
|
|
commentary:
|
|
|
|
|
Tag tables (also known as the scope table) for exception handling,
|
2001-07-02 10:54:49 +00:00
|
|
|
|
debugging, etc. */
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static void
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_ydata (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2000-09-26 07:09:19 +00:00
|
|
|
|
if (ydata_section == 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
ydata_section = subseg_new (".ydata", 0);
|
|
|
|
|
bfd_set_section_flags (stdoutput, ydata_section,
|
2001-07-02 10:54:49 +00:00
|
|
|
|
(SEC_ALLOC | SEC_LOAD | SEC_RELOC
|
|
|
|
|
| SEC_READONLY | SEC_DATA ));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
bfd_set_section_alignment (stdoutput, ydata_section, 3);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ydata_section = subseg_new (".ydata", 0);
|
|
|
|
|
}
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_set_current_section (ydata_section);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* pseudo-op: .reldata
|
|
|
|
|
behaviour: predefined read write data section
|
2002-11-30 08:39:46 +00:00
|
|
|
|
double word aligned (4-byte)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
FIXME: relocation is applied to it
|
|
|
|
|
FIXME: what's the difference between this and .data?
|
|
|
|
|
errors: None
|
|
|
|
|
warnings: None
|
|
|
|
|
initial: .section .reldata "drw3"
|
|
|
|
|
d - initialized data
|
|
|
|
|
r - readable
|
|
|
|
|
w - writeable
|
|
|
|
|
3 - double word aligned (that would be 8 byte boundary)
|
|
|
|
|
|
|
|
|
|
commentary:
|
|
|
|
|
Like .data, but intended to hold data subject to relocation, such as
|
2001-07-02 10:54:49 +00:00
|
|
|
|
function descriptors, etc. */
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static void
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_reldata (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
if (reldata_section == 0)
|
|
|
|
|
{
|
|
|
|
|
reldata_section = subseg_new (".reldata", 0);
|
|
|
|
|
|
|
|
|
|
bfd_set_section_flags (stdoutput, reldata_section,
|
2001-07-02 10:54:49 +00:00
|
|
|
|
(SEC_ALLOC | SEC_LOAD | SEC_RELOC
|
|
|
|
|
| SEC_DATA));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
bfd_set_section_alignment (stdoutput, reldata_section, 2);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
reldata_section = subseg_new (".reldata", 0);
|
|
|
|
|
}
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_set_current_section (reldata_section);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* pseudo-op: .rdata
|
|
|
|
|
behaviour: predefined read only data section
|
2002-11-30 08:39:46 +00:00
|
|
|
|
double word aligned
|
1999-05-03 07:29:11 +00:00
|
|
|
|
errors: None
|
|
|
|
|
warnings: None
|
|
|
|
|
initial: .section .rdata "dr3"
|
|
|
|
|
d - initialized data
|
|
|
|
|
r - readable
|
2001-07-02 10:54:49 +00:00
|
|
|
|
3 - double word aligned (that would be 4 byte boundary) */
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static void
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_rdata (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
if (rdata_section == 0)
|
|
|
|
|
{
|
|
|
|
|
rdata_section = subseg_new (".rdata", 0);
|
|
|
|
|
bfd_set_section_flags (stdoutput, rdata_section,
|
|
|
|
|
(SEC_ALLOC | SEC_LOAD | SEC_RELOC
|
|
|
|
|
| SEC_READONLY | SEC_DATA ));
|
|
|
|
|
|
|
|
|
|
bfd_set_section_alignment (stdoutput, rdata_section, 2);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
rdata_section = subseg_new (".rdata", 0);
|
|
|
|
|
}
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_set_current_section (rdata_section);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* pseudo-op: .ualong
|
2000-09-26 07:09:19 +00:00
|
|
|
|
behaviour: much like .int, with the exception that no alignment is
|
2002-11-30 08:39:46 +00:00
|
|
|
|
performed.
|
1999-05-03 07:29:11 +00:00
|
|
|
|
FIXME: test the alignment statement
|
|
|
|
|
errors: None
|
2001-07-02 10:54:49 +00:00
|
|
|
|
warnings: None */
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static void
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_ualong (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Try for long. */
|
|
|
|
|
cons (4);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* pseudo-op: .znop <symbol name>
|
|
|
|
|
behaviour: Issue a nop instruction
|
2002-11-30 08:39:46 +00:00
|
|
|
|
Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
|
1999-05-03 07:29:11 +00:00
|
|
|
|
the supplied symbol name.
|
|
|
|
|
errors: None
|
2001-07-02 10:54:49 +00:00
|
|
|
|
warnings: Missing symbol name */
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static void
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_znop (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
unsigned long insn;
|
|
|
|
|
const struct powerpc_opcode *opcode;
|
|
|
|
|
expressionS ex;
|
|
|
|
|
char *f;
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
char *symbol_name;
|
|
|
|
|
char c;
|
|
|
|
|
char *name;
|
|
|
|
|
unsigned int exp;
|
|
|
|
|
flagword flags;
|
|
|
|
|
asection *sec;
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Strip out the symbol name. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
symbol_name = input_line_pointer;
|
|
|
|
|
c = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
name = xmalloc (input_line_pointer - symbol_name + 1);
|
|
|
|
|
strcpy (name, symbol_name);
|
|
|
|
|
|
|
|
|
|
sym = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = c;
|
|
|
|
|
|
|
|
|
|
SKIP_WHITESPACE ();
|
|
|
|
|
|
|
|
|
|
/* Look up the opcode in the hash table. */
|
|
|
|
|
opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Stick in the nop. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
insn = opcode->opcode;
|
|
|
|
|
|
|
|
|
|
/* Write out the instruction. */
|
|
|
|
|
f = frag_more (4);
|
|
|
|
|
md_number_to_chars (f, insn, 4);
|
|
|
|
|
fix_new (frag_now,
|
|
|
|
|
f - frag_now->fr_literal,
|
|
|
|
|
4,
|
|
|
|
|
sym,
|
|
|
|
|
0,
|
|
|
|
|
0,
|
|
|
|
|
BFD_RELOC_16_GOT_PCREL);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
2000-09-26 07:09:19 +00:00
|
|
|
|
/* pseudo-op:
|
|
|
|
|
behaviour:
|
|
|
|
|
errors:
|
2001-07-02 10:54:49 +00:00
|
|
|
|
warnings: */
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
static void
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_pe_comm (lcomm)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
int lcomm;
|
|
|
|
|
{
|
|
|
|
|
register char *name;
|
|
|
|
|
register char c;
|
|
|
|
|
register char *p;
|
|
|
|
|
offsetT temp;
|
|
|
|
|
register symbolS *symbolP;
|
|
|
|
|
offsetT align;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
c = get_symbol_end ();
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* just after name is now '\0'. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
p = input_line_pointer;
|
|
|
|
|
*p = c;
|
|
|
|
|
SKIP_WHITESPACE ();
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Expected comma after symbol-name: rest of line ignored."));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
input_line_pointer++; /* skip ',' */
|
|
|
|
|
if ((temp = get_absolute_expression ()) < 0)
|
|
|
|
|
{
|
|
|
|
|
as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (! lcomm)
|
|
|
|
|
{
|
|
|
|
|
/* The third argument to .comm is the alignment. */
|
|
|
|
|
if (*input_line_pointer != ',')
|
|
|
|
|
align = 3;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
align = get_absolute_expression ();
|
|
|
|
|
if (align <= 0)
|
|
|
|
|
{
|
|
|
|
|
as_warn (_("ignoring bad alignment"));
|
|
|
|
|
align = 3;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
*p = 0;
|
|
|
|
|
symbolP = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*p = c;
|
|
|
|
|
if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
|
|
|
|
|
{
|
|
|
|
|
as_bad (_("Ignoring attempt to re-define symbol `%s'."),
|
|
|
|
|
S_GET_NAME (symbolP));
|
|
|
|
|
ignore_rest_of_line ();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (S_GET_VALUE (symbolP))
|
|
|
|
|
{
|
|
|
|
|
if (S_GET_VALUE (symbolP) != (valueT) temp)
|
|
|
|
|
as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
|
|
|
|
|
S_GET_NAME (symbolP),
|
|
|
|
|
(long) S_GET_VALUE (symbolP),
|
|
|
|
|
(long) temp);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
S_SET_VALUE (symbolP, (valueT) temp);
|
|
|
|
|
S_SET_EXTERNAL (symbolP);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* implement the .section pseudo op:
|
|
|
|
|
* .section name {, "flags"}
|
|
|
|
|
* ^ ^
|
|
|
|
|
* | +--- optional flags: 'b' for bss
|
|
|
|
|
* | 'i' for info
|
|
|
|
|
* +-- section name 'l' for lib
|
|
|
|
|
* 'n' for noload
|
|
|
|
|
* 'o' for over
|
|
|
|
|
* 'w' for data
|
|
|
|
|
* 'd' (apparently m88k for data)
|
|
|
|
|
* 'x' for text
|
|
|
|
|
* But if the argument is not a quoted string, treat it as a
|
|
|
|
|
* subsegment number.
|
|
|
|
|
*
|
|
|
|
|
* FIXME: this is a copy of the section processing from obj-coff.c, with
|
|
|
|
|
* additions/changes for the moto-pas assembler support. There are three
|
|
|
|
|
* categories:
|
|
|
|
|
*
|
2000-09-26 07:09:19 +00:00
|
|
|
|
* FIXME: I just noticed this. This doesn't work at all really. It it
|
1999-05-03 07:29:11 +00:00
|
|
|
|
* setting bits that bfd probably neither understands or uses. The
|
|
|
|
|
* correct approach (?) will have to incorporate extra fields attached
|
|
|
|
|
* to the section to hold the system specific stuff. (krk)
|
|
|
|
|
*
|
|
|
|
|
* Section Contents:
|
|
|
|
|
* 'a' - unknown - referred to in documentation, but no definition supplied
|
|
|
|
|
* 'c' - section has code
|
|
|
|
|
* 'd' - section has initialized data
|
|
|
|
|
* 'u' - section has uninitialized data
|
|
|
|
|
* 'i' - section contains directives (info)
|
|
|
|
|
* 'n' - section can be discarded
|
|
|
|
|
* 'R' - remove section at link time
|
|
|
|
|
*
|
|
|
|
|
* Section Protection:
|
|
|
|
|
* 'r' - section is readable
|
|
|
|
|
* 'w' - section is writeable
|
|
|
|
|
* 'x' - section is executable
|
|
|
|
|
* 's' - section is sharable
|
|
|
|
|
*
|
|
|
|
|
* Section Alignment:
|
|
|
|
|
* '0' - align to byte boundary
|
|
|
|
|
* '1' - align to halfword undary
|
|
|
|
|
* '2' - align to word boundary
|
|
|
|
|
* '3' - align to doubleword boundary
|
|
|
|
|
* '4' - align to quadword boundary
|
|
|
|
|
* '5' - align to 32 byte boundary
|
|
|
|
|
* '6' - align to 64 byte boundary
|
|
|
|
|
*
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
ppc_pe_section (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Strip out the section name. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
char *section_name;
|
|
|
|
|
char c;
|
|
|
|
|
char *name;
|
|
|
|
|
unsigned int exp;
|
|
|
|
|
flagword flags;
|
|
|
|
|
segT sec;
|
|
|
|
|
int align;
|
|
|
|
|
|
|
|
|
|
section_name = input_line_pointer;
|
|
|
|
|
c = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
name = xmalloc (input_line_pointer - section_name + 1);
|
|
|
|
|
strcpy (name, section_name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = c;
|
|
|
|
|
|
|
|
|
|
SKIP_WHITESPACE ();
|
|
|
|
|
|
|
|
|
|
exp = 0;
|
|
|
|
|
flags = SEC_NO_FLAGS;
|
|
|
|
|
|
|
|
|
|
if (strcmp (name, ".idata$2") == 0)
|
|
|
|
|
{
|
|
|
|
|
align = 0;
|
|
|
|
|
}
|
|
|
|
|
else if (strcmp (name, ".idata$3") == 0)
|
|
|
|
|
{
|
|
|
|
|
align = 0;
|
|
|
|
|
}
|
|
|
|
|
else if (strcmp (name, ".idata$4") == 0)
|
|
|
|
|
{
|
|
|
|
|
align = 2;
|
|
|
|
|
}
|
|
|
|
|
else if (strcmp (name, ".idata$5") == 0)
|
|
|
|
|
{
|
|
|
|
|
align = 2;
|
|
|
|
|
}
|
|
|
|
|
else if (strcmp (name, ".idata$6") == 0)
|
|
|
|
|
{
|
|
|
|
|
align = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* Default alignment to 16 byte boundary. */
|
|
|
|
|
align = 4;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (*input_line_pointer == ',')
|
|
|
|
|
{
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
SKIP_WHITESPACE ();
|
|
|
|
|
if (*input_line_pointer != '"')
|
|
|
|
|
exp = get_absolute_expression ();
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
while (*input_line_pointer != '"'
|
|
|
|
|
&& ! is_end_of_line[(unsigned char) *input_line_pointer])
|
|
|
|
|
{
|
|
|
|
|
switch (*input_line_pointer)
|
|
|
|
|
{
|
|
|
|
|
/* Section Contents */
|
|
|
|
|
case 'a': /* unknown */
|
|
|
|
|
as_bad (_("Unsupported section attribute -- 'a'"));
|
|
|
|
|
break;
|
|
|
|
|
case 'c': /* code section */
|
2000-09-26 07:09:19 +00:00
|
|
|
|
flags |= SEC_CODE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'd': /* section has initialized data */
|
|
|
|
|
flags |= SEC_DATA;
|
|
|
|
|
break;
|
|
|
|
|
case 'u': /* section has uninitialized data */
|
|
|
|
|
/* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
|
|
|
|
|
in winnt.h */
|
|
|
|
|
flags |= SEC_ROM;
|
|
|
|
|
break;
|
|
|
|
|
case 'i': /* section contains directives (info) */
|
|
|
|
|
/* FIXME: This is IMAGE_SCN_LNK_INFO
|
|
|
|
|
in winnt.h */
|
|
|
|
|
flags |= SEC_HAS_CONTENTS;
|
|
|
|
|
break;
|
|
|
|
|
case 'n': /* section can be discarded */
|
2000-09-26 07:09:19 +00:00
|
|
|
|
flags &=~ SEC_LOAD;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'R': /* Remove section at link time */
|
|
|
|
|
flags |= SEC_NEVER_LOAD;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
/* Section Protection */
|
|
|
|
|
case 'r': /* section is readable */
|
|
|
|
|
flags |= IMAGE_SCN_MEM_READ;
|
|
|
|
|
break;
|
|
|
|
|
case 'w': /* section is writeable */
|
|
|
|
|
flags |= IMAGE_SCN_MEM_WRITE;
|
|
|
|
|
break;
|
|
|
|
|
case 'x': /* section is executable */
|
|
|
|
|
flags |= IMAGE_SCN_MEM_EXECUTE;
|
|
|
|
|
break;
|
|
|
|
|
case 's': /* section is sharable */
|
|
|
|
|
flags |= IMAGE_SCN_MEM_SHARED;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
/* Section Alignment */
|
|
|
|
|
case '0': /* align to byte boundary */
|
|
|
|
|
flags |= IMAGE_SCN_ALIGN_1BYTES;
|
|
|
|
|
align = 0;
|
|
|
|
|
break;
|
|
|
|
|
case '1': /* align to halfword boundary */
|
|
|
|
|
flags |= IMAGE_SCN_ALIGN_2BYTES;
|
|
|
|
|
align = 1;
|
|
|
|
|
break;
|
|
|
|
|
case '2': /* align to word boundary */
|
|
|
|
|
flags |= IMAGE_SCN_ALIGN_4BYTES;
|
|
|
|
|
align = 2;
|
|
|
|
|
break;
|
|
|
|
|
case '3': /* align to doubleword boundary */
|
|
|
|
|
flags |= IMAGE_SCN_ALIGN_8BYTES;
|
|
|
|
|
align = 3;
|
|
|
|
|
break;
|
|
|
|
|
case '4': /* align to quadword boundary */
|
|
|
|
|
flags |= IMAGE_SCN_ALIGN_16BYTES;
|
|
|
|
|
align = 4;
|
|
|
|
|
break;
|
|
|
|
|
case '5': /* align to 32 byte boundary */
|
|
|
|
|
flags |= IMAGE_SCN_ALIGN_32BYTES;
|
|
|
|
|
align = 5;
|
|
|
|
|
break;
|
|
|
|
|
case '6': /* align to 64 byte boundary */
|
|
|
|
|
flags |= IMAGE_SCN_ALIGN_64BYTES;
|
|
|
|
|
align = 6;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
2001-07-02 10:54:49 +00:00
|
|
|
|
as_bad (_("unknown section attribute '%c'"),
|
|
|
|
|
*input_line_pointer);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
}
|
|
|
|
|
if (*input_line_pointer == '"')
|
|
|
|
|
++input_line_pointer;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
sec = subseg_new (name, (subsegT) exp);
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_set_current_section (sec);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (flags != SEC_NO_FLAGS)
|
|
|
|
|
{
|
|
|
|
|
if (! bfd_set_section_flags (stdoutput, sec, flags))
|
|
|
|
|
as_bad (_("error setting flags for \"%s\": %s"),
|
|
|
|
|
bfd_section_name (stdoutput, sec),
|
|
|
|
|
bfd_errmsg (bfd_get_error ()));
|
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
bfd_set_section_alignment (stdoutput, sec, align);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_pe_function (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *name;
|
|
|
|
|
char endc;
|
|
|
|
|
symbolS *ext_sym;
|
|
|
|
|
|
|
|
|
|
name = input_line_pointer;
|
|
|
|
|
endc = get_symbol_end ();
|
|
|
|
|
|
|
|
|
|
ext_sym = symbol_find_or_make (name);
|
|
|
|
|
|
|
|
|
|
*input_line_pointer = endc;
|
|
|
|
|
|
|
|
|
|
S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
|
|
|
|
|
SF_SET_FUNCTION (ext_sym);
|
|
|
|
|
SF_SET_PROCESS (ext_sym);
|
|
|
|
|
coff_add_linesym (ext_sym);
|
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
ppc_pe_tocd (ignore)
|
2000-06-19 00:59:43 +00:00
|
|
|
|
int ignore ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
if (tocdata_section == 0)
|
|
|
|
|
{
|
|
|
|
|
tocdata_section = subseg_new (".tocd", 0);
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* FIXME: section flags won't work. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
bfd_set_section_flags (stdoutput, tocdata_section,
|
|
|
|
|
(SEC_ALLOC | SEC_LOAD | SEC_RELOC
|
2001-07-02 10:54:49 +00:00
|
|
|
|
| SEC_READONLY | SEC_DATA));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
bfd_set_section_alignment (stdoutput, tocdata_section, 2);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
rdata_section = subseg_new (".tocd", 0);
|
|
|
|
|
}
|
|
|
|
|
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_set_current_section (tocdata_section);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
demand_empty_rest_of_line ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Don't adjust TOC relocs to use the section symbol. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
ppc_pe_fix_adjustable (fix)
|
|
|
|
|
fixS *fix;
|
|
|
|
|
{
|
|
|
|
|
return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_XCOFF
|
|
|
|
|
|
|
|
|
|
/* XCOFF specific symbol and file handling. */
|
|
|
|
|
|
|
|
|
|
/* Canonicalize the symbol name. We use the to force the suffix, if
|
|
|
|
|
any, to use square brackets, and to be in upper case. */
|
|
|
|
|
|
|
|
|
|
char *
|
|
|
|
|
ppc_canonicalize_symbol_name (name)
|
|
|
|
|
char *name;
|
|
|
|
|
{
|
|
|
|
|
char *s;
|
|
|
|
|
|
|
|
|
|
if (ppc_stab_symbol)
|
|
|
|
|
return name;
|
|
|
|
|
|
|
|
|
|
for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
|
|
|
|
|
;
|
|
|
|
|
if (*s != '\0')
|
|
|
|
|
{
|
|
|
|
|
char brac;
|
|
|
|
|
|
|
|
|
|
if (*s == '[')
|
|
|
|
|
brac = ']';
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
*s = '[';
|
|
|
|
|
brac = '}';
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (s++; *s != '\0' && *s != brac; s++)
|
2001-09-19 05:33:36 +00:00
|
|
|
|
*s = TOUPPER (*s);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (*s == '\0' || s[1] != '\0')
|
|
|
|
|
as_bad (_("bad symbol suffix"));
|
|
|
|
|
|
|
|
|
|
*s = ']';
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return name;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Set the class of a symbol based on the suffix, if any. This is
|
|
|
|
|
called whenever a new symbol is created. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
ppc_symbol_new_hook (sym)
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
{
|
1999-06-19 14:04:45 +00:00
|
|
|
|
struct ppc_tc_sy *tc;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
const char *s;
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc = symbol_get_tc (sym);
|
|
|
|
|
tc->next = NULL;
|
|
|
|
|
tc->output = 0;
|
|
|
|
|
tc->class = -1;
|
|
|
|
|
tc->real_name = NULL;
|
|
|
|
|
tc->subseg = 0;
|
|
|
|
|
tc->align = 0;
|
|
|
|
|
tc->size = NULL;
|
|
|
|
|
tc->within = NULL;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (ppc_stab_symbol)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
s = strchr (S_GET_NAME (sym), '[');
|
|
|
|
|
if (s == (const char *) NULL)
|
|
|
|
|
{
|
|
|
|
|
/* There is no suffix. */
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
++s;
|
|
|
|
|
|
|
|
|
|
switch (s[0])
|
|
|
|
|
{
|
|
|
|
|
case 'B':
|
|
|
|
|
if (strcmp (s, "BS]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_BS;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'D':
|
|
|
|
|
if (strcmp (s, "DB]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_DB;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (s, "DS]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_DS;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'G':
|
|
|
|
|
if (strcmp (s, "GL]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_GL;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'P':
|
|
|
|
|
if (strcmp (s, "PR]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_PR;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'R':
|
|
|
|
|
if (strcmp (s, "RO]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_RO;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (s, "RW]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_RW;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'S':
|
|
|
|
|
if (strcmp (s, "SV]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_SV;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'T':
|
|
|
|
|
if (strcmp (s, "TC]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_TC;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (s, "TI]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_TI;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (s, "TB]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_TB;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_TC0;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'U':
|
|
|
|
|
if (strcmp (s, "UA]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_UA;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else if (strcmp (s, "UC]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_UC;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
case 'X':
|
|
|
|
|
if (strcmp (s, "XO]") == 0)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
tc->class = XMC_XO;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (tc->class == -1)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
as_bad (_("Unrecognized symbol suffix"));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Set the class of a label based on where it is defined. This
|
|
|
|
|
handles symbols without suffixes. Also, move the symbol so that it
|
|
|
|
|
follows the csect symbol. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
ppc_frob_label (sym)
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
{
|
|
|
|
|
if (ppc_current_csect != (symbolS *) NULL)
|
|
|
|
|
{
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (symbol_get_tc (sym)->class == -1)
|
|
|
|
|
symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
symbol_remove (sym, &symbol_rootP, &symbol_lastP);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
|
|
|
|
|
&symbol_rootP, &symbol_lastP);
|
|
|
|
|
symbol_get_tc (ppc_current_csect)->within = sym;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This variable is set by ppc_frob_symbol if any absolute symbols are
|
|
|
|
|
seen. It tells ppc_adjust_symtab whether it needs to look through
|
|
|
|
|
the symbols. */
|
|
|
|
|
|
2002-11-30 08:39:46 +00:00
|
|
|
|
static bfd_boolean ppc_saw_abs;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* Change the name of a symbol just before writing it out. Set the
|
|
|
|
|
real name if the .rename pseudo-op was used. Otherwise, remove any
|
|
|
|
|
class suffix. Return 1 if the symbol should not be included in the
|
|
|
|
|
symbol table. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
ppc_frob_symbol (sym)
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
{
|
|
|
|
|
static symbolS *ppc_last_function;
|
|
|
|
|
static symbolS *set_end;
|
|
|
|
|
|
|
|
|
|
/* Discard symbols that should not be included in the output symbol
|
|
|
|
|
table. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (! symbol_used_in_reloc_p (sym)
|
|
|
|
|
&& ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|| (! S_IS_EXTERNAL (sym)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
&& ! symbol_get_tc (sym)->output
|
1999-05-03 07:29:11 +00:00
|
|
|
|
&& S_GET_STORAGE_CLASS (sym) != C_FILE)))
|
|
|
|
|
return 1;
|
|
|
|
|
|
2002-09-05 00:01:18 +00:00
|
|
|
|
/* This one will disappear anyway. Don't make a csect sym for it. */
|
|
|
|
|
if (sym == abs_section_sym)
|
|
|
|
|
return 1;
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (symbol_get_tc (sym)->real_name != (char *) NULL)
|
|
|
|
|
S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
const char *name;
|
|
|
|
|
const char *s;
|
|
|
|
|
|
|
|
|
|
name = S_GET_NAME (sym);
|
|
|
|
|
s = strchr (name, '[');
|
|
|
|
|
if (s != (char *) NULL)
|
|
|
|
|
{
|
|
|
|
|
unsigned int len;
|
|
|
|
|
char *snew;
|
|
|
|
|
|
|
|
|
|
len = s - name;
|
|
|
|
|
snew = xmalloc (len + 1);
|
|
|
|
|
memcpy (snew, name, len);
|
|
|
|
|
snew[len] = '\0';
|
|
|
|
|
|
|
|
|
|
S_SET_NAME (sym, snew);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (set_end != (symbolS *) NULL)
|
|
|
|
|
{
|
|
|
|
|
SA_SET_SYM_ENDNDX (set_end, sym);
|
|
|
|
|
set_end = NULL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (SF_GET_FUNCTION (sym))
|
|
|
|
|
{
|
|
|
|
|
if (ppc_last_function != (symbolS *) NULL)
|
|
|
|
|
as_bad (_("two .function pseudo-ops with no intervening .ef"));
|
|
|
|
|
ppc_last_function = sym;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (symbol_get_tc (sym)->size != (symbolS *) NULL)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-05-22 10:23:50 +00:00
|
|
|
|
resolve_symbol_value (symbol_get_tc (sym)->size);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
SA_SET_SYM_FSIZE (sym,
|
|
|
|
|
(long) S_GET_VALUE (symbol_get_tc (sym)->size));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else if (S_GET_STORAGE_CLASS (sym) == C_FCN
|
|
|
|
|
&& strcmp (S_GET_NAME (sym), ".ef") == 0)
|
|
|
|
|
{
|
|
|
|
|
if (ppc_last_function == (symbolS *) NULL)
|
|
|
|
|
as_bad (_(".ef with no preceding .function"));
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
set_end = ppc_last_function;
|
|
|
|
|
ppc_last_function = NULL;
|
|
|
|
|
|
|
|
|
|
/* We don't have a C_EFCN symbol, but we need to force the
|
|
|
|
|
COFF backend to believe that it has seen one. */
|
|
|
|
|
coff_last_function = NULL;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (! S_IS_EXTERNAL (sym)
|
1999-06-19 14:04:45 +00:00
|
|
|
|
&& (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
|
1999-05-03 07:29:11 +00:00
|
|
|
|
&& S_GET_STORAGE_CLASS (sym) != C_FILE
|
|
|
|
|
&& S_GET_STORAGE_CLASS (sym) != C_FCN
|
|
|
|
|
&& S_GET_STORAGE_CLASS (sym) != C_BLOCK
|
|
|
|
|
&& S_GET_STORAGE_CLASS (sym) != C_BSTAT
|
|
|
|
|
&& S_GET_STORAGE_CLASS (sym) != C_ESTAT
|
|
|
|
|
&& S_GET_STORAGE_CLASS (sym) != C_BINCL
|
|
|
|
|
&& S_GET_STORAGE_CLASS (sym) != C_EINCL
|
|
|
|
|
&& S_GET_SEGMENT (sym) != ppc_coff_debug_section)
|
|
|
|
|
S_SET_STORAGE_CLASS (sym, C_HIDEXT);
|
|
|
|
|
|
|
|
|
|
if (S_GET_STORAGE_CLASS (sym) == C_EXT
|
|
|
|
|
|| S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
union internal_auxent *a;
|
|
|
|
|
|
|
|
|
|
/* Create a csect aux. */
|
|
|
|
|
i = S_GET_NUMBER_AUXILIARY (sym);
|
|
|
|
|
S_SET_NUMBER_AUXILIARY (sym, i + 1);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
|
|
|
|
|
if (symbol_get_tc (sym)->class == XMC_TC0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
/* This is the TOC table. */
|
|
|
|
|
know (strcmp (S_GET_NAME (sym), "TOC") == 0);
|
|
|
|
|
a->x_csect.x_scnlen.l = 0;
|
|
|
|
|
a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
|
|
|
|
|
}
|
1999-06-19 14:04:45 +00:00
|
|
|
|
else if (symbol_get_tc (sym)->subseg != 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
/* This is a csect symbol. x_scnlen is the size of the
|
|
|
|
|
csect. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (symbol_get_tc (sym)->next == (symbolS *) NULL)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
|
|
|
|
|
S_GET_SEGMENT (sym))
|
|
|
|
|
- S_GET_VALUE (sym));
|
|
|
|
|
else
|
|
|
|
|
{
|
2001-05-22 10:23:50 +00:00
|
|
|
|
resolve_symbol_value (symbol_get_tc (sym)->next);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
- S_GET_VALUE (sym));
|
|
|
|
|
}
|
1999-06-19 14:04:45 +00:00
|
|
|
|
a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
else if (S_GET_SEGMENT (sym) == bss_section)
|
|
|
|
|
{
|
|
|
|
|
/* This is a common symbol. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
|
|
|
|
|
a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (S_IS_EXTERNAL (sym))
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->class = XMC_RW;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_tc (sym)->class = XMC_BS;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
else if (S_GET_SEGMENT (sym) == absolute_section)
|
|
|
|
|
{
|
|
|
|
|
/* This is an absolute symbol. The csect will be created by
|
2001-07-02 10:54:49 +00:00
|
|
|
|
ppc_adjust_symtab. */
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_saw_abs = TRUE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
a->x_csect.x_smtyp = XTY_LD;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (symbol_get_tc (sym)->class == -1)
|
|
|
|
|
symbol_get_tc (sym)->class = XMC_XO;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
else if (! S_IS_DEFINED (sym))
|
|
|
|
|
{
|
|
|
|
|
/* This is an external symbol. */
|
|
|
|
|
a->x_csect.x_scnlen.l = 0;
|
|
|
|
|
a->x_csect.x_smtyp = XTY_ER;
|
|
|
|
|
}
|
1999-06-19 14:04:45 +00:00
|
|
|
|
else if (symbol_get_tc (sym)->class == XMC_TC)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
symbolS *next;
|
|
|
|
|
|
|
|
|
|
/* This is a TOC definition. x_scnlen is the size of the
|
|
|
|
|
TOC entry. */
|
|
|
|
|
next = symbol_next (sym);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
while (symbol_get_tc (next)->class == XMC_TC0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
next = symbol_next (next);
|
|
|
|
|
if (next == (symbolS *) NULL
|
1999-06-19 14:04:45 +00:00
|
|
|
|
|| symbol_get_tc (next)->class != XMC_TC)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
if (ppc_after_toc_frag == (fragS *) NULL)
|
|
|
|
|
a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
|
|
|
|
|
data_section)
|
|
|
|
|
- S_GET_VALUE (sym));
|
|
|
|
|
else
|
|
|
|
|
a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
|
|
|
|
|
- S_GET_VALUE (sym));
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
2001-05-22 10:23:50 +00:00
|
|
|
|
resolve_symbol_value (next);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
|
|
|
|
|
- S_GET_VALUE (sym));
|
|
|
|
|
}
|
|
|
|
|
a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
symbolS *csect;
|
|
|
|
|
|
|
|
|
|
/* This is a normal symbol definition. x_scnlen is the
|
|
|
|
|
symbol index of the containing csect. */
|
|
|
|
|
if (S_GET_SEGMENT (sym) == text_section)
|
|
|
|
|
csect = ppc_text_csects;
|
|
|
|
|
else if (S_GET_SEGMENT (sym) == data_section)
|
|
|
|
|
csect = ppc_data_csects;
|
|
|
|
|
else
|
|
|
|
|
abort ();
|
|
|
|
|
|
|
|
|
|
/* Skip the initial dummy symbol. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
csect = symbol_get_tc (csect)->next;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (csect == (symbolS *) NULL)
|
|
|
|
|
{
|
|
|
|
|
as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
|
|
|
|
|
a->x_csect.x_scnlen.l = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
1999-06-19 14:04:45 +00:00
|
|
|
|
while (symbol_get_tc (csect)->next != (symbolS *) NULL)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-05-22 10:23:50 +00:00
|
|
|
|
resolve_symbol_value (symbol_get_tc (csect)->next);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (S_GET_VALUE (symbol_get_tc (csect)->next)
|
|
|
|
|
> S_GET_VALUE (sym))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
csect = symbol_get_tc (csect)->next;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
a->x_csect.x_scnlen.p =
|
|
|
|
|
coffsymbol (symbol_get_bfdsym (csect))->native;
|
|
|
|
|
coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
|
|
|
|
|
1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
a->x_csect.x_smtyp = XTY_LD;
|
|
|
|
|
}
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
a->x_csect.x_parmhash = 0;
|
|
|
|
|
a->x_csect.x_snhash = 0;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (symbol_get_tc (sym)->class == -1)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
a->x_csect.x_smclas = XMC_PR;
|
|
|
|
|
else
|
1999-06-19 14:04:45 +00:00
|
|
|
|
a->x_csect.x_smclas = symbol_get_tc (sym)->class;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
a->x_csect.x_stab = 0;
|
|
|
|
|
a->x_csect.x_snstab = 0;
|
|
|
|
|
|
|
|
|
|
/* Don't let the COFF backend resort these symbols. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
|
|
|
|
|
{
|
|
|
|
|
/* We want the value to be the symbol index of the referenced
|
|
|
|
|
csect symbol. BFD will do that for us if we set the right
|
|
|
|
|
flags. */
|
2002-09-04 13:43:43 +00:00
|
|
|
|
asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
|
|
|
|
|
combined_entry_type *c = coffsymbol (bsym)->native;
|
|
|
|
|
|
|
|
|
|
S_SET_VALUE (sym, (valueT) (size_t) c);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
|
|
|
|
|
{
|
|
|
|
|
symbolS *block;
|
|
|
|
|
symbolS *csect;
|
|
|
|
|
|
|
|
|
|
/* The value is the offset from the enclosing csect. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
block = symbol_get_tc (sym)->within;
|
|
|
|
|
csect = symbol_get_tc (block)->within;
|
2001-05-22 10:23:50 +00:00
|
|
|
|
resolve_symbol_value (csect);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
|
|
|
|
|
}
|
|
|
|
|
else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
|
|
|
|
|
|| S_GET_STORAGE_CLASS (sym) == C_EINCL)
|
|
|
|
|
{
|
|
|
|
|
/* We want the value to be a file offset into the line numbers.
|
2001-07-02 10:54:49 +00:00
|
|
|
|
BFD will do that for us if we set the right flags. We have
|
|
|
|
|
already set the value correctly. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Adjust the symbol table. This creates csect symbols for all
|
|
|
|
|
absolute symbols. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
ppc_adjust_symtab ()
|
|
|
|
|
{
|
|
|
|
|
symbolS *sym;
|
|
|
|
|
|
|
|
|
|
if (! ppc_saw_abs)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
|
|
|
|
|
{
|
|
|
|
|
symbolS *csect;
|
|
|
|
|
int i;
|
|
|
|
|
union internal_auxent *a;
|
|
|
|
|
|
|
|
|
|
if (S_GET_SEGMENT (sym) != absolute_section)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
csect = symbol_create (".abs[XO]", absolute_section,
|
|
|
|
|
S_GET_VALUE (sym), &zero_address_frag);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
S_SET_STORAGE_CLASS (csect, C_HIDEXT);
|
|
|
|
|
i = S_GET_NUMBER_AUXILIARY (csect);
|
|
|
|
|
S_SET_NUMBER_AUXILIARY (csect, i + 1);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
a->x_csect.x_scnlen.l = 0;
|
|
|
|
|
a->x_csect.x_smtyp = XTY_SD;
|
|
|
|
|
a->x_csect.x_parmhash = 0;
|
|
|
|
|
a->x_csect.x_snhash = 0;
|
|
|
|
|
a->x_csect.x_smclas = XMC_XO;
|
|
|
|
|
a->x_csect.x_stab = 0;
|
|
|
|
|
a->x_csect.x_snstab = 0;
|
|
|
|
|
|
|
|
|
|
symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
|
|
|
|
|
|
|
|
|
|
i = S_GET_NUMBER_AUXILIARY (sym);
|
1999-06-19 14:04:45 +00:00
|
|
|
|
a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
|
|
|
|
|
a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
|
|
|
|
|
coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
2002-11-30 08:39:46 +00:00
|
|
|
|
ppc_saw_abs = FALSE;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Set the VMA for a section. This is called on all the sections in
|
|
|
|
|
turn. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
ppc_frob_section (sec)
|
|
|
|
|
asection *sec;
|
|
|
|
|
{
|
|
|
|
|
static bfd_size_type vma = 0;
|
|
|
|
|
|
|
|
|
|
bfd_set_section_vma (stdoutput, sec, vma);
|
|
|
|
|
vma += bfd_section_size (stdoutput, sec);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#endif /* OBJ_XCOFF */
|
|
|
|
|
|
|
|
|
|
/* Turn a string in input_line_pointer into a floating point constant
|
2000-07-07 16:58:25 +00:00
|
|
|
|
of type TYPE, and store the appropriate bytes in *LITP. The number
|
|
|
|
|
of LITTLENUMS emitted is stored in *SIZEP. An error message is
|
1999-05-03 07:29:11 +00:00
|
|
|
|
returned, or NULL on OK. */
|
|
|
|
|
|
|
|
|
|
char *
|
|
|
|
|
md_atof (type, litp, sizep)
|
|
|
|
|
int type;
|
|
|
|
|
char *litp;
|
|
|
|
|
int *sizep;
|
|
|
|
|
{
|
|
|
|
|
int prec;
|
|
|
|
|
LITTLENUM_TYPE words[4];
|
|
|
|
|
char *t;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
switch (type)
|
|
|
|
|
{
|
|
|
|
|
case 'f':
|
|
|
|
|
prec = 2;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 'd':
|
|
|
|
|
prec = 4;
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
*sizep = 0;
|
|
|
|
|
return _("bad call to md_atof");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
t = atof_ieee (input_line_pointer, type, words);
|
|
|
|
|
if (t)
|
|
|
|
|
input_line_pointer = t;
|
|
|
|
|
|
|
|
|
|
*sizep = prec * 2;
|
|
|
|
|
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
{
|
|
|
|
|
for (i = 0; i < prec; i++)
|
|
|
|
|
{
|
|
|
|
|
md_number_to_chars (litp, (valueT) words[i], 2);
|
|
|
|
|
litp += 2;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
for (i = prec - 1; i >= 0; i--)
|
|
|
|
|
{
|
|
|
|
|
md_number_to_chars (litp, (valueT) words[i], 2);
|
|
|
|
|
litp += 2;
|
|
|
|
|
}
|
|
|
|
|
}
|
2000-09-26 07:09:19 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Write a value out to the object file, using the appropriate
|
|
|
|
|
endianness. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_number_to_chars (buf, val, n)
|
|
|
|
|
char *buf;
|
|
|
|
|
valueT val;
|
|
|
|
|
int n;
|
|
|
|
|
{
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
number_to_chars_bigendian (buf, val, n);
|
|
|
|
|
else
|
|
|
|
|
number_to_chars_littleendian (buf, val, n);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Align a section (I don't know why this is machine dependent). */
|
|
|
|
|
|
|
|
|
|
valueT
|
|
|
|
|
md_section_align (seg, addr)
|
|
|
|
|
asection *seg;
|
|
|
|
|
valueT addr;
|
|
|
|
|
{
|
|
|
|
|
int align = bfd_get_section_alignment (stdoutput, seg);
|
|
|
|
|
|
|
|
|
|
return ((addr + (1 << align) - 1) & (-1 << align));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We don't have any form of relaxing. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
md_estimate_size_before_relax (fragp, seg)
|
2000-04-02 06:27:51 +00:00
|
|
|
|
fragS *fragp ATTRIBUTE_UNUSED;
|
|
|
|
|
asection *seg ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
abort ();
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Convert a machine dependent frag. We never generate these. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_convert_frag (abfd, sec, fragp)
|
2000-04-02 06:27:51 +00:00
|
|
|
|
bfd *abfd ATTRIBUTE_UNUSED;
|
|
|
|
|
asection *sec ATTRIBUTE_UNUSED;
|
|
|
|
|
fragS *fragp ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
abort ();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We have no need to default values of symbols. */
|
|
|
|
|
|
|
|
|
|
symbolS *
|
|
|
|
|
md_undefined_symbol (name)
|
2000-04-02 06:27:51 +00:00
|
|
|
|
char *name ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Functions concerning relocs. */
|
|
|
|
|
|
|
|
|
|
/* The location from which a PC relative jump should be calculated,
|
|
|
|
|
given a PC relative reloc. */
|
|
|
|
|
|
|
|
|
|
long
|
|
|
|
|
md_pcrel_from_section (fixp, sec)
|
|
|
|
|
fixS *fixp;
|
2000-04-02 06:27:51 +00:00
|
|
|
|
segT sec ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
return fixp->fx_frag->fr_address + fixp->fx_where;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_XCOFF
|
|
|
|
|
|
|
|
|
|
/* This is called to see whether a fixup should be adjusted to use a
|
|
|
|
|
section symbol. We take the opportunity to change a fixup against
|
|
|
|
|
a symbol in the TOC subsegment into a reloc against the
|
|
|
|
|
corresponding .tc symbol. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
ppc_fix_adjustable (fix)
|
|
|
|
|
fixS *fix;
|
|
|
|
|
{
|
2002-09-04 13:43:43 +00:00
|
|
|
|
valueT val = resolve_symbol_value (fix->fx_addsy);
|
|
|
|
|
segT symseg = S_GET_SEGMENT (fix->fx_addsy);
|
|
|
|
|
TC_SYMFIELD_TYPE *tc;
|
|
|
|
|
|
|
|
|
|
if (symseg == absolute_section)
|
|
|
|
|
return 0;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (ppc_toc_csect != (symbolS *) NULL
|
|
|
|
|
&& fix->fx_addsy != ppc_toc_csect
|
2002-09-04 13:43:43 +00:00
|
|
|
|
&& symseg == data_section
|
1999-05-03 07:29:11 +00:00
|
|
|
|
&& val >= ppc_toc_frag->fr_address
|
|
|
|
|
&& (ppc_after_toc_frag == (fragS *) NULL
|
|
|
|
|
|| val < ppc_after_toc_frag->fr_address))
|
|
|
|
|
{
|
|
|
|
|
symbolS *sy;
|
|
|
|
|
|
|
|
|
|
for (sy = symbol_next (ppc_toc_csect);
|
|
|
|
|
sy != (symbolS *) NULL;
|
|
|
|
|
sy = symbol_next (sy))
|
|
|
|
|
{
|
2002-09-04 13:43:43 +00:00
|
|
|
|
TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
|
|
|
|
|
|
|
|
|
|
if (sy_tc->class == XMC_TC0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
continue;
|
2002-09-04 13:43:43 +00:00
|
|
|
|
if (sy_tc->class != XMC_TC)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
2002-09-04 13:43:43 +00:00
|
|
|
|
if (val == resolve_symbol_value (sy))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
fix->fx_addsy = sy;
|
|
|
|
|
fix->fx_addnumber = val - ppc_toc_frag->fr_address;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
as_bad_where (fix->fx_file, fix->fx_line,
|
|
|
|
|
_("symbol in .toc does not match any .tc"));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Possibly adjust the reloc to be against the csect. */
|
2002-09-04 13:43:43 +00:00
|
|
|
|
tc = symbol_get_tc (fix->fx_addsy);
|
|
|
|
|
if (tc->subseg == 0
|
|
|
|
|
&& tc->class != XMC_TC0
|
|
|
|
|
&& tc->class != XMC_TC
|
|
|
|
|
&& symseg != bss_section
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* Don't adjust if this is a reloc in the toc section. */
|
2002-09-04 13:43:43 +00:00
|
|
|
|
&& (symseg != data_section
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|| ppc_toc_csect == NULL
|
|
|
|
|
|| val < ppc_toc_frag->fr_address
|
|
|
|
|
|| (ppc_after_toc_frag != NULL
|
|
|
|
|
&& val >= ppc_after_toc_frag->fr_address)))
|
|
|
|
|
{
|
|
|
|
|
symbolS *csect;
|
2002-09-04 13:43:43 +00:00
|
|
|
|
symbolS *next_csect;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2002-09-04 13:43:43 +00:00
|
|
|
|
if (symseg == text_section)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
csect = ppc_text_csects;
|
2002-09-04 13:43:43 +00:00
|
|
|
|
else if (symseg == data_section)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
csect = ppc_data_csects;
|
|
|
|
|
else
|
|
|
|
|
abort ();
|
|
|
|
|
|
|
|
|
|
/* Skip the initial dummy symbol. */
|
1999-06-19 14:04:45 +00:00
|
|
|
|
csect = symbol_get_tc (csect)->next;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
if (csect != (symbolS *) NULL)
|
|
|
|
|
{
|
2002-09-04 13:43:43 +00:00
|
|
|
|
while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
|
|
|
|
|
&& (symbol_get_frag (next_csect)->fr_address <= val))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
/* If the csect address equals the symbol value, then we
|
2001-07-02 10:54:49 +00:00
|
|
|
|
have to look through the full symbol table to see
|
|
|
|
|
whether this is the csect we want. Note that we will
|
|
|
|
|
only get here if the csect has zero length. */
|
2002-09-04 13:43:43 +00:00
|
|
|
|
if (symbol_get_frag (csect)->fr_address == val
|
|
|
|
|
&& S_GET_VALUE (csect) == val)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
symbolS *scan;
|
|
|
|
|
|
1999-06-19 14:04:45 +00:00
|
|
|
|
for (scan = symbol_next (csect);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
scan != NULL;
|
1999-06-19 14:04:45 +00:00
|
|
|
|
scan = symbol_next (scan))
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
1999-06-19 14:04:45 +00:00
|
|
|
|
if (symbol_get_tc (scan)->subseg != 0)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
if (scan == fix->fx_addsy)
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* If we found the symbol before the next csect
|
2001-07-02 10:54:49 +00:00
|
|
|
|
symbol, then this is the csect we want. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (scan == fix->fx_addsy)
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2002-09-04 13:43:43 +00:00
|
|
|
|
csect = next_csect;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
2002-09-04 13:43:43 +00:00
|
|
|
|
fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
fix->fx_addsy = csect;
|
|
|
|
|
}
|
2002-09-04 13:43:43 +00:00
|
|
|
|
return 0;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Adjust a reloc against a .lcomm symbol to be against the base
|
|
|
|
|
.lcomm. */
|
2002-09-04 13:43:43 +00:00
|
|
|
|
if (symseg == bss_section
|
1999-05-03 07:29:11 +00:00
|
|
|
|
&& ! S_IS_EXTERNAL (fix->fx_addsy))
|
|
|
|
|
{
|
2002-09-04 13:43:43 +00:00
|
|
|
|
symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
|
|
|
|
|
|
|
|
|
|
fix->fx_offset += val - resolve_symbol_value (sy);
|
|
|
|
|
fix->fx_addsy = sy;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* A reloc from one csect to another must be kept. The assembler
|
|
|
|
|
will, of course, keep relocs between sections, and it will keep
|
|
|
|
|
absolute relocs, but we need to force it to keep PC relative relocs
|
|
|
|
|
between two csects in the same section. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
ppc_force_relocation (fix)
|
|
|
|
|
fixS *fix;
|
|
|
|
|
{
|
|
|
|
|
/* At this point fix->fx_addsy should already have been converted to
|
|
|
|
|
a csect symbol. If the csect does not include the fragment, then
|
|
|
|
|
we need to force the relocation. */
|
|
|
|
|
if (fix->fx_pcrel
|
|
|
|
|
&& fix->fx_addsy != NULL
|
1999-06-19 14:04:45 +00:00
|
|
|
|
&& symbol_get_tc (fix->fx_addsy)->subseg != 0
|
|
|
|
|
&& ((symbol_get_frag (fix->fx_addsy)->fr_address
|
|
|
|
|
> fix->fx_frag->fr_address)
|
|
|
|
|
|| (symbol_get_tc (fix->fx_addsy)->next != NULL
|
|
|
|
|
&& (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
|
1999-05-03 07:29:11 +00:00
|
|
|
|
<= fix->fx_frag->fr_address))))
|
|
|
|
|
return 1;
|
|
|
|
|
|
2002-09-05 00:01:18 +00:00
|
|
|
|
return S_FORCE_RELOC (fix->fx_addsy);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#endif /* OBJ_XCOFF */
|
|
|
|
|
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#ifdef OBJ_ELF
|
2002-09-05 00:01:18 +00:00
|
|
|
|
/* If this function returns non-zero, it guarantees that a relocation
|
|
|
|
|
will be emitted for a fixup. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
ppc_force_relocation (fix)
|
|
|
|
|
fixS *fix;
|
|
|
|
|
{
|
|
|
|
|
/* Branch prediction relocations must force a relocation, as must
|
|
|
|
|
the vtable description relocs. */
|
|
|
|
|
switch (fix->fx_r_type)
|
|
|
|
|
{
|
|
|
|
|
case BFD_RELOC_PPC_B16_BRTAKEN:
|
|
|
|
|
case BFD_RELOC_PPC_B16_BRNTAKEN:
|
|
|
|
|
case BFD_RELOC_PPC_BA16_BRTAKEN:
|
|
|
|
|
case BFD_RELOC_PPC_BA16_BRNTAKEN:
|
|
|
|
|
case BFD_RELOC_PPC64_TOC:
|
|
|
|
|
case BFD_RELOC_VTABLE_INHERIT:
|
|
|
|
|
case BFD_RELOC_VTABLE_ENTRY:
|
|
|
|
|
return 1;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return S_FORCE_RELOC (fix->fx_addsy);
|
|
|
|
|
}
|
|
|
|
|
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
int
|
|
|
|
|
ppc_fix_adjustable (fix)
|
|
|
|
|
fixS *fix;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
|
|
|
|
|
&& fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
|
|
|
|
|
&& fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
|
|
|
|
|
&& fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
|
|
|
|
|
&& fix->fx_r_type != BFD_RELOC_GPREL16
|
|
|
|
|
&& fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
|
|
|
|
|
&& fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
|
|
|
|
|
&& (fix->fx_pcrel
|
|
|
|
|
|| (fix->fx_subsy != NULL
|
|
|
|
|
&& (S_GET_SEGMENT (fix->fx_subsy)
|
|
|
|
|
== S_GET_SEGMENT (fix->fx_addsy)))
|
|
|
|
|
|| S_IS_LOCAL (fix->fx_addsy)));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#endif
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
/* Apply a fixup to the object code. This is called for all the
|
|
|
|
|
fixups we generated by the call to fix_new_exp, above. In the call
|
|
|
|
|
above we used a reloc code which was the largest legal reloc code
|
|
|
|
|
plus the operand index. Here we undo that to recover the operand
|
|
|
|
|
index. At this point all symbol values should be fully resolved,
|
|
|
|
|
and we attempt to completely resolve the reloc. If we can not do
|
|
|
|
|
that, we determine the correct reloc code and put it back in the
|
|
|
|
|
fixup. */
|
|
|
|
|
|
2001-11-15 21:29:00 +00:00
|
|
|
|
void
|
|
|
|
|
md_apply_fix3 (fixP, valP, seg)
|
|
|
|
|
fixS *fixP;
|
|
|
|
|
valueT * valP;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
segT seg ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-11-15 21:29:00 +00:00
|
|
|
|
valueT value = * valP;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_addsy != NULL)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2002-09-05 00:01:18 +00:00
|
|
|
|
/* Hack around bfd_install_relocation brain damage. */
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
|
|
|
|
value += fixP->fx_frag->fr_address + fixP->fx_where;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_done = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#else
|
2002-09-05 00:01:18 +00:00
|
|
|
|
/* FIXME FIXME FIXME: The value we are passed in *valP includes
|
1999-05-03 07:29:11 +00:00
|
|
|
|
the symbol values. Since we are using BFD_ASSEMBLER, if we are
|
|
|
|
|
doing this relocation the code in write.c is going to call
|
|
|
|
|
bfd_install_relocation, which is also going to use the symbol
|
|
|
|
|
value. That means that if the reloc is fully resolved we want to
|
2002-09-05 00:01:18 +00:00
|
|
|
|
use *valP since bfd_install_relocation is not being used.
|
1999-05-03 07:29:11 +00:00
|
|
|
|
However, if the reloc is not fully resolved we do not want to use
|
2002-09-05 00:01:18 +00:00
|
|
|
|
*valP, and must use fx_offset instead. However, if the reloc
|
|
|
|
|
is PC relative, we do want to use *valP since it includes the
|
1999-05-03 07:29:11 +00:00
|
|
|
|
result of md_pcrel_from. This is confusing. */
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_addsy == (symbolS *) NULL)
|
|
|
|
|
fixP->fx_done = 1;
|
|
|
|
|
|
|
|
|
|
else if (fixP->fx_pcrel)
|
|
|
|
|
;
|
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
2002-09-05 00:01:18 +00:00
|
|
|
|
value = fixP->fx_offset;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
if (fixP->fx_subsy != (symbolS *) NULL)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2002-09-05 00:01:18 +00:00
|
|
|
|
/* We can't actually support subtracting a symbol. */
|
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
int opindex;
|
|
|
|
|
const struct powerpc_operand *operand;
|
|
|
|
|
char *where;
|
|
|
|
|
unsigned long insn;
|
|
|
|
|
|
2001-11-15 21:29:00 +00:00
|
|
|
|
opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
operand = &powerpc_operands[opindex];
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_XCOFF
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
/* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
|
|
|
|
|
does not generate a reloc. It uses the offset of `sym' within its
|
|
|
|
|
csect. Other usages, such as `.long sym', generate relocs. This
|
|
|
|
|
is the documented behaviour of non-TOC symbols. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if ((operand->flags & PPC_OPERAND_PARENS) != 0
|
|
|
|
|
&& operand->bits == 16
|
|
|
|
|
&& operand->shift == 0
|
2002-07-11 01:06:58 +00:00
|
|
|
|
&& (operand->insert == NULL || ppc_obj64)
|
2001-11-15 21:29:00 +00:00
|
|
|
|
&& fixP->fx_addsy != NULL
|
|
|
|
|
&& symbol_get_tc (fixP->fx_addsy)->subseg != 0
|
|
|
|
|
&& symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
|
|
|
|
|
&& symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
|
|
|
|
|
&& S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-11-15 21:29:00 +00:00
|
|
|
|
value = fixP->fx_offset;
|
|
|
|
|
fixP->fx_done = 1;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/* Fetch the instruction, insert the fully resolved operand
|
|
|
|
|
value, and stuff the instruction back again. */
|
2001-11-15 21:29:00 +00:00
|
|
|
|
where = fixP->fx_frag->fr_literal + fixP->fx_where;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (target_big_endian)
|
|
|
|
|
insn = bfd_getb32 ((unsigned char *) where);
|
|
|
|
|
else
|
|
|
|
|
insn = bfd_getl32 ((unsigned char *) where);
|
|
|
|
|
insn = ppc_insert_operand (insn, operand, (offsetT) value,
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_file, fixP->fx_line);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
if (target_big_endian)
|
|
|
|
|
bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
|
|
|
|
|
else
|
|
|
|
|
bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
|
|
|
|
|
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_done)
|
|
|
|
|
/* Nothing else to do here. */
|
|
|
|
|
return;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
2001-11-15 21:29:00 +00:00
|
|
|
|
assert (fixP->fx_addsy != NULL);
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* Determine a BFD reloc value based on the operand information.
|
|
|
|
|
We are only prepared to turn a few of the operands into
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
relocs. */
|
2001-08-10 01:34:47 +00:00
|
|
|
|
if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
|
|
|
|
|
&& operand->bits == 26
|
|
|
|
|
&& operand->shift == 0)
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_r_type = BFD_RELOC_PPC_B26;
|
2001-08-10 01:34:47 +00:00
|
|
|
|
else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
|
|
|
|
|
&& operand->bits == 16
|
|
|
|
|
&& operand->shift == 0)
|
2002-08-06 02:30:06 +00:00
|
|
|
|
{
|
|
|
|
|
fixP->fx_r_type = BFD_RELOC_PPC_B16;
|
|
|
|
|
#ifdef OBJ_XCOFF
|
|
|
|
|
fixP->fx_size = 2;
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
fixP->fx_where += 2;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
2001-08-10 01:34:47 +00:00
|
|
|
|
else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
|
|
|
|
|
&& operand->bits == 26
|
|
|
|
|
&& operand->shift == 0)
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_r_type = BFD_RELOC_PPC_BA26;
|
2001-08-10 01:34:47 +00:00
|
|
|
|
else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
|
|
|
|
|
&& operand->bits == 16
|
|
|
|
|
&& operand->shift == 0)
|
2002-08-06 02:30:06 +00:00
|
|
|
|
{
|
|
|
|
|
fixP->fx_r_type = BFD_RELOC_PPC_BA16;
|
|
|
|
|
#ifdef OBJ_XCOFF
|
|
|
|
|
fixP->fx_size = 2;
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
fixP->fx_where += 2;
|
|
|
|
|
#endif
|
|
|
|
|
}
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
|
2001-08-10 01:34:47 +00:00
|
|
|
|
else if ((operand->flags & PPC_OPERAND_PARENS) != 0
|
|
|
|
|
&& operand->bits == 16
|
|
|
|
|
&& operand->shift == 0
|
2001-11-15 21:29:00 +00:00
|
|
|
|
&& ppc_is_toc_sym (fixP->fx_addsy))
|
2001-08-10 01:34:47 +00:00
|
|
|
|
{
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#ifdef OBJ_ELF
|
2002-07-11 01:06:58 +00:00
|
|
|
|
if (ppc_obj64
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
&& (operand->flags & PPC_OPERAND_DS) != 0)
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#endif
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_size = 2;
|
2001-08-10 01:34:47 +00:00
|
|
|
|
if (target_big_endian)
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_where += 2;
|
2001-08-10 01:34:47 +00:00
|
|
|
|
}
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
|
2001-08-10 01:34:47 +00:00
|
|
|
|
else
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
char *sfile;
|
|
|
|
|
unsigned int sline;
|
|
|
|
|
|
|
|
|
|
/* Use expr_symbol_where to see if this is an expression
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
symbol. */
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
|
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
1999-05-03 07:29:11 +00:00
|
|
|
|
_("unresolved expression that must be resolved"));
|
|
|
|
|
else
|
2001-11-15 21:29:00 +00:00
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
_("unsupported relocation against %s"),
|
2001-11-15 21:29:00 +00:00
|
|
|
|
S_GET_NAME (fixP->fx_addsy));
|
|
|
|
|
fixP->fx_done = 1;
|
|
|
|
|
return;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
#ifdef OBJ_ELF
|
2001-11-15 21:29:00 +00:00
|
|
|
|
ppc_elf_validate_fix (fixP, seg);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#endif
|
2001-11-15 21:29:00 +00:00
|
|
|
|
switch (fixP->fx_r_type)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
|
|
|
|
case BFD_RELOC_CTOR:
|
2002-07-11 01:06:58 +00:00
|
|
|
|
if (ppc_obj64)
|
2001-10-04 05:03:44 +00:00
|
|
|
|
goto ctor64;
|
|
|
|
|
/* fall through */
|
|
|
|
|
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
case BFD_RELOC_32:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
|
|
|
|
fixP->fx_r_type = BFD_RELOC_32_PCREL;
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* fall through */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
case BFD_RELOC_RVA:
|
|
|
|
|
case BFD_RELOC_32_PCREL:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_NADDR32:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
1999-05-03 07:29:11 +00:00
|
|
|
|
value, 4);
|
|
|
|
|
break;
|
|
|
|
|
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
case BFD_RELOC_64:
|
2001-10-04 05:03:44 +00:00
|
|
|
|
ctor64:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
|
|
|
|
fixP->fx_r_type = BFD_RELOC_64_PCREL;
|
2001-07-02 10:54:49 +00:00
|
|
|
|
/* fall through */
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
case BFD_RELOC_64_PCREL:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
Add XCOFF64 support.
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
2000-04-26 15:09:44 +00:00
|
|
|
|
value, 8);
|
2000-09-26 07:09:19 +00:00
|
|
|
|
break;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
case BFD_RELOC_LO16:
|
|
|
|
|
case BFD_RELOC_16:
|
|
|
|
|
case BFD_RELOC_GPREL16:
|
|
|
|
|
case BFD_RELOC_16_GOT_PCREL:
|
|
|
|
|
case BFD_RELOC_16_GOTOFF:
|
|
|
|
|
case BFD_RELOC_LO16_GOTOFF:
|
|
|
|
|
case BFD_RELOC_HI16_GOTOFF:
|
|
|
|
|
case BFD_RELOC_HI16_S_GOTOFF:
|
2002-05-02 12:41:35 +00:00
|
|
|
|
case BFD_RELOC_16_BASEREL:
|
1999-05-03 07:29:11 +00:00
|
|
|
|
case BFD_RELOC_LO16_BASEREL:
|
|
|
|
|
case BFD_RELOC_HI16_BASEREL:
|
|
|
|
|
case BFD_RELOC_HI16_S_BASEREL:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_NADDR16:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_NADDR16_LO:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_NADDR16_HI:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_NADDR16_HA:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_SDAI16:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_SDA2REL:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_SDA2I16:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_RELSEC16:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_RELST_LO:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_RELST_HI:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_RELST_HA:
|
|
|
|
|
case BFD_RELOC_PPC_EMB_RELSDA:
|
|
|
|
|
case BFD_RELOC_PPC_TOC16:
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
case BFD_RELOC_PPC64_TOC16_LO:
|
|
|
|
|
case BFD_RELOC_PPC64_TOC16_HI:
|
|
|
|
|
case BFD_RELOC_PPC64_TOC16_HA:
|
|
|
|
|
#endif
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
{
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_addsy != NULL)
|
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
1999-05-03 07:29:11 +00:00
|
|
|
|
_("cannot emit PC relative %s relocation against %s"),
|
2001-11-15 21:29:00 +00:00
|
|
|
|
bfd_get_reloc_code_name (fixP->fx_r_type),
|
|
|
|
|
S_GET_NAME (fixP->fx_addsy));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
2001-11-15 21:29:00 +00:00
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
1999-05-03 07:29:11 +00:00
|
|
|
|
_("cannot emit PC relative %s relocation"),
|
2001-11-15 21:29:00 +00:00
|
|
|
|
bfd_get_reloc_code_name (fixP->fx_r_type));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
}
|
|
|
|
|
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
1999-05-03 07:29:11 +00:00
|
|
|
|
value, 2);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
/* This case happens when you write, for example,
|
|
|
|
|
lis %r3,(L1-L2)@ha
|
|
|
|
|
where L1 and L2 are defined later. */
|
|
|
|
|
case BFD_RELOC_HI16:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
abort ();
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
PPC_HI (value), 2);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
|
case BFD_RELOC_HI16_S:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
abort ();
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
PPC_HA (value), 2);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHER:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
abort ();
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
PPC_HIGHER (value), 2);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
case BFD_RELOC_PPC64_HIGHER_S:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
abort ();
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
PPC_HIGHERA (value), 2);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHEST:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
abort ();
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
PPC_HIGHEST (value), 2);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_PPC64_HIGHEST_S:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
abort ();
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
PPC_HIGHESTA (value), 2);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_PPC64_ADDR16_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_ADDR16_LO_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_GOT16_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_GOT16_LO_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_PLT16_LO_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_SECTOFF_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_SECTOFF_LO_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_TOC16_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_TOC16_LO_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_PLTGOT16_DS:
|
|
|
|
|
case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
abort ();
|
|
|
|
|
{
|
2001-11-15 21:29:00 +00:00
|
|
|
|
unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
unsigned long val;
|
|
|
|
|
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
val = bfd_getb16 (where);
|
|
|
|
|
else
|
|
|
|
|
val = bfd_getl16 (where);
|
|
|
|
|
val |= (value & 0xfffc);
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
bfd_putb16 ((bfd_vma) val, where);
|
|
|
|
|
else
|
|
|
|
|
bfd_putl16 ((bfd_vma) val, where);
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
#endif
|
1999-05-03 07:29:11 +00:00
|
|
|
|
/* Because SDA21 modifies the register field, the size is set to 4
|
2001-07-02 10:54:49 +00:00
|
|
|
|
bytes, rather than 2, so offset it here appropriately. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
case BFD_RELOC_PPC_EMB_SDA21:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
abort ();
|
|
|
|
|
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
|
1999-05-03 07:29:11 +00:00
|
|
|
|
+ ((target_big_endian) ? 2 : 0),
|
|
|
|
|
value, 2);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_8:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_pcrel)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
abort ();
|
|
|
|
|
|
2001-11-15 21:29:00 +00:00
|
|
|
|
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
1999-05-03 07:29:11 +00:00
|
|
|
|
value, 1);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_24_PLT_PCREL:
|
|
|
|
|
case BFD_RELOC_PPC_LOCAL24PC:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (!fixP->fx_pcrel && !fixP->fx_done)
|
1999-05-03 07:29:11 +00:00
|
|
|
|
abort ();
|
|
|
|
|
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_done)
|
2001-07-02 10:54:49 +00:00
|
|
|
|
{
|
|
|
|
|
char *where;
|
|
|
|
|
unsigned long insn;
|
|
|
|
|
|
|
|
|
|
/* Fetch the instruction, insert the fully resolved operand
|
|
|
|
|
value, and stuff the instruction back again. */
|
2001-11-15 21:29:00 +00:00
|
|
|
|
where = fixP->fx_frag->fr_literal + fixP->fx_where;
|
2001-07-02 10:54:49 +00:00
|
|
|
|
if (target_big_endian)
|
|
|
|
|
insn = bfd_getb32 ((unsigned char *) where);
|
|
|
|
|
else
|
|
|
|
|
insn = bfd_getl32 ((unsigned char *) where);
|
|
|
|
|
if ((value & 3) != 0)
|
2001-11-15 21:29:00 +00:00
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
2001-07-02 10:54:49 +00:00
|
|
|
|
_("must branch to an address a multiple of 4"));
|
|
|
|
|
if ((offsetT) value < -0x40000000
|
|
|
|
|
|| (offsetT) value >= 0x40000000)
|
2001-11-15 21:29:00 +00:00
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
2001-07-02 10:54:49 +00:00
|
|
|
|
_("@local or @plt branch destination is too far away, %ld bytes"),
|
|
|
|
|
(long) value);
|
|
|
|
|
insn = insn | (value & 0x03fffffc);
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
|
|
|
|
|
else
|
|
|
|
|
bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
|
|
|
|
|
}
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_VTABLE_INHERIT:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_done = 0;
|
|
|
|
|
if (fixP->fx_addsy
|
|
|
|
|
&& !S_IS_DEFINED (fixP->fx_addsy)
|
|
|
|
|
&& !S_IS_WEAK (fixP->fx_addsy))
|
|
|
|
|
S_SET_WEAK (fixP->fx_addsy);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case BFD_RELOC_VTABLE_ENTRY:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_done = 0;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
break;
|
|
|
|
|
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
#ifdef OBJ_ELF
|
|
|
|
|
/* Generated by reference to `sym@tocbase'. The sym is
|
|
|
|
|
ignored by the linker. */
|
|
|
|
|
case BFD_RELOC_PPC64_TOC:
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_done = 0;
|
* configure.in: Recognise powerpc*le*, not just powerpcle*.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
2001-08-27 10:42:16 +00:00
|
|
|
|
break;
|
|
|
|
|
#endif
|
1999-05-03 07:29:11 +00:00
|
|
|
|
default:
|
2000-12-03 06:49:23 +00:00
|
|
|
|
fprintf (stderr,
|
2001-11-15 21:29:00 +00:00
|
|
|
|
_("Gas failure, reloc value %d\n"), fixP->fx_r_type);
|
2001-07-02 10:54:49 +00:00
|
|
|
|
fflush (stderr);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
abort ();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#ifdef OBJ_ELF
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_addnumber = value;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#else
|
2001-11-15 21:29:00 +00:00
|
|
|
|
if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
|
|
|
|
|
fixP->fx_addnumber = 0;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
#ifdef TE_PE
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_addnumber = 0;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#else
|
|
|
|
|
/* We want to use the offset within the data segment of the
|
|
|
|
|
symbol, not the actual VMA of the symbol. */
|
2001-11-15 21:29:00 +00:00
|
|
|
|
fixP->fx_addnumber =
|
|
|
|
|
- bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
|
1999-05-03 07:29:11 +00:00
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Generate a reloc for a fixup. */
|
|
|
|
|
|
|
|
|
|
arelent *
|
|
|
|
|
tc_gen_reloc (seg, fixp)
|
2000-04-02 06:27:51 +00:00
|
|
|
|
asection *seg ATTRIBUTE_UNUSED;
|
1999-05-03 07:29:11 +00:00
|
|
|
|
fixS *fixp;
|
|
|
|
|
{
|
|
|
|
|
arelent *reloc;
|
|
|
|
|
|
|
|
|
|
reloc = (arelent *) xmalloc (sizeof (arelent));
|
|
|
|
|
|
Add support for storing local symbols in a small structure to save
memory when assembling large files.
* as.h: Don't include struc-symbol.h.
(symbolS): Add typedef.
* symbols.c: Include struc-symbol.h.
(local_hash): New static variable.
(save_symbol_name): New static function, from symbol_create.
(symbol_create): Call save_symbol_name.
(local_symbol_count): New static variable.
(local_symbol_conversion_count): Likewise.
(LOCAL_SYMBOL_CHECK): Define.
(local_symbol_make): New static function.
(local_symbol_convert): New static function.
(colon): Handle local symbols. Create local symbol for local
label name.
(symbol_table_insert): Handle local symbols.
(symbol_find_or_make): Create local symbol for local label name.
(symbol_find_base): Check for local symbol.
(symbol_append, symbol_insert): Check for local symbols.
(symbol_clear_list_pointers, symbol_remove): Likewise.
(verify_symbol_chain): Likewise.
(copy_symbol_attributes): Likewise.
(resolve_symbol_value): Handle local symbols.
(resolve_local_symbol): New static function.
(resolve_local_symbol_values): New function.
(S_GET_VALUE, S_SET_VALUE): Handle local symbols.
(S_IS_FUNCTION, S_IS_EXTERNAL, S_IS_WEAK, S_IS_COMMON): Likewise.
(S_IS_DEFINED, S_IS_DEBUG, S_IS_LOCAL, S_GET_NAME): Likewise.
(S_GET_SEGMENT, S_SET_SEGMENT, S_SET_EXTERNAL): Likewise.
(S_CLEAR_EXTERNAL, S_SET_WEAK, S_SET_NAME): Likewise.
(symbol_previous, symbol_next): New functions.
(symbol_get_value_expression): Likewise.
(symbol_set_value_expression): Likewise.
(symbol_set_frag, symbol_get_frag): Likewise.
(symbol_mark_used, symbol_clear_used, symbol_used_p): Likewise.
(symbol_mark_used_in_reloc): Likewise.
(symbol_clear_used_in_reloc, symbol_used_in_reloc_p): Likewise.
(symbol_mark_mri_common, symbol_clear_mri_common): Likewise.
(symbol_mri_common_p): Likewise.
(symbol_mark_written, symbol_clear_written): Likewise.
(symbol_written_p): Likewise.
(symbol_mark_resolved, symbol_resolved_p): Likewise.
(symbol_section_p, symbol_equated_p): Likewise.
(symbol_constant_p): Likewise.
(symbol_get_bfdsym, symbol_set_bfdsym): Likewise.
(symbol_get_obj, symbol_set_obj): Likewise.
(symbol_get_tc, symbol_set_tc): Likewise.
(symbol_begin): Initialize local_hash.
(print_symbol_value_1): Handle local symbols.
(symbol_print_statistics): Print local symbol statistics.
* symbols.h: Include "struc-symbol.h" if not BFD_ASSEMBLER.
Declare new symbols.c functions. Move many declarations here from
struc-symbol.h.
(SYMBOLS_NEED_BACKPOINTERS): Define if needed.
* struc-symbol.h (SYMBOLS_NEED_BACKPOINTERS): Don't set.
(struct symbol): Move bsym to make it clearly the first field.
Remove TARGET_SYMBOL_FIELDS.
(symbolS): Don't typedef.
(struct broken_word): Remove.
(N_TYPE_seg, seg_N_TYPE): Move to symbol.h.
(SEGMENT_TO_SYMBOL_TYPE, N_REGISTER): Likewise.
(symbol_clear_list_pointers): Likewise.
(symbol_insert, symbol_remove): Likewise.
(symbol_previous, symbol_append): Likewise.
(verify_symbol_chain, verify_symbol_chain_2): Likewise.
(struct local_symbol): Define.
(local_symbol_converted_p, local_symbol_mark_converted): Define.
(local_symbol_resolved_p, local_symbol_mark_resolved): Define.
(local_symbol_get_frag, local_symbol_set_frag): Define.
(local_symbol_get_real_symbol): Define.
(local_symbol_set_real_symbol): Define.
Define.
* write.c (write_object_file): Call resolve_local_symbol_values.
* config/obj-ecoff.h (OBJ_SYMFIELD_TYPE): Define.
(TARGET_SYMBOL_FIELDS): Don't define.
* config/obj-elf.h (OBJ_SYMFIELD_TYPE): Add local field. If
ECOFF_DEBUGGING, add ECOFF fields.
(ELF_TARGET_SYMBOL_FIELDS, TARGET_SYMBOL_FIELDS): Don't define.
* config/obj-multi.h (struct elf_obj_sy): Add local field. If
ECOFF_DEBUGGING, add ECOFF fields.
(ELF_TARGET_SYMBOL_FIELDS, TARGET_SYMBOL_FIELDS): Don't define.
(ECOFF_DEBUG_TARGET_SYMBOL_FIELDS): Don't define.
* config/tc-mcore.h: Don't include struc-symbol.h.
(TARGET_SYMBOL_FIELDS): Don't define.
(struct mcore_tc_sy): Define.
(TC_SYMFIELD_TYPE): Define.
* Many files: Use symbolS instead of struct symbol. Use new
accessor functions rather than referring to symbolS fields
directly.
* read.c (s_mri_common): Don't add in value of line_label.
* config/tc-mips.c (md_apply_fix): Correct parenthesization when
checking for SEC_LINK_ONCE.
* config/tc-sh.h (sh_fix_adjustable): Declare.
1999-06-03 00:29:48 +00:00
|
|
|
|
reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
|
|
|
|
|
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
|
|
|
|
|
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
|
|
|
|
|
if (reloc->howto == (reloc_howto_type *) NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad_where (fixp->fx_file, fixp->fx_line,
|
2001-07-02 10:54:49 +00:00
|
|
|
|
_("reloc %d not supported by object file format"),
|
|
|
|
|
(int) fixp->fx_r_type);
|
1999-05-03 07:29:11 +00:00
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
reloc->addend = fixp->fx_addnumber;
|
|
|
|
|
|
|
|
|
|
return reloc;
|
|
|
|
|
}
|