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Add TMS320C4x support

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This commit is contained in:
Nick Clifton 2002-08-28 10:38:51 +00:00
parent df44284ec4
commit 026df7c5e6
47 changed files with 6235 additions and 232 deletions
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19
bfd/ChangeLog
View File

@ -1,3 +1,22 @@
2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com>
* config.bfd: Add tic4x-*-*coff* and c4x-*-*coff* target.
* configure.in: Add tic4x_coff vector files.
* configure: Regenerate.
* Makefile.am: Add tic4x target.
* Makefile.in: Regenerate.
2002-08-27 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* archures.c: Add the BFD arch type tic4x.
* bfd-in.h: Add BFD_IN_MEMORY flag.
* coff-tic4x.c: New file.
* coffswap.h (coff_swap_sym_out): Add preadjuster.
* cpu-tic4x.c: New file.
* targets.c: Added tic4x- in list of xvecs.
* ticoff.h: New file.
* bfd-in2.h: Regenerate.
2002-08-27 Adam Nemet <anemet@lnxw.com>
* elf32-arm.h (elf32_arm_finish_dynamic_sections): Set the last

8
bfd/Makefile.am
View File

@ -89,6 +89,7 @@ ALL_MACHINES = \
cpu-sh.lo \
cpu-sparc.lo \
cpu-tic30.lo \
cpu-tic4x.lo \
cpu-tic54x.lo \
cpu-tic80.lo \
cpu-v850.lo \
@ -140,6 +141,7 @@ ALL_MACHINES_CFILES = \
cpu-sh.c \
cpu-sparc.c \
cpu-tic30.c \
cpu-tic4x.c \
cpu-tic54x.c \
cpu-tic80.c \
cpu-v850.c \
@ -185,6 +187,7 @@ BFD32_BACKENDS = \
coff-stgo32.lo \
coff-svm68k.lo \
coff-tic30.lo \
coff-tic4x.lo \
coff-tic54x.lo \
coff-tic80.lo \
coff-u68k.lo \
@ -346,6 +349,7 @@ BFD32_BACKENDS_CFILES = \
coff-stgo32.c \
coff-svm68k.c \
coff-tic30.c \
coff-tic4x.c \
coff-tic54x.c \
coff-tic80.c \
coff-u68k.c \
@ -935,6 +939,7 @@ cpu-s390.lo: cpu-s390.c $(INCDIR)/filenames.h
cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h
cpu-sparc.lo: cpu-sparc.c $(INCDIR)/filenames.h
cpu-tic30.lo: cpu-tic30.c $(INCDIR)/filenames.h
cpu-tic4x.lo: cpu-tic4x.c $(INCDIR)/filenames.h
cpu-tic54x.lo: cpu-tic54x.c $(INCDIR)/filenames.h
cpu-tic80.lo: cpu-tic80.c $(INCDIR)/filenames.h
cpu-v850.lo: cpu-v850.c $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h
@ -1053,6 +1058,9 @@ coff-svm68k.lo: coff-svm68k.c coff-m68k.c $(INCDIR)/filenames.h \
coff-tic30.lo: coff-tic30.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/coff/tic30.h $(INCDIR)/coff/external.h $(INCDIR)/coff/internal.h \
libcoff.h coffcode.h coffswap.h
coff-tic4x.lo: coff-tic4x.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
coff-tic54x.lo: coff-tic54x.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h

8
bfd/Makefile.in
View File

@ -215,6 +215,7 @@ ALL_MACHINES = \
cpu-sh.lo \
cpu-sparc.lo \
cpu-tic30.lo \
cpu-tic4x.lo \
cpu-tic54x.lo \
cpu-tic80.lo \
cpu-v850.lo \
@ -267,6 +268,7 @@ ALL_MACHINES_CFILES = \
cpu-sh.c \
cpu-sparc.c \
cpu-tic30.c \
cpu-tic4x.c \
cpu-tic54x.c \
cpu-tic80.c \
cpu-v850.c \
@ -313,6 +315,7 @@ BFD32_BACKENDS = \
coff-stgo32.lo \
coff-svm68k.lo \
coff-tic30.lo \
coff-tic4x.lo \
coff-tic54x.lo \
coff-tic80.lo \
coff-u68k.lo \
@ -475,6 +478,7 @@ BFD32_BACKENDS_CFILES = \
coff-stgo32.c \
coff-svm68k.c \
coff-tic30.c \
coff-tic4x.c \
coff-tic54x.c \
coff-tic80.c \
coff-u68k.c \
@ -1465,6 +1469,7 @@ cpu-s390.lo: cpu-s390.c $(INCDIR)/filenames.h
cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h
cpu-sparc.lo: cpu-sparc.c $(INCDIR)/filenames.h
cpu-tic30.lo: cpu-tic30.c $(INCDIR)/filenames.h
cpu-tic4x.lo: cpu-tic4x.c $(INCDIR)/filenames.h
cpu-tic54x.lo: cpu-tic54x.c $(INCDIR)/filenames.h
cpu-tic80.lo: cpu-tic80.c $(INCDIR)/filenames.h
cpu-v850.lo: cpu-v850.c $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h
@ -1583,6 +1588,9 @@ coff-svm68k.lo: coff-svm68k.c coff-m68k.c $(INCDIR)/filenames.h \
coff-tic30.lo: coff-tic30.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/coff/tic30.h $(INCDIR)/coff/external.h $(INCDIR)/coff/internal.h \
libcoff.h coffcode.h coffswap.h
coff-tic4x.lo: coff-tic4x.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
coff-tic54x.lo: coff-tic54x.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h

5
bfd/archures.c
View File

@ -228,6 +228,9 @@ DESCRIPTION
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
. bfd_arch_tic4x, {* Texas Instruments TMS320C3X/4X *}
.#define bfd_mach_c3x 30
.#define bfd_mach_c4x 40
. bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
. bfd_arch_v850, {* NEC V850 *}
@ -358,6 +361,7 @@ extern const bfd_arch_info_type bfd_s390_arch;
extern const bfd_arch_info_type bfd_sh_arch;
extern const bfd_arch_info_type bfd_sparc_arch;
extern const bfd_arch_info_type bfd_tic30_arch;
extern const bfd_arch_info_type bfd_tic4x_arch;
extern const bfd_arch_info_type bfd_tic54x_arch;
extern const bfd_arch_info_type bfd_tic80_arch;
extern const bfd_arch_info_type bfd_v850_arch;
@ -412,6 +416,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_sh_arch,
&bfd_sparc_arch,
&bfd_tic30_arch,
&bfd_tic4x_arch,
&bfd_tic54x_arch,
&bfd_tic80_arch,
&bfd_v850_arch,

3
bfd/bfd-in.h
View File

@ -267,6 +267,9 @@ bfd_format;
/* This flag indicates that the BFD contents are actually cached in
memory. If this is set, iostream points to a bfd_in_memory struct. */
#define BFD_IN_MEMORY 0x800
/* The sections in this BFD specify a memory page. */
#define HAS_LOAD_PAGE 0x1000
/* Symbols and relocation. */

6
bfd/bfd-in2.h
View File

@ -273,6 +273,9 @@ bfd_format;
/* This flag indicates that the BFD contents are actually cached in
memory. If this is set, iostream points to a bfd_in_memory struct. */
#define BFD_IN_MEMORY 0x800
/* The sections in this BFD specify a memory page */
#define HAS_LOAD_PAGE 0x1000
/* Symbols and relocation. */
@ -1618,6 +1621,9 @@ enum bfd_architecture
bfd_arch_ns32k, /* National Semiconductors ns32000 */
bfd_arch_w65, /* WDC 65816 */
bfd_arch_tic30, /* Texas Instruments TMS320C30 */
bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */
#define bfd_mach_c3x 30
#define bfd_mach_c4x 40
bfd_arch_tic54x, /* Texas Instruments TMS320C54X */
bfd_arch_tic80, /* TI TMS320c80 (MVP) */
bfd_arch_v850, /* NEC V850 */

616
bfd/coff-tic4x.c Normal file
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@ -0,0 +1,616 @@
/* BFD back-end for TMS320C4X coff binaries.
Copyright (C) 1996-99, 2000, 2002 Free Software Foundation, Inc.
Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
#include "bfdlink.h"
#include "coff/tic4x.h"
#include "coff/internal.h"
#include "libcoff.h"
#undef F_LSYMS
#define F_LSYMS F_LSYMS_TICOFF
static boolean
ticoff0_bad_format_hook (abfd, filehdr)
bfd *abfd;
PTR filehdr;
{
struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr;
if (COFF0_BADMAG (*internal_f))
return false;
return true;
}
static boolean
ticoff1_bad_format_hook (abfd, filehdr)
bfd *abfd ATTRIBUTE_UNUSED;
PTR filehdr;
{
struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr;
if (COFF1_BADMAG (*internal_f))
return false;
return true;
}
/* Replace the stock _bfd_coff_is_local_label_name to recognize TI COFF local
labels. */
static boolean
ticoff_bfd_is_local_label_name (abfd, name)
bfd *abfd ATTRIBUTE_UNUSED;
const char *name;
{
if (TICOFF_LOCAL_LABEL_P(name))
return true;
return false;
}
#define coff_bfd_is_local_label_name ticoff_bfd_is_local_label_name
static void tic4x_reloc_processing
PARAMS ((arelent *, struct internal_reloc *, asymbol **, bfd *, asection *));
#define RELOC_PROCESSING(RELENT,RELOC,SYMS,ABFD,SECT)\
tic4x_reloc_processing (RELENT,RELOC,SYMS,ABFD,SECT)
/* Customize coffcode.h; the default coff_ functions are set up to use
COFF2; coff_bad_format_hook uses BADMAG, so set that for COFF2.
The COFF1 and COFF0 vectors use custom _bad_format_hook procs
instead of setting BADMAG. */
#define BADMAG(x) COFF2_BADMAG(x)
#include "coffcode.h"
static bfd_reloc_status_type
tic4x_relocation (abfd, reloc_entry, symbol, data, input_section,
output_bfd, error_message)
bfd *abfd ATTRIBUTE_UNUSED;
arelent *reloc_entry;
asymbol *symbol ATTRIBUTE_UNUSED;
PTR data ATTRIBUTE_UNUSED;
asection *input_section;
bfd *output_bfd;
char **error_message ATTRIBUTE_UNUSED;
{
if (output_bfd != (bfd *) NULL)
{
/* This is a partial relocation, and we want to apply the
relocation to the reloc entry rather than the raw data.
Modify the reloc inplace to reflect what we now know. */
reloc_entry->address += input_section->output_offset;
return bfd_reloc_ok;
}
return bfd_reloc_continue;
}
reloc_howto_type tic4x_howto_table[] =
{
HOWTO(R_RELWORD, 0, 2, 16, false, 0, complain_overflow_signed, tic4x_relocation, "RELWORD", true, 0x0000ffff, 0x0000ffff, false),
HOWTO(R_REL24, 0, 2, 24, false, 0, complain_overflow_bitfield, tic4x_relocation, "REL24", true, 0x00ffffff, 0x00ffffff, false),
HOWTO(R_RELLONG, 0, 2, 32, false, 0, complain_overflow_dont, tic4x_relocation, "RELLONG", true, 0xffffffff, 0xffffffff, false),
HOWTO(R_PCRWORD, 0, 2, 16, true, 0, complain_overflow_signed, tic4x_relocation, "PCRWORD", true, 0x0000ffff, 0x0000ffff, false),
HOWTO(R_PCR24, 0, 2, 24, true, 0, complain_overflow_signed, tic4x_relocation, "PCR24", true, 0x00ffffff, 0x00ffffff, false),
HOWTO(R_PARTLS16, 0, 2, 16, false, 0, complain_overflow_dont, tic4x_relocation, "PARTLS16", true, 0x0000ffff, 0x0000ffff, false),
HOWTO(R_PARTMS8, 16, 2, 16, false, 0, complain_overflow_dont, tic4x_relocation, "PARTMS8", true, 0x0000ffff, 0x0000ffff, false),
HOWTO(R_RELWORD, 0, 2, 16, false, 0, complain_overflow_signed, tic4x_relocation, "ARELWORD", true, 0x0000ffff, 0x0000ffff, false),
HOWTO(R_REL24, 0, 2, 24, false, 0, complain_overflow_signed, tic4x_relocation, "AREL24", true, 0x00ffffff, 0x00ffffff, false),
HOWTO(R_RELLONG, 0, 2, 32, false, 0, complain_overflow_signed, tic4x_relocation, "ARELLONG", true, 0xffffffff, 0xffffffff, false),
HOWTO(R_PCRWORD, 0, 2, 16, true, 0, complain_overflow_signed, tic4x_relocation, "APCRWORD", true, 0x0000ffff, 0x0000ffff, false),
HOWTO(R_PCR24, 0, 2, 24, true, 0, complain_overflow_signed, tic4x_relocation, "APCR24", true, 0x00ffffff, 0x00ffffff, false),
HOWTO(R_PARTLS16, 0, 2, 16, false, 0, complain_overflow_dont, tic4x_relocation, "APARTLS16", true, 0x0000ffff, 0x0000ffff, false),
HOWTO(R_PARTMS8, 16, 2, 16, false, 0, complain_overflow_dont, tic4x_relocation, "APARTMS8", true, 0x0000ffff, 0x0000ffff, false),
};
#define HOWTO_SIZE (sizeof(tic4x_howto_table) / sizeof(tic4x_howto_table[0]))
#undef coff_bfd_reloc_type_lookup
#define coff_bfd_reloc_type_lookup tic4x_coff_reloc_type_lookup
/* For the case statement use the code values used tc_gen_reloc (defined in
bfd/reloc.c) to map to the howto table entries. */
static reloc_howto_type *
tic4x_coff_reloc_type_lookup (abfd, code)
bfd *abfd ATTRIBUTE_UNUSED;
bfd_reloc_code_real_type code;
{
unsigned int type;
unsigned int i;
switch (code)
{
case BFD_RELOC_32: type = R_RELLONG; break;
case BFD_RELOC_24: type = R_REL24; break;
case BFD_RELOC_16: type = R_RELWORD; break;
case BFD_RELOC_24_PCREL: type = R_PCR24; break;
case BFD_RELOC_16_PCREL: type = R_PCRWORD; break;
case BFD_RELOC_HI16: type = R_PARTMS8; break;
case BFD_RELOC_LO16: type = R_PARTLS16; break;
default:
return NULL;
}
for (i = 0; i < HOWTO_SIZE; i++)
{
if (tic4x_howto_table[i].type == type)
return tic4x_howto_table + i;
}
return NULL;
}
/* Code to turn a r_type into a howto ptr, uses the above howto table.
Called after some initial checking by the tic4x_rtype_to_howto fn
below. */
static void
tic4x_lookup_howto (internal, dst)
arelent *internal;
struct internal_reloc *dst;
{
unsigned int i;
int bank = (dst->r_symndx == -1) ? HOWTO_BANK : 0;
for (i = 0; i < HOWTO_SIZE; i++)
{
if (tic4x_howto_table[i].type == dst->r_type)
{
internal->howto = tic4x_howto_table + i + bank;
return;
}
}
(*_bfd_error_handler) (_("Unrecognized reloc type 0x%x"),
(unsigned int) dst->r_type);
abort();
}
#undef coff_rtype_to_howto
#define coff_rtype_to_howto coff_tic4x_rtype_to_howto
static reloc_howto_type *
coff_tic4x_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
bfd *abfd ATTRIBUTE_UNUSED;
asection *sec;
struct internal_reloc *rel;
struct coff_link_hash_entry *h ATTRIBUTE_UNUSED;
struct internal_syment *sym ATTRIBUTE_UNUSED;
bfd_vma *addendp;
{
arelent genrel;
if (rel->r_symndx == -1 && addendp != NULL)
/* This is a TI "internal relocation", which means that the relocation
amount is the amount by which the current section is being relocated
in the output section. */
*addendp = (sec->output_section->vma + sec->output_offset) - sec->vma;
tic4x_lookup_howto (&genrel, rel);
return genrel.howto;
}
static void
tic4x_reloc_processing (relent, reloc, symbols, abfd, section)
arelent *relent;
struct internal_reloc *reloc;
asymbol **symbols;
bfd *abfd;
asection *section;
{
asymbol *ptr;
relent->address = reloc->r_vaddr;
if (reloc->r_symndx != -1)
{
if (reloc->r_symndx < 0 || reloc->r_symndx >= obj_conv_table_size (abfd))
{
(*_bfd_error_handler)
(_("%s: warning: illegal symbol index %ld in relocs"),
bfd_get_filename (abfd), reloc->r_symndx);
relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
ptr = NULL;
}
else
{
relent->sym_ptr_ptr = (symbols
+ obj_convert (abfd)[reloc->r_symndx]);
ptr = *(relent->sym_ptr_ptr);
}
}
else
{
relent->sym_ptr_ptr = section->symbol_ptr_ptr;
ptr = *(relent->sym_ptr_ptr);
}
/* The symbols definitions that we have read in have been relocated
as if their sections started at 0. But the offsets refering to
the symbols in the raw data have not been modified, so we have to
have a negative addend to compensate.
Note that symbols which used to be common must be left alone. */
/* Calculate any reloc addend by looking at the symbol. */
CALC_ADDEND (abfd, ptr, *reloc, relent);
relent->address -= section->vma;
/* !! relent->section = (asection *) NULL; */
/* Fill in the relent->howto field from reloc->r_type. */
tic4x_lookup_howto (relent, reloc);
}
static const bfd_coff_backend_data ticoff0_swap_table =
{
coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in,
coff_SWAP_aux_out, coff_SWAP_sym_out,
coff_SWAP_lineno_out, coff_SWAP_reloc_out,
coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out,
coff_SWAP_scnhdr_out,
FILHSZ_V0, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ_V0, LINESZ, FILNMLEN,
#ifdef COFF_LONG_FILENAMES
true,
#else
false,
#endif
#ifdef COFF_LONG_SECTION_NAMES
true,
#else
false,
#endif
#ifdef COFF_FORCE_SYMBOLS_IN_STRINGS
true,
#else
false,
#endif
#ifdef COFF_DEBUG_STRING_WIDE_PREFIX
4,
#else
2,
#endif
COFF_DEFAULT_SECTION_ALIGNMENT_POWER,
coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in,
coff_SWAP_reloc_in, ticoff0_bad_format_hook, coff_set_arch_mach_hook,
coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook,
coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook,
coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate,
coff_classify_symbol, coff_compute_section_file_positions,
coff_start_final_link, coff_relocate_section, coff_rtype_to_howto,
coff_adjust_symndx, coff_link_add_one_symbol,
coff_link_output_has_begun, coff_final_link_postscript
};
/* COFF1 differs in section header size. */
static const bfd_coff_backend_data ticoff1_swap_table =
{
coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in,
coff_SWAP_aux_out, coff_SWAP_sym_out,
coff_SWAP_lineno_out, coff_SWAP_reloc_out,
coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out,
coff_SWAP_scnhdr_out,
FILHSZ, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ, LINESZ, FILNMLEN,
#ifdef COFF_LONG_FILENAMES
true,
#else
false,
#endif
#ifdef COFF_LONG_SECTION_NAMES
true,
#else
false,
#endif
#ifdef COFF_FORCE_SYMBOLS_IN_STRINGS
true,
#else
false,
#endif
#ifdef COFF_DEBUG_STRING_WIDE_PREFIX
4,
#else
2,
#endif
COFF_DEFAULT_SECTION_ALIGNMENT_POWER,
coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in,
coff_SWAP_reloc_in, ticoff1_bad_format_hook, coff_set_arch_mach_hook,
coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook,
coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook,
coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate,
coff_classify_symbol, coff_compute_section_file_positions,
coff_start_final_link, coff_relocate_section, coff_rtype_to_howto,
coff_adjust_symndx, coff_link_add_one_symbol,
coff_link_output_has_begun, coff_final_link_postscript
};
/* TI COFF v0, DOS tools (little-endian headers). */
const bfd_target tic4x_coff0_vec =
{
"coff0-c4x", /* Name. */
bfd_target_coff_flavour,
BFD_ENDIAN_LITTLE, /* Data byte order is little. */
BFD_ENDIAN_LITTLE, /* Header byte order is little (DOS tools). */
(HAS_RELOC | EXEC_P | /* Object flags. */
HAS_LINENO | HAS_DEBUG |
HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */
'_', /* Leading symbol underscore. */
'/', /* ar_pad_char. */
15, /* ar_max_namelen. */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
bfd_generic_archive_p, _bfd_dummy_target},
{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
bfd_false},
{bfd_false, coff_write_object_contents, /* bfd_write_contents */
_bfd_write_archive_contents, bfd_false},
BFD_JUMP_TABLE_GENERIC (coff),
BFD_JUMP_TABLE_COPY (coff),
BFD_JUMP_TABLE_CORE (_bfd_nocore),
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
BFD_JUMP_TABLE_SYMBOLS (coff),
BFD_JUMP_TABLE_RELOCS (coff),
BFD_JUMP_TABLE_WRITE (coff),
BFD_JUMP_TABLE_LINK (coff),
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
NULL,
(PTR)&ticoff0_swap_table
};
/* TI COFF v0, SPARC tools (big-endian headers). */
const bfd_target tic4x_coff0_beh_vec =
{
"coff0-beh-c4x", /* Name. */
bfd_target_coff_flavour,
BFD_ENDIAN_LITTLE, /* Data byte order is little. */
BFD_ENDIAN_BIG, /* Header byte order is big. */
(HAS_RELOC | EXEC_P | /* Object flags. */
HAS_LINENO | HAS_DEBUG |
HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */
'_', /* Leading symbol underscore. */
'/', /* ar_pad_char */
15, /* ar_max_namelen */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
bfd_getb64, bfd_getb_signed_64, bfd_putb64,
bfd_getb32, bfd_getb_signed_32, bfd_putb32,
bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
bfd_generic_archive_p, _bfd_dummy_target},
{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
bfd_false},
{bfd_false, coff_write_object_contents, /* bfd_write_contents */
_bfd_write_archive_contents, bfd_false},
BFD_JUMP_TABLE_GENERIC (coff),
BFD_JUMP_TABLE_COPY (coff),
BFD_JUMP_TABLE_CORE (_bfd_nocore),
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
BFD_JUMP_TABLE_SYMBOLS (coff),
BFD_JUMP_TABLE_RELOCS (coff),
BFD_JUMP_TABLE_WRITE (coff),
BFD_JUMP_TABLE_LINK (coff),
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
&tic4x_coff0_vec,
(PTR)&ticoff0_swap_table
};
/* TI COFF v1, DOS tools (little-endian headers). */
const bfd_target tic4x_coff1_vec =
{
"coff1-c4x", /* Name. */
bfd_target_coff_flavour,
BFD_ENDIAN_LITTLE, /* Data byte order is little. */
BFD_ENDIAN_LITTLE, /* Header byte order is little (DOS tools). */
(HAS_RELOC | EXEC_P | /* Object flags. */
HAS_LINENO | HAS_DEBUG |
HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */
'_', /* Leading symbol underscore. */
'/', /* ar_pad_char */
15, /* ar_max_namelen */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
bfd_generic_archive_p, _bfd_dummy_target},
{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
bfd_false},
{bfd_false, coff_write_object_contents, /* bfd_write_contents */
_bfd_write_archive_contents, bfd_false},
BFD_JUMP_TABLE_GENERIC (coff),
BFD_JUMP_TABLE_COPY (coff),
BFD_JUMP_TABLE_CORE (_bfd_nocore),
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
BFD_JUMP_TABLE_SYMBOLS (coff),
BFD_JUMP_TABLE_RELOCS (coff),
BFD_JUMP_TABLE_WRITE (coff),
BFD_JUMP_TABLE_LINK (coff),
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
&tic4x_coff0_beh_vec,
(PTR)&ticoff1_swap_table
};
/* TI COFF v1, SPARC tools (big-endian headers). */
const bfd_target tic4x_coff1_beh_vec =
{
"coff1-beh-c4x", /* Name. */
bfd_target_coff_flavour,
BFD_ENDIAN_LITTLE, /* Data byte order is little. */
BFD_ENDIAN_BIG, /* Header byte order is big. */
(HAS_RELOC | EXEC_P | /* Object flags. */
HAS_LINENO | HAS_DEBUG |
HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */
'_', /* Leading symbol underscore. */
'/', /* ar_pad_char */
15, /* ar_max_namelen */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
bfd_getb64, bfd_getb_signed_64, bfd_putb64,
bfd_getb32, bfd_getb_signed_32, bfd_putb32,
bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
bfd_generic_archive_p, _bfd_dummy_target},
{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
bfd_false},
{bfd_false, coff_write_object_contents, /* bfd_write_contents */
_bfd_write_archive_contents, bfd_false},
BFD_JUMP_TABLE_GENERIC (coff),
BFD_JUMP_TABLE_COPY (coff),
BFD_JUMP_TABLE_CORE (_bfd_nocore),
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
BFD_JUMP_TABLE_SYMBOLS (coff),
BFD_JUMP_TABLE_RELOCS (coff),
BFD_JUMP_TABLE_WRITE (coff),
BFD_JUMP_TABLE_LINK (coff),
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
&tic4x_coff1_vec,
(PTR)&ticoff1_swap_table
};
/* TI COFF v2, TI DOS tools output (little-endian headers). */
const bfd_target tic4x_coff2_vec =
{
"coff2-c4x", /* Name. */
bfd_target_coff_flavour,
BFD_ENDIAN_LITTLE, /* Data byte order is little. */
BFD_ENDIAN_LITTLE, /* Header byte order is little (DOS tools). */
(HAS_RELOC | EXEC_P | /* Object flags. */
HAS_LINENO | HAS_DEBUG |
HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */
'_', /* Leading symbol underscore. */
'/', /* ar_pad_char */
15, /* ar_max_namelen */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
bfd_generic_archive_p, _bfd_dummy_target},
{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
bfd_false},
{bfd_false, coff_write_object_contents, /* bfd_write_contents */
_bfd_write_archive_contents, bfd_false},
BFD_JUMP_TABLE_GENERIC (coff),
BFD_JUMP_TABLE_COPY (coff),
BFD_JUMP_TABLE_CORE (_bfd_nocore),
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
BFD_JUMP_TABLE_SYMBOLS (coff),
BFD_JUMP_TABLE_RELOCS (coff),
BFD_JUMP_TABLE_WRITE (coff),
BFD_JUMP_TABLE_LINK (coff),
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
&tic4x_coff1_beh_vec,
COFF_SWAP_TABLE
};
/* TI COFF v2, TI SPARC tools output (big-endian headers). */
const bfd_target tic4x_coff2_beh_vec =
{
"coff2-beh-c4x", /* Name. */
bfd_target_coff_flavour,
BFD_ENDIAN_LITTLE, /* Data byte order is little. */
BFD_ENDIAN_BIG, /* Header byte order is big. */
(HAS_RELOC | EXEC_P | /* Object flags. */
HAS_LINENO | HAS_DEBUG |
HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* Section flags. */
'_', /* Leading symbol underscore. */
'/', /* ar_pad_char */
15, /* ar_max_namelen */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
bfd_getb64, bfd_getb_signed_64, bfd_putb64,
bfd_getb32, bfd_getb_signed_32, bfd_putb32,
bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
bfd_generic_archive_p, _bfd_dummy_target},
{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
bfd_false},
{bfd_false, coff_write_object_contents, /* bfd_write_contents */
_bfd_write_archive_contents, bfd_false},
BFD_JUMP_TABLE_GENERIC (coff),
BFD_JUMP_TABLE_COPY (coff),
BFD_JUMP_TABLE_CORE (_bfd_nocore),
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
BFD_JUMP_TABLE_SYMBOLS (coff),
BFD_JUMP_TABLE_RELOCS (coff),
BFD_JUMP_TABLE_WRITE (coff),
BFD_JUMP_TABLE_LINK (coff),
BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
&tic4x_coff2_vec,
COFF_SWAP_TABLE
};

85
bfd/coffswap.h
View File

@ -1,24 +1,24 @@
/* Generic COFF swapping routines, for BFD.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2000,
2001
2001, 2002
Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* This file contains routines used to swap COFF data. It is a header
file because the details of swapping depend on the details of the
@ -381,7 +381,12 @@ coff_swap_sym_out (abfd, inp, extp)
{
struct internal_syment *in = (struct internal_syment *) inp;
SYMENT *ext =(SYMENT *) extp;
if(in->_n._n_name[0] == 0)
#ifdef COFF_ADJUST_SYM_OUT_PRE
COFF_ADJUST_SYM_OUT_PRE (abfd, inp, extp);
#endif
if (in->_n._n_name[0] == 0)
{
H_PUT_32 (abfd, 0, ext->e.e.e_zeroes);
H_PUT_32 (abfd, in->_n._n_n._n_offset, ext->e.e.e_offset);
@ -391,11 +396,13 @@ coff_swap_sym_out (abfd, inp, extp)
#if SYMNMLEN != E_SYMNMLEN
-> Error, we need to cope with truncating or extending SYMNMLEN!;
#else
memcpy(ext->e.e_name, in->_n._n_name, SYMNMLEN);
memcpy (ext->e.e_name, in->_n._n_name, SYMNMLEN);
#endif
}
H_PUT_32 (abfd, in->n_value, ext->e_value);
H_PUT_16 (abfd, in->n_scnum, ext->e_scnum);
if (sizeof (ext->e_type) == 2)
{
H_PUT_16 (abfd, in->n_type, ext->e_type);
@ -404,11 +411,14 @@ coff_swap_sym_out (abfd, inp, extp)
{
H_PUT_32 (abfd, in->n_type, ext->e_type);
}
H_PUT_8 (abfd, in->n_sclass, ext->e_sclass);
H_PUT_8 (abfd, in->n_numaux, ext->e_numaux);
#ifdef COFF_ADJUST_SYM_OUT_POST
COFF_ADJUST_SYM_OUT_POST (abfd, inp, extp);
#endif
return SYMESZ;
}
@ -428,6 +438,7 @@ coff_swap_aux_in (abfd, ext1, type, class, indx, numaux, in1)
#ifdef COFF_ADJUST_AUX_IN_PRE
COFF_ADJUST_AUX_IN_PRE (abfd, ext1, type, class, indx, numaux, in1);
#endif
switch (class)
{
case C_FILE:
@ -448,9 +459,7 @@ coff_swap_aux_in (abfd, ext1, type, class, indx, numaux, in1)
numaux * sizeof (AUXENT));
}
else
{
memcpy (in->x_file.x_fname, ext->x_file.x_fname, FILNMLEN);
}
memcpy (in->x_file.x_fname, ext->x_file.x_fname, FILNMLEN);
#endif
}
goto end;
@ -502,7 +511,7 @@ coff_swap_aux_in (abfd, ext1, type, class, indx, numaux, in1)
H_GET_16 (abfd, ext->x_sym.x_fcnary.x_ary.x_dimen[3]);
}
if (ISFCN(type))
if (ISFCN (type))
{
in->x_sym.x_misc.x_fsize = H_GET_32 (abfd, ext->x_sym.x_misc.x_fsize);
}
@ -535,7 +544,9 @@ coff_swap_aux_out (abfd, inp, type, class, indx, numaux, extp)
#ifdef COFF_ADJUST_AUX_OUT_PRE
COFF_ADJUST_AUX_OUT_PRE (abfd, inp, type, class, indx, numaux, extp);
#endif
memset((PTR)ext, 0, AUXESZ);
memset ((PTR)ext, 0, AUXESZ);
switch (class)
{
case C_FILE:
@ -681,29 +692,29 @@ coff_swap_aouthdr_in (abfd, aouthdr_ext1, aouthdr_int1)
#else
aouthdr_int->o_toc = H_GET_32 (abfd, aouthdr_ext->o_toc);
#endif
aouthdr_int->o_snentry = H_GET_16 (abfd, aouthdr_ext->o_snentry);
aouthdr_int->o_sntext = H_GET_16 (abfd, aouthdr_ext->o_sntext);
aouthdr_int->o_sndata = H_GET_16 (abfd, aouthdr_ext->o_sndata);
aouthdr_int->o_sntoc = H_GET_16 (abfd, aouthdr_ext->o_sntoc);
aouthdr_int->o_snentry = H_GET_16 (abfd, aouthdr_ext->o_snentry);
aouthdr_int->o_sntext = H_GET_16 (abfd, aouthdr_ext->o_sntext);
aouthdr_int->o_sndata = H_GET_16 (abfd, aouthdr_ext->o_sndata);
aouthdr_int->o_sntoc = H_GET_16 (abfd, aouthdr_ext->o_sntoc);
aouthdr_int->o_snloader = H_GET_16 (abfd, aouthdr_ext->o_snloader);
aouthdr_int->o_snbss = H_GET_16 (abfd, aouthdr_ext->o_snbss);
aouthdr_int->o_snbss = H_GET_16 (abfd, aouthdr_ext->o_snbss);
aouthdr_int->o_algntext = H_GET_16 (abfd, aouthdr_ext->o_algntext);
aouthdr_int->o_algndata = H_GET_16 (abfd, aouthdr_ext->o_algndata);
aouthdr_int->o_modtype = H_GET_16 (abfd, aouthdr_ext->o_modtype);
aouthdr_int->o_cputype = H_GET_16 (abfd, aouthdr_ext->o_cputype);
aouthdr_int->o_modtype = H_GET_16 (abfd, aouthdr_ext->o_modtype);
aouthdr_int->o_cputype = H_GET_16 (abfd, aouthdr_ext->o_cputype);
#ifdef XCOFF64
aouthdr_int->o_maxstack = H_GET_64 (abfd, aouthdr_ext->o_maxstack);
aouthdr_int->o_maxdata = H_GET_64 (abfd, aouthdr_ext->o_maxdata);
aouthdr_int->o_maxdata = H_GET_64 (abfd, aouthdr_ext->o_maxdata);
#else
aouthdr_int->o_maxstack = H_GET_32 (abfd, aouthdr_ext->o_maxstack);
aouthdr_int->o_maxdata = H_GET_32 (abfd, aouthdr_ext->o_maxdata);
aouthdr_int->o_maxdata = H_GET_32 (abfd, aouthdr_ext->o_maxdata);
#endif
#endif
#ifdef MIPSECOFF
aouthdr_int->bss_start = H_GET_32 (abfd, aouthdr_ext->bss_start);
aouthdr_int->gp_value = H_GET_32 (abfd, aouthdr_ext->gp_value);
aouthdr_int->gprmask = H_GET_32 (abfd, aouthdr_ext->gprmask);
aouthdr_int->bss_start = H_GET_32 (abfd, aouthdr_ext->bss_start);
aouthdr_int->gp_value = H_GET_32 (abfd, aouthdr_ext->gp_value);
aouthdr_int->gprmask = H_GET_32 (abfd, aouthdr_ext->gprmask);
aouthdr_int->cprmask[0] = H_GET_32 (abfd, aouthdr_ext->cprmask[0]);
aouthdr_int->cprmask[1] = H_GET_32 (abfd, aouthdr_ext->cprmask[1]);
aouthdr_int->cprmask[2] = H_GET_32 (abfd, aouthdr_ext->cprmask[2]);
@ -712,9 +723,9 @@ coff_swap_aouthdr_in (abfd, aouthdr_ext1, aouthdr_int1)
#ifdef ALPHAECOFF
aouthdr_int->bss_start = H_GET_64 (abfd, aouthdr_ext->bss_start);
aouthdr_int->gp_value = H_GET_64 (abfd, aouthdr_ext->gp_value);
aouthdr_int->gprmask = H_GET_32 (abfd, aouthdr_ext->gprmask);
aouthdr_int->fprmask = H_GET_32 (abfd, aouthdr_ext->fprmask);
aouthdr_int->gp_value = H_GET_64 (abfd, aouthdr_ext->gp_value);
aouthdr_int->gprmask = H_GET_32 (abfd, aouthdr_ext->gprmask);
aouthdr_int->fprmask = H_GET_32 (abfd, aouthdr_ext->fprmask);
#endif
}
@ -807,7 +818,8 @@ coff_swap_scnhdr_in (abfd, ext, in)
#ifdef COFF_ADJUST_SCNHDR_IN_PRE
COFF_ADJUST_SCNHDR_IN_PRE (abfd, ext, in);
#endif
memcpy(scnhdr_int->s_name, scnhdr_ext->s_name, sizeof (scnhdr_int->s_name));
memcpy (scnhdr_int->s_name, scnhdr_ext->s_name, sizeof (scnhdr_int->s_name));
scnhdr_int->s_vaddr = GET_SCNHDR_VADDR (abfd, scnhdr_ext->s_vaddr);
scnhdr_int->s_paddr = GET_SCNHDR_PADDR (abfd, scnhdr_ext->s_paddr);
scnhdr_int->s_size = GET_SCNHDR_SIZE (abfd, scnhdr_ext->s_size);
@ -866,6 +878,7 @@ coff_swap_scnhdr_out (abfd, in, out)
buf, scnhdr_int->s_nlnno);
PUT_SCNHDR_NLNNO (abfd, 0xffff, scnhdr_ext->s_nlnno);
}
if (scnhdr_int->s_nreloc <= MAX_SCNHDR_NRELOC)
PUT_SCNHDR_NRELOC (abfd, scnhdr_int->s_nreloc, scnhdr_ext->s_nreloc);
else

7
bfd/config.bfd
View File

@ -34,6 +34,7 @@ case "${targ_cpu}" in
alpha*) targ_archs=bfd_alpha_arch ;;
arm*) targ_archs=bfd_arm_arch ;;
c30*) targ_archs=bfd_tic30_arch ;;
c4x*) targ_archs=bfd_tic4x_arch ;;
c54x*) targ_archs=bfd_tic54x_arch ;;
dlx*) targ_archs=bfd_dlx_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
@ -256,6 +257,12 @@ case "${targ}" in
targ_defvec=tic30_coff_vec
;;
c4x-*-*coff* | tic4x-*-*coff*)
targ_defvec=tic4x_coff1_vec
targ_selvecs="tic4x_coff1_beh_vec tic4x_coff2_vec tic4x_coff2_beh_vec tic4x_coff0_vec tic4x_coff0_beh_vec"
targ_underscore=yes
;;
c54x*-*-*coff* | tic54x-*-*coff*)
targ_defvec=tic54x_coff1_vec
targ_selvecs="tic54x_coff1_beh_vec tic54x_coff2_vec tic54x_coff2_beh_vec tic54x_coff0_vec tic54x_coff0_beh_vec"

34
bfd/configure vendored
View File

@ -6240,6 +6240,12 @@ do
sunos_big_vec) tb="$tb sunos.lo aout32.lo" ;;
tic30_aout_vec) tb="$tb aout-tic30.lo" ;;
tic30_coff_vec) tb="$tb coff-tic30.lo" ;;
tic4x_coff0_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff0_beh_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff1_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff1_beh_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff2_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff2_beh_vec) tb="$tb coff-tic4x.lo" ;;
tic54x_coff0_beh_vec) tb="$tb coff-tic54x.lo" ;;
tic54x_coff0_vec) tb="$tb coff-tic54x.lo" ;;
tic54x_coff1_beh_vec) tb="$tb coff-tic54x.lo" ;;
@ -6332,10 +6338,10 @@ case ${host64}-${target64}-${want64} in
if test -n "$GCC" ; then
bad_64bit_gcc=no;
echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6
echo "configure:6336: checking for gcc version with buggy 64-bit support" >&5
echo "configure:6342: checking for gcc version with buggy 64-bit support" >&5
# Add more tests for gcc versions with non-working 64-bit support here.
cat > conftest.$ac_ext <<EOF
#line 6339 "configure"
#line 6345 "configure"
#include "confdefs.h"
:__GNUC__:__GNUC_MINOR__:__i386__:
EOF
@ -6380,17 +6386,17 @@ for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
echo "configure:6384: checking for $ac_hdr" >&5
echo "configure:6390: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6389 "configure"
#line 6395 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
{ (eval echo configure:6394: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
{ (eval echo configure:6400: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@ -6419,12 +6425,12 @@ done
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
echo "configure:6423: checking for $ac_func" >&5
echo "configure:6429: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6428 "configure"
#line 6434 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -6447,7 +6453,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:6451: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
if { (eval echo configure:6457: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@ -6472,7 +6478,7 @@ fi
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
echo "configure:6476: checking for working mmap" >&5
echo "configure:6482: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@ -6480,7 +6486,7 @@ else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
#line 6484 "configure"
#line 6490 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
@ -6633,7 +6639,7 @@ main()
}
EOF
if { (eval echo configure:6637: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
if { (eval echo configure:6643: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
@ -6658,12 +6664,12 @@ fi
for ac_func in madvise mprotect
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
echo "configure:6662: checking for $ac_func" >&5
echo "configure:6668: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6667 "configure"
#line 6673 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -6686,7 +6692,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:6690: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
if { (eval echo configure:6696: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else

6
bfd/configure.in
View File

@ -741,6 +741,12 @@ do
sunos_big_vec) tb="$tb sunos.lo aout32.lo" ;;
tic30_aout_vec) tb="$tb aout-tic30.lo" ;;
tic30_coff_vec) tb="$tb coff-tic30.lo" ;;
tic4x_coff0_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff0_beh_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff1_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff1_beh_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff2_vec) tb="$tb coff-tic4x.lo" ;;
tic4x_coff2_beh_vec) tb="$tb coff-tic4x.lo" ;;
tic54x_coff0_beh_vec) tb="$tb coff-tic54x.lo" ;;
tic54x_coff0_vec) tb="$tb coff-tic54x.lo" ;;
tic54x_coff1_beh_vec) tb="$tb coff-tic54x.lo" ;;

81
bfd/cpu-tic4x.c Normal file
View File

@ -0,0 +1,81 @@
/* bfd back-end for TMS320C[34]x support
Copyright (C) 1996, 1997, 2002 Free Software Foundation, Inc.
Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
static boolean
c4x_scan (info, string)
const struct bfd_arch_info *info;
const char *string;
{
/* Allow strings of form [ti][Cc][34][0-9], let's not be too picky
about strange numbered machines in C3x or C4x series. */
if (string[0] == 't' && string[1] == 'i')
string += 2;
if (*string == 'C' || *string == 'c')
string++;
if (string[1] < '0' && string[1] > '9')
return false;
if (*string == '3')
return (info->mach == bfd_mach_c3x);
else if (*string == '4')
return info->mach == bfd_mach_c4x;
return false;
}
const bfd_arch_info_type bfd_tic3x_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
32, /* 32 bits in a byte. */
bfd_arch_tic4x,
bfd_mach_c3x, /* Machine number. */
"c3x", /* Architecture name. */
"tms320c3x", /* Printable name. */
0, /* Alignment power. */
false, /* Not the default architecture. */
bfd_default_compatible,
c4x_scan,
0
};
const bfd_arch_info_type bfd_tic4x_arch =
{
32, /* 32 bits in a word. */
32, /* 32 bits in an address. */
32, /* 32 bits in a byte. */
bfd_arch_tic4x,
bfd_mach_c4x, /* Machine number. */
"c4x", /* Architecture name. */
"tms320c4x", /* Printable name. */
0, /* Alignment power. */
true, /* The default architecture. */
bfd_default_compatible,
c4x_scan,
&bfd_tic3x_arch,
};

6
bfd/targets.c
View File

@ -683,6 +683,12 @@ extern const bfd_target sparcnetbsd_vec;
extern const bfd_target sunos_big_vec;
extern const bfd_target tic30_aout_vec;
extern const bfd_target tic30_coff_vec;
extern const bfd_target tic4x_coff0_beh_vec;
extern const bfd_target tic4x_coff0_vec;
extern const bfd_target tic4x_coff1_beh_vec;
extern const bfd_target tic4x_coff1_vec;
extern const bfd_target tic4x_coff2_beh_vec;
extern const bfd_target tic4x_coff2_vec;
extern const bfd_target tic54x_coff0_beh_vec;
extern const bfd_target tic54x_coff0_vec;
extern const bfd_target tic54x_coff1_beh_vec;

130
bfd/ticoff.h Normal file
View File

@ -0,0 +1,130 @@
/* Copyright 2002 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#undef F_LSYMS
#define F_LSYMS F_LSYMS_TICOFF
static boolean
ticoff0_bad_format_hook (abfd, filehdr)
bfd *abfd;
PTR filehdr;
{
struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr;
if (COFF0_BADMAG (*internal_f))
return false;
return true;
}
static boolean
ticoff1_bad_format_hook (abfd, filehdr)
bfd *abfd ATTRIBUTE_UNUSED;
PTR filehdr;
{
struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr;
if (COFF1_BADMAG (*internal_f))
return false;
return true;
}
/* Replace the stock _bfd_coff_is_local_label_name
to recognize TI COFF local labels. */
static boolean
ticoff_bfd_is_local_label_name (abfd, name)
bfd *abfd ATTRIBUTE_UNUSED;
const char *name;
{
if (TICOFF_LOCAL_LABEL_P(name))
return true;
return false;
}
#define coff_bfd_is_local_label_name ticoff_bfd_is_local_label_name
/* Customize coffcode.h; the default coff_ functions are set up to use COFF2;
coff_bad_format_hook uses BADMAG, so set that for COFF2. The COFF1
and COFF0 vectors use custom _bad_format_hook procs instead of setting
BADMAG. */
#define BADMAG(x) COFF2_BADMAG(x)
#include "coffcode.h"
/* COFF0 differs in file/section header size and relocation entry size. */
static const bfd_coff_backend_data ticoff0_swap_table =
{
coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in,
coff_SWAP_aux_out, coff_SWAP_sym_out,
coff_SWAP_lineno_out, coff_SWAP_reloc_out,
coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out,
coff_SWAP_scnhdr_out,
FILHSZ_V0, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ_V0, LINESZ, FILNMLEN,
#ifdef COFF_LONG_FILENAMES
true,
#else
false,
#endif
#ifdef COFF_LONG_SECTION_NAMES
true,
#else
false,
#endif
COFF_DEFAULT_SECTION_ALIGNMENT_POWER,
coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in,
coff_SWAP_reloc_in, ticoff0_bad_format_hook, coff_set_arch_mach_hook,
coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook,
coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook,
coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate,
coff_classify_symbol, coff_compute_section_file_positions,
coff_start_final_link, coff_relocate_section, coff_rtype_to_howto,
coff_adjust_symndx, coff_link_add_one_symbol,
coff_link_output_has_begun, coff_final_link_postscript
};
/* COFF1 differs in section header size. */
static const bfd_coff_backend_data ticoff1_swap_table =
{
coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in,
coff_SWAP_aux_out, coff_SWAP_sym_out,
coff_SWAP_lineno_out, coff_SWAP_reloc_out,
coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out,
coff_SWAP_scnhdr_out,
FILHSZ, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ, LINESZ, FILNMLEN,
#ifdef COFF_LONG_FILENAMES
true,
#else
false,
#endif
#ifdef COFF_LONG_SECTION_NAMES
true,
#else
false,
#endif
COFF_DEFAULT_SECTION_ALIGNMENT_POWER,
coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in,
coff_SWAP_reloc_in, ticoff1_bad_format_hook, coff_set_arch_mach_hook,
coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook,
coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook,
coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate,
coff_classify_symbol, coff_compute_section_file_positions,
coff_start_final_link, coff_relocate_section, coff_rtype_to_howto,
coff_adjust_symndx, coff_link_add_one_symbol,
coff_link_output_has_begun, coff_final_link_postscript
};

5
binutils/ChangeLog
View File

@ -1,3 +1,8 @@
2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* objdump.c (dump_headers): Add printing of HAS_LOAD_PAGE flag.
(dump_bfd_header): Likewise.
2002-08-27 Alan Modra <amodra@bigpond.net.au>
* nm.c: Revert last change.

20
binutils/objdump.c
View File

@ -74,7 +74,8 @@ static bfd_vma adjust_section_vma = 0; /* --adjust-vma */
static int file_start_context = 0; /* --file-start-context */
/* Extra info to pass to the disassembler address printing function. */
struct objdump_disasm_info {
struct objdump_disasm_info
{
bfd *abfd;
asection *sec;
boolean require_sec;
@ -369,6 +370,8 @@ dump_headers (abfd)
if (wide_output)
printf (_(" Flags"));
if (abfd->flags & HAS_LOAD_PAGE)
printf (_(" Pg"));
printf ("\n");
bfd_map_over_sections (abfd, dump_section_header, (PTR) NULL);
@ -2002,6 +2005,7 @@ dump_bfd_header (abfd)
PF (WP_TEXT, "WP_TEXT");
PF (D_PAGED, "D_PAGED");
PF (BFD_IS_RELAXABLE, "BFD_IS_RELAXABLE");
PF (HAS_LOAD_PAGE, "HAS_LOAD_PAGE");
printf (_("\nstart address 0x"));
bfd_printf_vma (abfd, abfd->start_address);
printf ("\n");
@ -2034,8 +2038,6 @@ dump_bfd (abfd)
}
}
printf (_("\n%s: file format %s\n"), bfd_get_filename (abfd),
abfd->xvec->name);
if (dump_ar_hdrs)
print_arelt_descr (stdout, abfd, true);
if (dump_file_header)
@ -2045,14 +2047,12 @@ dump_bfd (abfd)
putchar ('\n');
if (dump_section_headers)
dump_headers (abfd);
if (dump_symtab || dump_reloc_info || disassemble || dump_debugging)
{
syms = slurp_symtab (abfd);
}
syms = slurp_symtab (abfd);
if (dump_dynamic_symtab || dump_dynamic_reloc_info)
{
dynsyms = slurp_dynamic_symtab (abfd);
}
dynsyms = slurp_dynamic_symtab (abfd);
if (dump_symtab)
dump_symbols (abfd, false);
if (dump_dynamic_symtab)
@ -2082,11 +2082,13 @@ dump_bfd (abfd)
}
}
}
if (syms)
{
free (syms);
syms = NULL;
}
if (dynsyms)
{
free (dynsyms);

2
binutils/testsuite/binutils-all/objdump.exp
View File

@ -40,7 +40,7 @@ lappend cpus_expected d10v d30v fr30 fr500 h8 hppa i386 i860 i960 ip2022
lappend cpus_expected m32r m68hc11 m68hc12 m68k m88k MCore
lappend cpus_expected mips mn10200 mn10300 ns32k pj powerpc pyramid
lappend cpus_expected romp rs6000 s390 sh sparc
lappend cpus_expected tahoe tic54x tic80 tms320c30 tms320c54x v850
lappend cpus_expected tahoe tic54x tic80 tms320c30 tms320c4x tms320c54x v850
lappend cpus_expected vax we32k x86-64 xscale z8k z8001 z8002
# Make sure the target CPU shows up in the list.

14
gas/ChangeLog
View File

@ -1,3 +1,17 @@
2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com>
* configure.in: Add tic4x-coff* and c4x-coff*-coff-coff targets.
* configure: Regenerate.
* NEWS: Mention new port.
2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* config/obj-coff.c: Add sdef definition.
* config/obj-coff.h: Add tic4x include file and set
target format.
* config/tc-tic4x.c: New file.
* config/tc-tic4x.h: New file.
2002-08-28 Alan Modra <amodra@bigpond.net.au>
* write.c (BFD_FAST_SECTION_FILL): Remove unused macro.

3
gas/NEWS
View File

@ -1,5 +1,8 @@
-*- text -*-
* Support for Texas Instruments TMS320C4x series of microcontrollers
contributed by Michael Hayes and Svein E. Seldal.
* Support for the Ubicom IP2xxx microcontroller added.
Changes in 2.13:

4
gas/config/obj-coff.c
View File

@ -4623,8 +4623,8 @@ const pseudo_typeS coff_pseudo_table[] =
#endif
{"version", s_ignore, 0},
{"ABORT", s_abort, 0},
#ifdef TC_M88K
/* The m88k uses sdef instead of def. */
#if defined( TC_M88K ) || defined ( TC_TIC4X )
/* The m88k and tic4x uses sdef instead of def. */
{"sdef", obj_coff_def, 0},
#endif
{NULL, NULL, 0} /* end sentinel */

5
gas/config/obj-coff.h
View File

@ -157,6 +157,11 @@
#define TARGET_FORMAT "coff-tic30"
#endif
#ifdef TC_TIC4X
#include "coff/tic4x.h"
#define TARGET_FORMAT "coff2-c4x"
#endif
#ifdef TC_TIC54X
#include "coff/tic54x.h"
#define TARGET_FORMAT "coff1-c54x"

2627
gas/config/tc-tic4x.c Normal file
View File

File diff suppressed because it is too large Load Diff

98
gas/config/tc-tic4x.h Normal file
View File

@ -0,0 +1,98 @@
/* tc-tic4x.h -- Assemble for the Texas TMS320C[34]X.
Copyright (C) 1997, 2002 Free Software Foundation.
Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define TC_TIC4X
#define C4X
#ifndef BFD_ASSEMBLER
#error TMS320C4x requires BFD_ASSEMBLER
#endif
#define TARGET_ARCH bfd_arch_tic4x
#define WORKING_DOT_WORD
/* There are a number of different formats used for local labels. gas
expects local labels either of the form `10$:' or `n:', where n is
a single digit. When LOCAL_LABEL_DOLLARS is defined labels of the
form `10$:' are expected. When LOCAL_LABEL_FB is defined labels of
the form `n:' are expected. The latter are expected to be referred
to using `nf' for a forward reference of `nb' for a backward
reference.
The local labels expected by the TI tools are of the form `$n:',
where the colon is optional. Now the $ character is considered to
be valid symbol name character, so gas doesn't recognise our local
symbols by default. Defining LEX_DOLLAR to be 1 means that gas
won't allow labels starting with $ and thus the hook
tc_unrecognized_line() will be called from read.c. We can thus
parse lines starting with $n as having local labels.
The other problem is the forward reference of local labels. If a
symbol is undefined, symbol_make() calls the md_undefined_symbol()
hook where we create a local label if recognised. */
/* Don't stick labels starting with 'L' into symbol table of COFF file. */
#define LOCAL_LABEL(name) ((name)[0] == '$' || (name)[0] == 'L')
#define TARGET_BYTES_BIG_ENDIAN 0
#define OCTETS_PER_BYTE_POWER 2
#define TARGET_ARCH bfd_arch_tic4x
#define BFD_ARCH TARGET_ARCH
#define TC_COUNT_RELOC(x) (x->fx_addsy)
#define TC_CONS_RELOC RELOC_32
#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype (fixP)
#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep (frag)
#define NEED_FX_R_TYPE
#define reloc_type int
#define NO_RELOC 0
/* Labels are not required to have a colon for a suffix. */
#define LABELS_WITHOUT_COLONS 1
/* Use $ as the section program counter (SPC). */
#define DOLLAR_DOT
/* Accept numbers with a suffix, e.g. 0ffffh, 1010b. */
#define NUMBERS_WITH_SUFFIX 1
extern int c4x_unrecognized_line PARAMS ((int));
#define tc_unrecognized_line(c) c4x_unrecognized_line (c)
#define md_number_to_chars number_to_chars_littleendian
extern int c4x_do_align PARAMS ((int, const char *, int, int));
#define md_do_align(n,fill,len,max,l) if (c4x_do_align (n,fill,len,max)) goto l
/* Start of line hook to remove parallel instruction operator || */
extern void c4x_start_line PARAMS ((void));
#define md_start_line_hook() c4x_start_line()
extern void c4x_cleanup PARAMS ((void));
#define md_cleanup() c4x_cleanup()
extern void c4x_end PARAMS ((void));
#define md_end() c4x_end()

339
gas/configure vendored
View File

File diff suppressed because it is too large Load Diff

1
gas/configure.in
View File

@ -461,6 +461,7 @@ changequote([,])dnl
tic30-*-*aout*) fmt=aout bfd_gas=yes ;;
tic30-*-*coff*) fmt=coff bfd_gas=yes ;;
tic4x-*-* | c4x-*-*) fmt=coff bfd_gas=yes ;;
tic54x-*-* | c54x*-*-*) fmt=coff bfd_gas=yes need_libm=yes;;
tic80-*-*) fmt=coff ;;

8
include/ChangeLog
View File

@ -1,3 +1,11 @@
2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* coff/internal.h: Add new relocation types.
* coff/ti.h: Add file-header flags for tic4x code.
* dis-asm.h: Add standard disassembler for tic4x.
* opcode/tic4x.h: New file.
* coff/tic4x.h: New file
2002-08-07 H.J. Lu <hjl@gnu.org>
* bfdlink.h (bfd_link_info): Add allow_undefined_version.

4
include/coff/internal.h
View File

@ -600,6 +600,7 @@ struct internal_reloc
};
#define R_DIR16 1
#define R_REL24 5
#define R_DIR32 6
#define R_IMAGEBASE 7
#define R_RELBYTE 15
@ -608,12 +609,15 @@ struct internal_reloc
#define R_PCRBYTE 18
#define R_PCRWORD 19
#define R_PCRLONG 20
#define R_PCR24 21
#define R_IPRSHORT 24
#define R_IPRLONG 26
#define R_GETSEG 29
#define R_GETPA 30
#define R_TAGWORD 31
#define R_JUMPTARG 32 /* strange 29k 00xx00xx reloc */
#define R_PARTLS16 32
#define R_PARTMS8 33
#define R_PCR16L 128
#define R_PCR26L 129

1
include/coff/ti.h
View File

@ -118,6 +118,7 @@ struct external_filehdr
#define F_RELFLG (0x0001)
#define F_EXEC (0x0002)
#define F_LNNO (0x0004)
#define F_VERS (0x0010) /* TMS320C4x code */
/* F_LSYMS needs to be redefined in your source file */
#define F_LSYMS_TICOFF (0x0010) /* normal COFF is 0x8 */

46
include/coff/tic4x.h Normal file
View File

@ -0,0 +1,46 @@
/* TI COFF information for Texas Instruments TMS320C4X/C3X.
This file customizes the settings in coff/ti.h.
Copyright 2002 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef COFF_TIC4X_H
#define COFF_TIC4X_H
#define TIC4X_TARGET_ID 0x0093
/* Octets per byte, as a power of two. */
#define TI_TARGET_ID TIC4X_TARGET_ID
#define OCTETS_PER_BYTE_POWER 2
/* Add to howto to get absolute/sect-relative version. */
#define HOWTO_BANK 6
#define TICOFF_TARGET_ARCH bfd_arch_tic4x
/* We use COFF2. */
#define TICOFF_DEFAULT_MAGIC TICOFF2MAGIC
#define TICOFF_TARGET_MACHINE_GET (FLAGS) \
(((FLAGS) & F_VERS) ? bfd_mach_c4x : bfd_mach_c3x)
#define TICOFF_TARGET_MACHINE_SET (FLAGSP, MACHINE) \
do \
{ \
if ((MACHINE) == bfd_mach_c4x) \
*(FLAGSP) = F_VERS; \
} \
while (0)
#include "coff/ti.h"
#endif /* COFF_TIC4X_H */

1
include/dis-asm.h
View File

@ -229,6 +229,7 @@ extern int print_insn_rs6000 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_s390 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_sh PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_tic4x PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_tic54x PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_tic80 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*));

1338
include/opcode/tic4x.h Normal file
View File

File diff suppressed because it is too large Load Diff

15
ld/ChangeLog
View File

@ -1,3 +1,18 @@
2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com>
* Makefile.am: Add etic4xcoff.o in ALL_EMULATIONS list and
added makefile targets for this file.
* Makefile.in: Regenerate.
* configure.tgt: Added tic4x-coff and c4x-coff emulations.
* NEWS: Mention new port.
2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* emulparams/tic3xcoff.sh: New file.
* emulparams/tic4xcoff.sh: New file.
* scripttempl/tic3xcoff.sc: New file.
* scripttempl/tic4xcoff.sc: New file.
2002-08-28 Alan Modra <amodra@bigpond.net.au>
* emultempl/aix.em (gld${EMULATION_NAME}_parse_args): Replace strtoll,

4
ld/Makefile.am
View File

@ -282,6 +282,7 @@ ALL_EMULATIONS = \
esun4.o \
etic30aout.o \
etic30coff.o \
etic4xcoff.o \
etic54xcoff.o \
etic80coff.o \
evanilla.o \
@ -1078,6 +1079,9 @@ etic30aout.c: $(srcdir)/emulparams/tic30aout.sh \
etic30coff.c: $(srcdir)/emulparams/tic30coff.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/tic30coff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic30coff "$(tdir_tic30coff)"
etic4xcoff.c: $(srcdir)/emulparams/tic4xcoff.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic4xcoff "$(tdir_tic4xcoff)"
etic54xcoff.c: $(srcdir)/emulparams/tic54xcoff.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic54xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic54xcoff "$(tdir_tic54xcoff)"

4
ld/Makefile.in
View File

@ -393,6 +393,7 @@ ALL_EMULATIONS = \
esun4.o \
etic30aout.o \
etic30coff.o \
etic4xcoff.o \
etic54xcoff.o \
etic80coff.o \
evanilla.o \
@ -1801,6 +1802,9 @@ etic30aout.c: $(srcdir)/emulparams/tic30aout.sh \
etic30coff.c: $(srcdir)/emulparams/tic30coff.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/tic30coff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic30coff "$(tdir_tic30coff)"
etic4xcoff.c: $(srcdir)/emulparams/tic4xcoff.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic4xcoff "$(tdir_tic4xcoff)"
etic54xcoff.c: $(srcdir)/emulparams/tic54xcoff.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic54xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic54xcoff "$(tdir_tic54xcoff)"

3
ld/NEWS
View File

@ -1,5 +1,8 @@
-*- text -*-
* Support for Texas Instruments TMS320C4x series of microcontrollers
contributed by Michael Hayes and Svein E. Seldal.
* Added --with-lib-path configure switch to specify default value for
LIB_PATH.

1
ld/configure.tgt
View File

@ -498,6 +498,7 @@ rs6000-*-aix5*) targ_emul=aix5rs6 ;;
rs6000-*-aix*) targ_emul=aixrs6 ;;
tic30-*-*aout*) targ_emul=tic30aout ;;
tic30-*-*coff*) targ_emul=tic30coff ;;
tic4x-*-* | c4x-*-*) targ_emul=tic4xcoff ;;
tic54x-*-* | c54x*-*-*) targ_emul=tic54xcoff ;;
tic80-*-*) targ_emul=tic80coff ;;
v850-*-*) targ_emul=v850 ;;

9
ld/emulparams/tic3xcoff.sh Normal file
View File

@ -0,0 +1,9 @@
SCRIPT_NAME=tic4xcoff
OUTPUT_FORMAT="coff2-c4x"
OUTPUT_ARCH="c3x"
ARCH=c3x
#ENTRY=_c_int00
TEXT_START_ADDR=0x0080
TARGET_PAGE_SIZE=0x1000
TEMPLATE_NAME=ticoff
OUTPUT_FORMAT_TEMPLATE=tic4x

9
ld/emulparams/tic4xcoff.sh Normal file
View File

@ -0,0 +1,9 @@
SCRIPT_NAME=tic4xcoff
OUTPUT_FORMAT="coff2-c4x"
OUTPUT_ARCH="c4x"
ARCH=c4x
#ENTRY=_c_int00
TEXT_START_ADDR=0x0080
TARGET_PAGE_SIZE=0x1000
TEMPLATE_NAME=ticoff
OUTPUT_FORMAT_TEMPLATE=tic4x

92
ld/scripttempl/tic3xcoff.sc Normal file
View File

@ -0,0 +1,92 @@
# 32 interrupt vectors + 32 trap vectors each of 4 bytes
# The .bss and .data sections need to be contiguous for direct addressing
# The data page pointer gets loaded with the start of .bss
# TI C compiler uses .cinit to initialise variables in .bss
test -z "$ENTRY" && ENTRY=_start
# These are substituted in as variables in order to get '}' in a shell
# conditional expansion.
INIT='.init : { *(.init) }'
FINI='.fini : { *(.fini) }'
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH("${OUTPUT_ARCH}")
${LIB_SEARCH_DIRS}
ENTRY(${ENTRY})
${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;}
${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;}
SECTIONS
{
.comms ${RELOCATING+ 64} : {
*(.comms)
}
.bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : {
${RELOCATING+ .bss = .;}
*(.bss)
*(COMMON)
${RELOCATING+ end = .;}
${RELOCATING+ _end = end;}
}
.data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
{
${RELOCATING+ .data = .;}
*(.data)
${RELOCATING+ edata = .;}
}
.const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
{
*(.const)
}
.cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} :
{
${RELOCATING+ cinit = .;}
*(.cinit)
LONG(0);
}
.text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : {
${RELOCATING+ .text = .;}
${RELOCATING+ *(.init)}
*(.text)
${CONSTRUCTING+ ___CTOR_LIST__ = .;}
${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)}
${CONSTRUCTING+ *(.ctors)}
${CONSTRUCTING+ LONG(0);}
${CONSTRUCTING+ ___CTOR_END__ = .;}
${CONSTRUCTING+ ___DTOR_LIST__ = .;}
${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)}
${CONSTRUCTING+ *(.dtors)}
${CONSTRUCTING+ LONG(0)}
${CONSTRUCTING+ ___DTOR_END__ = .;}
${RELOCATING+ *(.fini)}
${RELOCATING+ etext = .;}
${RELOCATING+ _etext = etext;}
}
.stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} :
{
*(.stack)
${RELOCATING+ . = . + __STACK_SIZE};
}
.sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} :
{
*(.sysmem)
}
.heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} :
{
${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)};
}
${RELOCATING- ${INIT}}
${RELOCATING- ${FINI}}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
/* The TI tools sets cinit to -1 if the ram model is used. */
${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;}
}
EOF

92
ld/scripttempl/tic4xcoff.sc Normal file
View File

@ -0,0 +1,92 @@
# 32 interrupt vectors + 32 trap vectors each of 4 bytes
# The .bss and .data sections need to be contiguous for direct addressing
# The data page pointer gets loaded with the start of .bss
# TI C compiler uses .cinit to initialise variables in .bss
test -z "$ENTRY" && ENTRY=_start
# These are substituted in as variables in order to get '}' in a shell
# conditional expansion.
INIT='.init : { *(.init) }'
FINI='.fini : { *(.fini) }'
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH("${OUTPUT_ARCH}")
${LIB_SEARCH_DIRS}
ENTRY(${ENTRY})
${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;}
${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;}
SECTIONS
{
.comms ${RELOCATING+ 64} : {
*(.comms)
}
.bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : {
${RELOCATING+ .bss = .;}
*(.bss)
*(COMMON)
${RELOCATING+ end = .;}
${RELOCATING+ _end = end;}
}
.data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
{
${RELOCATING+ .data = .;}
*(.data)
${RELOCATING+ edata = .;}
}
.const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
{
*(.const)
}
.cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} :
{
${RELOCATING+ cinit = .;}
*(.cinit)
LONG(0);
}
.text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : {
${RELOCATING+ .text = .;}
${RELOCATING+ *(.init)}
*(.text)
${CONSTRUCTING+ ___CTOR_LIST__ = .;}
${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)}
${CONSTRUCTING+ *(.ctors)}
${CONSTRUCTING+ LONG(0);}
${CONSTRUCTING+ ___CTOR_END__ = .;}
${CONSTRUCTING+ ___DTOR_LIST__ = .;}
${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)}
${CONSTRUCTING+ *(.dtors)}
${CONSTRUCTING+ LONG(0)}
${CONSTRUCTING+ ___DTOR_END__ = .;}
${RELOCATING+ *(.fini)}
${RELOCATING+ etext = .;}
${RELOCATING+ _etext = etext;}
}
.stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} :
{
*(.stack)
${RELOCATING+ . = . + __STACK_SIZE};
}
.sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} :
{
*(.sysmem)
}
.heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} :
{
${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)};
}
${RELOCATING- ${INIT}}
${RELOCATING- ${FINI}}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
/* The TI tools sets cinit to -1 if the ram model is used. */
${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;}
}
EOF

13
opcodes/ChangeLog
View File

@ -1,3 +1,16 @@
2002-08-28 Svein E. Seldal <Svein.Seldal@solidas.com>
* configure.in: Added bfd_tic4x_arch.
* configure: Regenerate.
* Makefile.am: Added tic4x-dis.o target.
* Makefile.in: Regenerate.
2002-08-28 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* disassemble.c: Added tic4x target and c4x
disassembler routine.
* tic4x-dis.c: New file.
2002-08-16 Christian Groessler <chris@groessler.org>
* z8k-dis.c (unparse_instr): case CLASS_BA: Designate hex

4
opcodes/Makefile.am
View File

@ -140,6 +140,7 @@ CFILES = \
sparc-dis.c \
sparc-opc.c \
tic30-dis.c \
tic4x-dis.c \
tic54x-dis.c \
tic54x-opc.c \
tic80-dis.c \
@ -243,6 +244,7 @@ ALL_MACHINES = \
sparc-dis.lo \
sparc-opc.lo \
tic30-dis.lo \
tic4x-dis.lo \
tic54x-dis.lo \
tic54x-opc.lo \
tic80-dis.lo \
@ -721,6 +723,8 @@ sparc-opc.lo: sparc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/sparc.h
tic30-dis.lo: tic30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic30.h
tic4x-dis.lo: tic4x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/tic4x.h
tic54x-dis.lo: tic54x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h \
$(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h

6
opcodes/Makefile.in
View File

@ -251,6 +251,7 @@ CFILES = \
sparc-dis.c \
sparc-opc.c \
tic30-dis.c \
tic4x-dis.c \
tic54x-dis.c \
tic54x-opc.c \
tic80-dis.c \
@ -355,6 +356,7 @@ ALL_MACHINES = \
sparc-dis.lo \
sparc-opc.lo \
tic30-dis.lo \
tic4x-dis.lo \
tic54x-dis.lo \
tic54x-opc.lo \
tic80-dis.lo \
@ -447,7 +449,7 @@ acinclude.m4 aclocal.m4 config.in configure configure.in
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
TAR = tar
TAR = gtar
GZIP_ENV = --best
SOURCES = libopcodes.a.c $(libopcodes_la_SOURCES)
OBJECTS = libopcodes.a.$(OBJEXT) $(libopcodes_la_OBJECTS)
@ -1217,6 +1219,8 @@ sparc-opc.lo: sparc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/opcode/sparc.h
tic30-dis.lo: tic30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic30.h
tic4x-dis.lo: tic4x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/tic4x.h
tic54x-dis.lo: tic54x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
$(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h \
$(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h

1
opcodes/configure vendored
View File

@ -4654,6 +4654,7 @@ if test x${all_targets} = xfalse ; then
bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;;
bfd_tahoe_arch) ;;
bfd_tic30_arch) ta="$ta tic30-dis.lo" ;;
bfd_tic4x_arch) ta="$ta tic4x-dis.lo" ;;
bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;;
bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;;
bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;;

1
opcodes/configure.in
View File

@ -229,6 +229,7 @@ if test x${all_targets} = xfalse ; then
bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;;
bfd_tahoe_arch) ;;
bfd_tic30_arch) ta="$ta tic30-dis.lo" ;;
bfd_tic4x_arch) ta="$ta tic4x-dis.lo" ;;
bfd_tic54x_arch) ta="$ta tic54x-dis.lo tic54x-opc.lo" ;;
bfd_tic80_arch) ta="$ta tic80-dis.lo tic80-opc.lo" ;;
bfd_v850_arch) ta="$ta v850-opc.lo v850-dis.lo" ;;

6
opcodes/disassemble.c
View File

@ -60,6 +60,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define ARCH_sh
#define ARCH_sparc
#define ARCH_tic30
#define ARCH_tic4x
#define ARCH_tic54x
#define ARCH_tic80
#define ARCH_v850
@ -305,6 +306,11 @@ disassembler (abfd)
disassemble = print_insn_tic30;
break;
#endif
#ifdef ARCH_tic4x
case bfd_arch_tic4x:
disassemble = print_insn_tic4x;
break;
#endif
#ifdef ARCH_tic54x
case bfd_arch_tic54x:
disassemble = print_insn_tic54x;

677
opcodes/tic4x-dis.c Normal file
View File

@ -0,0 +1,677 @@
/* Print instructions for the Texas TMS320C[34]X, for GDB and GNU Binutils.
Copyright 2002 Free Software Foundation, Inc.
Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include <math.h>
#include "libiberty.h"
#include "dis-asm.h"
#include "opcode/tic4x.h"
#define C4X_DEBUG 0
#define C4X_HASH_SIZE 11 /* 11 and above should give unique entries. */
typedef enum
{
IMMED_SINT,
IMMED_SUINT,
IMMED_SFLOAT,
IMMED_INT,
IMMED_UINT,
IMMED_FLOAT
}
immed_t;
typedef enum
{
INDIRECT_SHORT,
INDIRECT_LONG,
INDIRECT_C4X
}
indirect_t;
static int c4x_version = 0;
static int c4x_dp = 0;
static int
c4x_pc_offset (unsigned int op)
{
/* Determine the PC offset for a C[34]x instruction.
This could be simplified using some boolean algebra
but at the expense of readability. */
switch (op >> 24)
{
case 0x60: /* br */
case 0x62: /* call (C4x) */
case 0x64: /* rptb (C4x) */
return 1;
case 0x61: /* brd */
case 0x63: /* laj */
case 0x65: /* rptbd (C4x) */
return 3;
case 0x66: /* swi */
case 0x67:
return 0;
default:
break;
}
switch ((op & 0xffe00000) >> 20)
{
case 0x6a0: /* bB */
case 0x720: /* callB */
case 0x740: /* trapB */
return 1;
case 0x6a2: /* bBd */
case 0x6a6: /* bBat */
case 0x6aa: /* bBaf */
case 0x722: /* lajB */
case 0x748: /* latB */
case 0x798: /* rptbd */
return 3;
default:
break;
}
switch ((op & 0xfe200000) >> 20)
{
case 0x6e0: /* dbB */
return 1;
case 0x6e2: /* dbBd */
return 3;
default:
break;
}
return 0;
}
static int
c4x_print_char (struct disassemble_info * info, char ch)
{
if (info != NULL)
(*info->fprintf_func) (info->stream, "%c", ch);
return 1;
}
static int
c4x_print_str (struct disassemble_info *info, char *str)
{
if (info != NULL)
(*info->fprintf_func) (info->stream, "%s", str);
return 1;
}
static int
c4x_print_register (struct disassemble_info *info,
unsigned long regno)
{
static c4x_register_t **registertable = NULL;
unsigned int i;
if (registertable == NULL)
{
registertable = (c4x_register_t **)
xmalloc (sizeof (c4x_register_t *) * REG_TABLE_SIZE);
for (i = 0; i < c3x_num_registers; i++)
registertable[c3x_registers[i].regno] = (void *)&c3x_registers[i];
if (IS_CPU_C4X (c4x_version))
{
/* Add C4x additional registers, overwriting
any C3x registers if necessary. */
for (i = 0; i < c4x_num_registers; i++)
registertable[c4x_registers[i].regno] = (void *)&c4x_registers[i];
}
}
if ((int) regno > (IS_CPU_C4X (c4x_version) ? C4X_REG_MAX : C3X_REG_MAX))
return 0;
if (info != NULL)
(*info->fprintf_func) (info->stream, "%s", registertable[regno]->name);
return 1;
}
static int
c4x_print_addr (struct disassemble_info *info,
unsigned long addr)
{
if (info != NULL)
(*info->print_address_func)(addr, info);
return 1;
}
static int
c4x_print_relative (struct disassemble_info *info,
unsigned long pc,
long offset,
unsigned long opcode)
{
return c4x_print_addr (info, pc + offset + c4x_pc_offset (opcode));
}
static int
c4x_print_direct (struct disassemble_info *info,
unsigned long arg)
{
if (info != NULL)
{
(*info->fprintf_func) (info->stream, "@");
c4x_print_addr (info, arg + (c4x_dp << 16));
}
return 1;
}
/* FIXME: make the floating point stuff not rely on host
floating point arithmetic. */
void
c4x_print_ftoa (unsigned int val,
FILE *stream,
int (*pfunc)())
{
int e;
int s;
int f;
double num = 0.0;
e = EXTRS (val, 31, 24); /* exponent */
if (e != -128)
{
s = EXTRU (val, 23, 23); /* sign bit */
f = EXTRU (val, 22, 0); /* mantissa */
if (s)
f += -2 * (1 << 23);
else
f += (1 << 23);
num = f / (double)(1 << 23);
num = ldexp (num, e);
}
(*pfunc)(stream, "%.9g", num);
}
static int
c4x_print_immed (struct disassemble_info *info,
immed_t type,
unsigned long arg)
{
int s;
int f;
int e;
double num = 0.0;
if (info == NULL)
return 1;
switch (type)
{
case IMMED_SINT:
case IMMED_INT:
(*info->fprintf_func) (info->stream, "%d", (long)arg);
break;
case IMMED_SUINT:
case IMMED_UINT:
(*info->fprintf_func) (info->stream, "%u", arg);
break;
case IMMED_SFLOAT:
e = EXTRS (arg, 15, 12);
if (e != -8)
{
s = EXTRU (arg, 11, 11);
f = EXTRU (arg, 10, 0);
if (s)
f += -2 * (1 << 11);
else
f += (1 << 11);
num = f / (double)(1 << 11);
num = ldexp (num, e);
}
(*info->fprintf_func) (info->stream, "%f", num);
break;
case IMMED_FLOAT:
e = EXTRS (arg, 31, 24);
if (e != -128)
{
s = EXTRU (arg, 23, 23);
f = EXTRU (arg, 22, 0);
if (s)
f += -2 * (1 << 23);
else
f += (1 << 23);
num = f / (double)(1 << 23);
num = ldexp (num, e);
}
(*info->fprintf_func) (info->stream, "%f", num);
break;
}
return 1;
}
static int
c4x_print_cond (struct disassemble_info *info,
unsigned int cond)
{
static c4x_cond_t **condtable = NULL;
unsigned int i;
if (condtable == NULL)
{
condtable = (c4x_cond_t **)xmalloc (sizeof (c4x_cond_t *) * 32);
for (i = 0; i < num_conds; i++)
condtable[c4x_conds[i].cond] = (void *)&c4x_conds[i];
}
if (cond > 31 || condtable[cond] == NULL)
return 0;
if (info != NULL)
(*info->fprintf_func) (info->stream, "%s", condtable[cond]->name);
return 1;
}
static int
c4x_print_indirect (struct disassemble_info *info,
indirect_t type,
unsigned long arg)
{
unsigned int aregno;
unsigned int modn;
unsigned int disp;
char *a;
aregno = 0;
modn = 0;
disp = 1;
switch(type)
{
case INDIRECT_C4X: /* *+ARn(disp) */
disp = EXTRU (arg, 7, 3);
aregno = EXTRU (arg, 2, 0) + REG_AR0;
modn = 0;
break;
case INDIRECT_SHORT:
disp = 1;
aregno = EXTRU (arg, 2, 0) + REG_AR0;
modn = EXTRU (arg, 7, 3);
break;
case INDIRECT_LONG:
disp = EXTRU (arg, 7, 0);
aregno = EXTRU (arg, 10, 8) + REG_AR0;
modn = EXTRU (arg, 15, 11);
if (modn > 7 && disp != 0)
return 0;
break;
default:
abort ();
}
if (modn > C3X_MODN_MAX)
return 0;
a = c4x_indirects[modn].name;
while (*a)
{
switch (*a)
{
case 'a':
c4x_print_register (info, aregno);
break;
case 'd':
c4x_print_immed (info, IMMED_UINT, disp);
break;
case 'y':
c4x_print_str (info, "ir0");
break;
case 'z':
c4x_print_str (info, "ir1");
break;
default:
c4x_print_char (info, *a);
break;
}
a++;
}
return 1;
}
static int
c4x_print_op (struct disassemble_info *info,
unsigned long instruction,
c4x_inst_t *p, unsigned long pc)
{
int val;
char *s;
char *parallel = NULL;
/* Print instruction name. */
s = p->name;
while (*s && parallel == NULL)
{
switch (*s)
{
case 'B':
if (! c4x_print_cond (info, EXTRU (instruction, 20, 16)))
return 0;
break;
case 'C':
if (! c4x_print_cond (info, EXTRU (instruction, 27, 23)))
return 0;
break;
case '_':
parallel = s + 1; /* Skip past `_' in name */
break;
default:
c4x_print_char (info, *s);
break;
}
s++;
}
/* Print arguments. */
s = p->args;
if (*s)
c4x_print_char (info, ' ');
while (*s)
{
switch (*s)
{
case '*': /* indirect 0--15 */
if (! c4x_print_indirect (info, INDIRECT_LONG,
EXTRU (instruction, 15, 0)))
return 0;
break;
case '#': /* only used for ldp, ldpk */
c4x_print_immed (info, IMMED_UINT, EXTRU (instruction, 15, 0));
break;
case '@': /* direct 0--15 */
c4x_print_direct (info, EXTRU (instruction, 15, 0));
break;
case 'A': /* address register 24--22 */
if (! c4x_print_register (info, EXTRU (instruction, 24, 22) +
REG_AR0))
return 0;
break;
case 'B': /* 24-bit unsigned int immediate br(d)/call/rptb
address 0--23. */
if (IS_CPU_C4X (c4x_version))
c4x_print_relative (info, pc, EXTRS (instruction, 23, 0),
p->opcode);
else
c4x_print_addr (info, EXTRU (instruction, 23, 0));
break;
case 'C': /* indirect (short C4x) 0--7 */
if (! IS_CPU_C4X (c4x_version))
return 0;
if (! c4x_print_indirect (info, INDIRECT_C4X,
EXTRU (instruction, 7, 0)))
return 0;
break;
case 'D':
/* Cockup if get here... */
break;
case 'E': /* register 0--7 */
if (! c4x_print_register (info, EXTRU (instruction, 7, 0)))
return 0;
break;
case 'F': /* 16-bit float immediate 0--15 */
c4x_print_immed (info, IMMED_SFLOAT,
EXTRU (instruction, 15, 0));
break;
case 'I': /* indirect (short) 0--7 */
if (! c4x_print_indirect (info, INDIRECT_SHORT,
EXTRU (instruction, 7, 0)))
return 0;
break;
case 'J': /* indirect (short) 8--15 */
if (! c4x_print_indirect (info, INDIRECT_SHORT,
EXTRU (instruction, 15, 8)))
return 0;
break;
case 'G': /* register 8--15 */
if (! c4x_print_register (info, EXTRU (instruction, 15, 8)))
return 0;
break;
case 'H': /* register 16--18 */
if (! c4x_print_register (info, EXTRU (instruction, 18, 16)))
return 0;
break;
case 'K': /* register 19--21 */
if (! c4x_print_register (info, EXTRU (instruction, 21, 19)))
return 0;
break;
case 'L': /* register 22--24 */
if (! c4x_print_register (info, EXTRU (instruction, 24, 22)))
return 0;
break;
case 'M': /* register 22--22 */
c4x_print_register (info, EXTRU (instruction, 22, 22) + REG_R2);
break;
case 'N': /* register 23--23 */
c4x_print_register (info, EXTRU (instruction, 22, 22) + REG_R0);
break;
case 'O': /* indirect (short C4x) 8--15 */
if (! IS_CPU_C4X (c4x_version))
return 0;
if (! c4x_print_indirect (info, INDIRECT_C4X,
EXTRU (instruction, 15, 8)))
return 0;
break;
case 'P': /* displacement 0--15 (used by Bcond and BcondD) */
c4x_print_relative (info, pc, EXTRS (instruction, 15, 0),
p->opcode);
break;
case 'Q': /* register 0--15 */
if (! c4x_print_register (info, EXTRU (instruction, 15, 0)))
return 0;
break;
case 'R': /* register 16--20 */
if (! c4x_print_register (info, EXTRU (instruction, 20, 16)))
return 0;
break;
case 'S': /* 16-bit signed immediate 0--15 */
c4x_print_immed (info, IMMED_SINT,
EXTRS (instruction, 15, 0));
break;
case 'T': /* 5-bit signed immediate 16--20 (C4x stik) */
if (! IS_CPU_C4X (c4x_version))
return 0;
if (! c4x_print_immed (info, IMMED_SUINT,
EXTRU (instruction, 20, 16)))
return 0;
break;
case 'U': /* 16-bit unsigned int immediate 0--15 */
c4x_print_immed (info, IMMED_SUINT, EXTRU (instruction, 15, 0));
break;
case 'V': /* 5/9-bit unsigned vector 0--4/8 */
c4x_print_immed (info, IMMED_SUINT,
IS_CPU_C4X (c4x_version) ?
EXTRU (instruction, 8, 0) :
EXTRU (instruction, 4, 0) & ~0x20);
break;
case 'W': /* 8-bit signed immediate 0--7 */
if (! IS_CPU_C4X (c4x_version))
return 0;
c4x_print_immed (info, IMMED_SINT, EXTRS (instruction, 7, 0));
break;
case 'X': /* expansion register 4--0 */
val = EXTRU (instruction, 4, 0) + REG_IVTP;
if (val < REG_IVTP || val > REG_TVTP)
return 0;
if (! c4x_print_register (info, val))
return 0;
break;
case 'Y': /* address register 16--20 */
val = EXTRU (instruction, 20, 16);
if (val < REG_AR0 || val > REG_SP)
return 0;
if (! c4x_print_register (info, val))
return 0;
break;
case 'Z': /* expansion register 16--20 */
val = EXTRU (instruction, 20, 16) + REG_IVTP;
if (val < REG_IVTP || val > REG_TVTP)
return 0;
if (! c4x_print_register (info, val))
return 0;
break;
case '|': /* Parallel instruction */
c4x_print_str (info, " || ");
c4x_print_str (info, parallel);
c4x_print_char (info, ' ');
break;
case ';':
c4x_print_char (info, ',');
break;
default:
c4x_print_char (info, *s);
break;
}
s++;
}
return 1;
}
static void
c4x_hash_opcode (c4x_inst_t **optable,
const c4x_inst_t *inst)
{
int j;
int opcode = inst->opcode >> (32 - C4X_HASH_SIZE);
int opmask = inst->opmask >> (32 - C4X_HASH_SIZE);
/* Use a C4X_HASH_SIZE bit index as a hash index. We should
have unique entries so there's no point having a linked list
for each entry? */
for (j = opcode; j < opmask; j++)
if ((j & opmask) == opcode)
{
#if C4X_DEBUG
/* We should only have collisions for synonyms like
ldp for ldi. */
if (optable[j] != NULL)
printf("Collision at index %d, %s and %s\n",
j, optable[j]->name, inst->name);
#endif
optable[j] = (void *)inst;
}
}
/* Disassemble the instruction in 'instruction'.
'pc' should be the address of this instruction, it will
be used to print the target address if this is a relative jump or call
the disassembled instruction is written to 'info'.
The function returns the length of this instruction in words. */
static int
c4x_disassemble (unsigned long pc,
unsigned long instruction,
struct disassemble_info *info)
{
static c4x_inst_t **optable = NULL;
c4x_inst_t *p;
int i;
c4x_version = info->mach;
if (optable == NULL)
{
optable = (c4x_inst_t **)
xcalloc (sizeof (c4x_inst_t *), (1 << C4X_HASH_SIZE));
/* Install opcodes in reverse order so that preferred
forms overwrite synonyms. */
for (i = c3x_num_insts - 1; i >= 0; i--)
c4x_hash_opcode (optable, &c3x_insts[i]);
if (IS_CPU_C4X (c4x_version))
{
for (i = c4x_num_insts - 1; i >= 0; i--)
c4x_hash_opcode (optable, &c4x_insts[i]);
}
}
/* See if we can pick up any loading of the DP register... */
if ((instruction >> 16) == 0x5070 || (instruction >> 16) == 0x1f70)
c4x_dp = EXTRU (instruction, 15, 0);
p = optable[instruction >> (32 - C4X_HASH_SIZE)];
if (p != NULL && ((instruction & p->opmask) == p->opcode)
&& c4x_print_op (NULL, instruction, p, pc))
c4x_print_op (info, instruction, p, pc);
else
(*info->fprintf_func) (info->stream, "%08x", instruction);
/* Return size of insn in words. */
return 1;
}
/* The entry point from objdump and gdb. */
int
print_insn_tic4x (memaddr, info)
bfd_vma memaddr;
struct disassemble_info *info;
{
int status;
unsigned long pc;
unsigned long op;
bfd_byte buffer[4];
status = (*info->read_memory_func) (memaddr, buffer, 4, info);
if (status != 0)
{
(*info->memory_error_func) (status, memaddr, info);
return -1;
}
pc = memaddr;
op = bfd_getl32 (buffer);
info->bytes_per_line = 4;
info->bytes_per_chunk = 4;
info->octets_per_byte = 4;
info->display_endian = BFD_ENDIAN_LITTLE;
return c4x_disassemble (pc, op, info) * 4;
}