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opcodes/
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round rts/l and rte/l register lists. gas/ * config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register lists. Allow single-register ranges. testsuite/ * gas/h8300/h8sx_rtsl.[sd]: New test. * gas/h8300/h8300.exp: Run it.
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@ -1,3 +1,8 @@
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2003-06-10 Richard Sandiford <rsandifo@redhat.com>
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* config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
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lists. Allow single-register ranges.
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2003-06-10 Richard Sandiford <rsandifo@redhat.com>
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* config/tc-h8300.c (h8300sxnmode): New.
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@ -1091,29 +1091,19 @@ get_rtsl_operands (char *ptr, struct h8_op *operand)
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as_bad (_("expected register"));
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return;
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}
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if (type == 1)
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{
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ptr += len;
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if (*ptr++ != '-')
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if (*ptr == '-')
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{
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as_bad (_("expected register list"));
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return;
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}
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len = parse_reg (ptr, &mode, &num2, SRC);
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len = parse_reg (++ptr, &mode, &num2, SRC);
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if (len == 0 || (mode & MODE) != REG)
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{
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as_bad (_("expected register"));
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return;
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}
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ptr += len;
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if (*ptr++ != ')')
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{
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as_bad (_("expected closing paren"));
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return;
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}
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/* CONST_xxx are used as placeholders in the opcode table. */
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num = num2 - num;
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if (num < 1 || num > 3)
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if (num < 0 || num > 3)
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{
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as_bad (_("invalid register list"));
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return;
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@ -1121,6 +1111,11 @@ get_rtsl_operands (char *ptr, struct h8_op *operand)
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}
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else
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num2 = num, num = 0;
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if (type == 1 && *ptr++ != ')')
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{
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as_bad (_("expected closing paren"));
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return;
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}
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operand[0].mode = RS32;
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operand[1].mode = RD32;
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operand[0].reg = num;
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@ -1,3 +1,8 @@
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2003-06-10 Richard Sandiford <rsandifo@redhat.com>
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* gas/h8300/h8sx_rtsl.[sd]: New test.
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* gas/h8300/h8300.exp: Run it.
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2003-06-10 Richard Sandiford <rsandifo@redhat.com>
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* gas/h8300/h8sx_disp2.[sd]: New test.
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@ -2168,6 +2168,7 @@ if [istarget h8300*-*-*] then {
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do_h8300h_mov32bug
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run_dump_test h8sx_disp2
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run_dump_test h8sx_rtsl
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# Now some random tests
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set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] ]
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14
gas/testsuite/gas/h8300/h8sx_rtsl.d
Normal file
14
gas/testsuite/gas/h8300/h8sx_rtsl.d
Normal file
@ -0,0 +1,14 @@
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# objdump: -dr
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.*: *file format elf32-h8300
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Disassembly of section \.text:
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0+00 <\.text>:
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*0: 54 00 * 54 00 * rts/l er0
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*2: 54 01 * 54 01 * rts/l er1
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*4: 54 03 * 54 03 * rts/l er3
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*6: 54 05 * 54 05 * rts/l er5
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*8: 54 16 * 54 16 * rts/l er5-er6
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*a: 54 25 * 54 25 * rts/l er3-er5
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*c: 54 34 * 54 34 * rts/l er1-er4
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8
gas/testsuite/gas/h8300/h8sx_rtsl.s
Normal file
8
gas/testsuite/gas/h8300/h8sx_rtsl.s
Normal file
@ -0,0 +1,8 @@
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.h8300sx
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rts/l er0
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rts/l er1-er1
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rts/l (er3)
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rts/l (er5-er5)
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rts/l er5-er6
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rts/l er3-er5
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rts/l (er1-er4)
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@ -1,3 +1,8 @@
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2003-06-10 Richard Sandiford <rsandifo@redhat.com>
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* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
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rts/l and rte/l register lists.
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2003-06-03 Nick Clifton <nickc@redhat.com>
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* frv-desc.c: Regenerate.
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@ -698,7 +698,7 @@ bfd_h8_disassemble (addr, info, mach)
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outfn (stream, "er%d", regno[1]);
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else
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{
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outfn (stream, "(er%d-er%d)", regno[1] - regno[0],
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outfn (stream, "er%d-er%d", regno[1] - regno[0],
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regno[1]);
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}
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return qi->length;
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