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2007-04-19 Paul Brook <paul@codesourcery.com>

Browse Source 
gas/testsuite/
	* gas/arm/thumb1_unified.d: New test.
	* gas/arm/thumb1_unified.s: New test.

	gas/
	* config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
	Thumb-1.  Add sanity check for bogus relaxations.
This commit is contained in:
Paul Brook 2007-04-19 17:08:21 +00:00
parent 16a4cf1777
commit 076d447c31
5 changed files with 68 additions and 0 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2007-04-19 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
Thumb-1. Add sanity check for bogus relaxations.
2007-04-19 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (insns): Allow rsb and rsbs on Thumb-1.

13
gas/config/tc-arm.c
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@ -14110,6 +14110,14 @@ md_assemble (char *str)
return;
}
if (!ARM_CPU_HAS_FEATURE (variant, arm_ext_v6t2) && !inst.size_req)
{
/* Implicit require narrow instructions on Thumb-1. This avoids
relaxation accidentally introducing Thumb-2 instructions. */
if (opcode->tencode != do_t_blx && opcode->tencode != do_t_branch23)
inst.size_req = 2;
}
/* Check conditional suffixes. */
if (current_it_mask)
{
@ -14151,6 +14159,11 @@ md_assemble (char *str)
return;
}
}
/* Something has gone badly wrong if we try to relax a fixed size
instruction. */
assert (inst.size_req == 0 || !inst.relax);
ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used,
*opcode->tvariant);
/* Many Thumb-2 instructions also have Thumb-1 variants, so explicitly

5
gas/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2007-04-19 Paul Brook <paul@codesourcery.com>
* gas/arm/thumb1_unified.d: New test.
* gas/arm/thumb1_unified.s: New test.
2007-04-19 Nathan Froyd <froydnj@codesourcery.com>
* gas/ppc/booke.s: Add tlbsx, tlbsxe.

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gas/testsuite/gas/arm/thumb1_unified.d Normal file
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@ -0,0 +1,20 @@
# name: Thumb-1 unified
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*
Disassembly of section .text:
0[0-9a-f]+ <[^>]+> 200c movs r0, #12
0[0-9a-f]+ <[^>]+> 1cd1 adds r1, r2, #3
0[0-9a-f]+ <[^>]+> 1ed1 subs r1, r2, #3
0[0-9a-f]+ <[^>]+> 3364 adds r3, #100
0[0-9a-f]+ <[^>]+> 3c83 subs r4, #131
0[0-9a-f]+ <[^>]+> 2d27 cmp r5, #39
0[0-9a-f]+ <[^>]+> a103 add r1, pc, #12 \(adr [^)]*\)
0[0-9a-f]+ <[^>]+> 4a03 ldr r2, \[pc, #12\] \([^)]*\)
0[0-9a-f]+ <[^>]+> 6863 ldr r3, \[r4, #4\]
0[0-9a-f]+ <[^>]+> 9d01 ldr r5, \[sp, #4\]
0[0-9a-f]+ <[^>]+> b001 add sp, #4
0[0-9a-f]+ <[^>]+> b081 sub sp, #4
0[0-9a-f]+ <[^>]+> af01 add r7, sp, #4
0[0-9a-f]+ <[^>]+> 4251 negs r1, r2

25
gas/testsuite/gas/arm/thumb1_unified.s Normal file
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@ -0,0 +1,25 @@
.text
.arch armv4t
.syntax unified
.thumb
foo:
movs r0, #12
adds r1, r2, #3
subs r1, r2, #3
adds r3, r3, #0x64
subs r4, r4, #0x83
cmp r5, #0x27
adr r1, bar
ldr r2, bar
ldr r3, [r4, #4]
ldr r5, [sp, #4]
add sp, sp, #4
sub sp, sp, #4
add r7, sp, #4
rsbs r1, r2, #0
.align 2
bar: