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PR 10924

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* arm-dis.c (print_insn_arm): Mark insns that use the PC in
        post-indexed addressing as unpredictable.
This commit is contained in:
Nick Clifton 2009-12-09 08:38:04 +00:00
parent 8d099ae953
commit 07a28fab11
2 changed files with 17 additions and 5 deletions
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6
opcodes/ChangeLog
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@ -1,3 +1,9 @@
2009-12-09 Nick Clifton <nickc@redhat.com>
PR 10924
* arm-dis.c (print_insn_arm): Mark insns that use the PC in
post-indexed addressing as unpredictable.
2009-12-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (FXSAVE_Fixup): New.

16
opcodes/arm-dis.c
View File

@ -2931,11 +2931,17 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
NEGATIVE_BIT_SET ? "-" : "",
arm_regnames[given & 0xf]);
/* Writeback is automatically implied by post- addressing.
Setting the W bit is unnecessary and ARM specify it as
being unpredictable. */
if (WRITEBACK_BIT_SET && ! allow_unpredictable)
func (stream, UNPREDICTABLE_INSTRUCTION);
if (! allow_unpredictable)
{
/* Writeback is automatically implied by post- addressing.
Setting the W bit is unnecessary and ARM specify it as
being unpredictable. */
if (WRITEBACK_BIT_SET
/* Specifying the PC register as the post-indexed
registers is also unpredictable. */
|| ((given & 0xf) == 0xf))
func (stream, UNPREDICTABLE_INSTRUCTION);
}
}
}
break;