* config/tc-mips.c (macro): Handle a register plus a 16-bit

immediate offset in "dla" and "la" expansions.
* gas/mips/empic.d: Treat "addiu" and "daddiu" as equivalent when
$0 is source.
* mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
aliases to "daddiu" and "addiu".
This commit is contained in:
Maciej W. Rozycki 2002-08-09 11:07:24 +00:00
parent d0c7ff072c
commit 0c11417f42
6 changed files with 26 additions and 3 deletions

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@ -1,3 +1,8 @@
2002-08-09 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* config/tc-mips.c (macro): Handle a register plus a 16-bit
immediate offset in "dla" and "la" expansions.
2002-08-09 Alan Modra <amodra@bigpond.net.au>
* configure.in: bfd_gas=yes for all i386 targets. Formatting.

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@ -4443,6 +4443,16 @@ macro (ip)
if (! dbl && HAVE_64BIT_OBJECTS)
as_warn (_("la used to load 64-bit address"));
if (offset_expr.X_op == O_constant
&& offset_expr.X_add_number >= -0x8000
&& offset_expr.X_add_number < 0x8000)
{
macro_build ((char *) NULL, &icnt, &offset_expr,
(dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : "addiu",
"t,r,j", treg, sreg, (int) BFD_RELOC_LO16);
return;
}
if (treg == breg)
{
tempreg = AT;

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@ -1,3 +1,8 @@
2002-08-09 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* gas/mips/empic.d: Treat "addiu" and "daddiu" as equivalent when
$0 is source.
2002-08-06 Alan Modra <amodra@bigpond.net.au>
* gas/ppc/altivec_xcoff64.d: Adjust for aix5 target.

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@ -118,7 +118,7 @@ Contents of section \.text:
0010 00000000 1000ffff 00000000 0411003f .*
0020 00000000 04110000 00000000 10000041 .*
0030 00000000 10000000 00000000 3c030000 .*
0040 [26]463000c 3c030000 [26]4630114 2403ffd0 .*
0040 [26]463000c 3c030000 [26]4630114 [26]403ffd0 .*
0050 00000000 00000100 00000004 00000028 .*
0060 0000012c ffffffd0 00000000 00000000 .*
0070 00000000 00000100 00000000 00000004 .*

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@ -1,3 +1,8 @@
2002-08-08 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
* mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
aliases to "daddiu" and "addiu".
2002-07-30 Nick Clifton <nickc@redhat.com>
* po/sv.po: Updated Swedish translation.

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@ -480,7 +480,6 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
{"dla", "t,o(b)", 0x64000000, 0xfc000000, WR_t|RD_s, I3 }, /* daddiu */
{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
@ -572,7 +571,6 @@ const struct mips_opcode mips_builtin_opcodes[] =
will match first). */
{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I16 },
{"la", "t,o(b)", 0x24000000, 0xfc000000, WR_t|RD_s, I1 }, /* addiu */
{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },