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2005-02-15 Jan Beulich <jbeulich@novell.com> * elfxx-ia64.c (ia64_howto_table): Correct strings for R_IA64_DTPMOD64[LM]SB. gas/ 2005-02-15 Jan Beulich <jbeulich@novell.com> * config/tc-ia64.c (ia64_gen_real_reloc_type): Define and initialize new variables type, suffix, and width. Handle BFD_RELOC_IA64_DIR(32|64)[LM]SB in FUNC_LT_FPTR_RELATIVE case. Handle BFD_RELOC_IA64_DIR64[LM]SB in FUNC_TP_RELATIVE case. Add FUNC_DTP_MODULE case. Handle BFD_RELOC_IA64_DIR32[LM]SB in FUNC_DTP_RELATIVE case. Return incoming relocation type if BFD_RELOC_IA64_IPLT[LM]SB in FUNC_IPLT_RELOC case. Generate warning if unable to translate relocation type, using the new variables. gas/testsuite/ 2005-02-15 Jan Beulich <jbeulich@novell.com> * gas/ia64/reloc.[ds]: New. * gas/ia64/reloc-bad.[ls]: New. * gas/ia64/ia64.exp: Run new tests.
This commit is contained in:
Jan Beulich
parent
2fac3d48f3
commit
0ca3e4557f
@ -1,3 +1,8 @@
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2005-02-15 Jan Beulich <jbeulich@novell.com>
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* elfxx-ia64.c (ia64_howto_table): Correct strings for
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R_IA64_DTPMOD64[LM]SB.
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2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
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* elfxx-ia64.c (elfNN_ia64_relax_section): Allow relax
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@ -445,8 +445,8 @@ static reloc_howto_type ia64_howto_table[] =
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IA64_HOWTO (R_IA64_TPREL64LSB, "TPREL64LSB", 4, FALSE, FALSE),
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IA64_HOWTO (R_IA64_LTOFF_TPREL22, "LTOFF_TPREL22", 0, FALSE, FALSE),
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IA64_HOWTO (R_IA64_DTPMOD64MSB, "TPREL64MSB", 4, FALSE, FALSE),
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IA64_HOWTO (R_IA64_DTPMOD64LSB, "TPREL64LSB", 4, FALSE, FALSE),
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IA64_HOWTO (R_IA64_DTPMOD64MSB, "DTPMOD64MSB", 4, FALSE, FALSE),
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IA64_HOWTO (R_IA64_DTPMOD64LSB, "DTPMOD64LSB", 4, FALSE, FALSE),
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IA64_HOWTO (R_IA64_LTOFF_DTPMOD22, "LTOFF_DTPMOD22", 0, FALSE, FALSE),
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IA64_HOWTO (R_IA64_DTPREL14, "DTPREL14", 0, FALSE, FALSE),
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@ -1,3 +1,14 @@
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2005-02-15 Jan Beulich <jbeulich@novell.com>
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* config/tc-ia64.c (ia64_gen_real_reloc_type): Define and initialize
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new variables type, suffix, and width. Handle
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BFD_RELOC_IA64_DIR(32|64)[LM]SB in FUNC_LT_FPTR_RELATIVE case.
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Handle BFD_RELOC_IA64_DIR64[LM]SB in FUNC_TP_RELATIVE case. Add
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FUNC_DTP_MODULE case. Handle BFD_RELOC_IA64_DIR32[LM]SB in
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FUNC_DTP_RELATIVE case. Return incoming relocation type if
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BFD_RELOC_IA64_IPLT[LM]SB in FUNC_IPLT_RELOC case. Generate warning
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if unable to translate relocation type, using the new variables.
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2005-02-15 Jan Beulich <jbeulich@novell.com>
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* config/tc-ia64.h (ia64_symbol_chars): Declare.
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@ -10738,6 +10738,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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bfd_reloc_code_real_type r_type;
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{
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bfd_reloc_code_real_type new = 0;
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const char *type = NULL, *suffix = "";
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if (sym == NULL)
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{
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@ -10754,7 +10755,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
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case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
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case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
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default: break;
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default: type = "FPTR"; break;
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}
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break;
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@ -10767,7 +10768,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
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case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
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case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
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default: break;
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default: type = "GPREL"; break;
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}
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break;
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@ -10776,7 +10777,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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{
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case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
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case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
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default: break;
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default: type = "LTOFF"; break;
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}
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break;
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@ -10784,7 +10785,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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switch (r_type)
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{
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case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
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default: break;
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default: type = "LTOFF"; suffix = "X"; break;
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}
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break;
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@ -10797,7 +10798,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
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case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
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case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
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default: break;
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default: type = "PCREL"; break;
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}
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break;
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@ -10808,7 +10809,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
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case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
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case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
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default: break;
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default: type = "PLTOFF"; break;
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}
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break;
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@ -10819,7 +10820,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
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case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
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case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
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default: break;
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default: type = "SECREL"; break;
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}
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break;
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@ -10830,7 +10831,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
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case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
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case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
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default: break;
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default: type = "SEGREL"; break;
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}
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break;
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@ -10841,7 +10842,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
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case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
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case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
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default: break;
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default: type = "LTV"; break;
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}
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break;
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@ -10852,22 +10853,28 @@ ia64_gen_real_reloc_type (sym, r_type)
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new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
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case BFD_RELOC_IA64_IMM64:
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new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
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case BFD_RELOC_IA64_DIR32MSB:
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new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
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case BFD_RELOC_IA64_DIR32LSB:
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new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
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case BFD_RELOC_IA64_DIR64MSB:
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new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
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case BFD_RELOC_IA64_DIR64LSB:
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new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
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default:
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break;
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type = "LTOFF_FPTR"; break;
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}
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break;
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case FUNC_TP_RELATIVE:
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switch (r_type)
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{
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case BFD_RELOC_IA64_IMM14:
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new = BFD_RELOC_IA64_TPREL14; break;
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case BFD_RELOC_IA64_IMM22:
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new = BFD_RELOC_IA64_TPREL22; break;
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case BFD_RELOC_IA64_IMM64:
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new = BFD_RELOC_IA64_TPREL64I; break;
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default:
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break;
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case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
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case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
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case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
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case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
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case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
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default: type = "TPREL"; break;
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}
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break;
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@ -10877,7 +10884,19 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_IMM22:
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new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
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default:
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break;
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type = "LTOFF_TPREL"; break;
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}
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break;
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case FUNC_DTP_MODULE:
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switch (r_type)
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{
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case BFD_RELOC_IA64_DIR64MSB:
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new = BFD_RELOC_IA64_DTPMOD64MSB; break;
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case BFD_RELOC_IA64_DIR64LSB:
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new = BFD_RELOC_IA64_DTPMOD64LSB; break;
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default:
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type = "DTPMOD"; break;
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}
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break;
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@ -10887,13 +10906,17 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_IMM22:
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new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
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default:
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break;
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type = "LTOFF_DTPMOD"; break;
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}
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break;
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case FUNC_DTP_RELATIVE:
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switch (r_type)
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{
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case BFD_RELOC_IA64_DIR32MSB:
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new = BFD_RELOC_IA64_DTPREL32MSB; break;
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case BFD_RELOC_IA64_DIR32LSB:
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new = BFD_RELOC_IA64_DTPREL32LSB; break;
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case BFD_RELOC_IA64_DIR64MSB:
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new = BFD_RELOC_IA64_DTPREL64MSB; break;
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case BFD_RELOC_IA64_DIR64LSB:
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@ -10905,7 +10928,7 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_IMM64:
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new = BFD_RELOC_IA64_DTPREL64I; break;
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default:
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break;
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type = "DTPREL"; break;
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}
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break;
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@ -10915,22 +10938,48 @@ ia64_gen_real_reloc_type (sym, r_type)
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case BFD_RELOC_IA64_IMM22:
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new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
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default:
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break;
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type = "LTOFF_DTPREL"; break;
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}
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break;
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case FUNC_IPLT_RELOC:
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switch (r_type)
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{
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case BFD_RELOC_IA64_IPLTMSB: return r_type;
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case BFD_RELOC_IA64_IPLTLSB: return r_type;
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default: type = "IPLT"; break;
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}
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break;
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default:
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abort ();
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}
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/* Hmmmm. Should this ever occur? */
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if (new)
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return new;
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else
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return r_type;
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{
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int width;
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if (!type)
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abort ();
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switch (r_type)
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{
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case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
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case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
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case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
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case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
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case BFD_RELOC_IA64_IMM14: width = 14; break;
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case BFD_RELOC_IA64_IMM22: width = 22; break;
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case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
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default: abort ();
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}
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/* This should be an error, but since previously there wasn't any
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diagnostic here, dont't make it fail because of this for now. */
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as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
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return r_type;
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}
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}
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/* Here is where generate the appropriate reloc for pseudo relocation
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@ -1,3 +1,9 @@
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2005-02-15 Jan Beulich <jbeulich@novell.com>
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* gas/ia64/reloc.[ds]: New.
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* gas/ia64/reloc-bad.[ls]: New.
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* gas/ia64/ia64.exp: Run new tests.
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2005-02-15 Jan Beulich <jbeulich@novell.com>
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* gas/ia64/operand-or.d: Pass -xnone to assembler.
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@ -49,6 +49,9 @@ if [istarget "ia64-*"] then {
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run_dump_test "dependency-1"
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run_dump_test "reloc"
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run_list_test "reloc-bad" ""
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run_dump_test "real"
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run_dump_test "align"
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run_dump_test "order"
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43
gas/testsuite/gas/ia64/reloc-bad.l
Normal file
43
gas/testsuite/gas/ia64/reloc-bad.l
Normal file
@ -0,0 +1,43 @@
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.*: Assembler messages:
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.*:[[:digit:]]+: (Error|Warning): .* GPREL14 .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF14 .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF32[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF64[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* PLTOFF14 .*
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.*:[[:digit:]]+: (Error|Warning): .* PLTOFF32[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* FPTR14 .*
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.*:[[:digit:]]+: (Error|Warning): .* FPTR22 .*
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.*:[[:digit:]]+: (Error|Warning): .* PCREL14 .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_FPTR14 .*
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.*:[[:digit:]]+: (Error|Warning): .* SEGREL14 .*
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.*:[[:digit:]]+: (Error|Warning): .* SEGREL22 .*
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.*:[[:digit:]]+: (Error|Warning): .* SEGREL64I .*
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.*:[[:digit:]]+: (Error|Warning): .* SECREL14 .*
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.*:[[:digit:]]+: (Error|Warning): .* SECREL22 .*
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.*:[[:digit:]]+: (Error|Warning): .* SECREL64I .*
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.*:[[:digit:]]+: (Error|Warning): .* LTV14 .*
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.*:[[:digit:]]+: (Error|Warning): .* LTV22 .*
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.*:[[:digit:]]+: (Error|Warning): .* LTV64I .*
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.*:[[:digit:]]+: (Error|Warning): .* IPLT14 .*
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.*:[[:digit:]]+: (Error|Warning): .* IPLT22 .*
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.*:[[:digit:]]+: (Error|Warning): .* IPLT64I .*
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.*:[[:digit:]]+: (Error|Warning): .* IPLT32[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* IPLT64[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF14X .*
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.*:[[:digit:]]+: (Error|Warning): .* TPREL32[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL14 .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL64I .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL32[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL64[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* DTPMOD14 .*
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.*:[[:digit:]]+: (Error|Warning): .* DTPMOD22 .*
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.*:[[:digit:]]+: (Error|Warning): .* DTPMOD64I .*
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.*:[[:digit:]]+: (Error|Warning): .* DTPMOD32[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPMOD14 .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPMOD64I .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL32[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL64[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL14 .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL64I .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL32[LM]SB .*
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.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL64[LM]SB .*
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61
gas/testsuite/gas/ia64/reloc-bad.s
Normal file
61
gas/testsuite/gas/ia64/reloc-bad.s
Normal file
@ -0,0 +1,61 @@
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.global esym
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.section .rodata, "a", @progbits
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.text
|
||||
_start:
|
||||
adds r1 = @gprel(esym), r0
|
||||
|
||||
adds r1 = @ltoff(esym), r0
|
||||
.xdata4 .rodata, @ltoff(esym)
|
||||
.xdata8 .rodata, @ltoff(esym)
|
||||
|
||||
adds r1 = @pltoff(esym), r0
|
||||
.xdata4 .rodata, @pltoff(esym)
|
||||
|
||||
adds r1 = @fptr(esym), r0
|
||||
mov r2 = @fptr(esym)
|
||||
|
||||
adds r1 = @pcrel(esym), r0
|
||||
|
||||
adds r1 = @ltoff(@fptr(esym)), r0
|
||||
|
||||
adds r1 = @segrel(esym), r0
|
||||
mov r2 = @segrel(esym)
|
||||
movl r3 = @segrel(esym)
|
||||
|
||||
adds r1 = @secrel(esym), r0
|
||||
mov r2 = @secrel(esym)
|
||||
movl r3 = @secrel(esym)
|
||||
|
||||
adds r1 = @ltv(esym), r0
|
||||
mov r2 = @ltv(esym)
|
||||
movl r3 = @ltv(esym)
|
||||
|
||||
adds r1 = @iplt(esym), r0
|
||||
mov r2 = @iplt(esym)
|
||||
movl r3 = @iplt(esym)
|
||||
.xdata4 .rodata, @iplt(esym)
|
||||
.xdata8 .rodata, @iplt(esym)
|
||||
|
||||
adds r1 = @ltoffx(esym), r0
|
||||
|
||||
.xdata4 .rodata, @tprel(esym)
|
||||
|
||||
adds r1 = @ltoff(@tprel(esym)), r0
|
||||
movl r3 = @ltoff(@tprel(esym))
|
||||
.xdata4 .rodata, @ltoff(@tprel(esym))
|
||||
.xdata8 .rodata, @ltoff(@tprel(esym))
|
||||
|
||||
adds r1 = @dtpmod(esym), r0
|
||||
mov r2 = @dtpmod(esym)
|
||||
movl r3 = @dtpmod(esym)
|
||||
.xdata4 .rodata, @dtpmod(esym)
|
||||
|
||||
adds r1 = @ltoff(@dtpmod(esym)), r0
|
||||
movl r3 = @ltoff(@dtpmod(esym))
|
||||
.xdata4 .rodata, @ltoff(@tprel(esym))
|
||||
.xdata8 .rodata, @ltoff(@tprel(esym))
|
||||
|
||||
adds r1 = @ltoff(@dtprel(esym)), r0
|
||||
movl r3 = @ltoff(@dtprel(esym))
|
||||
.xdata4 .rodata, @ltoff(@dtprel(esym))
|
||||
.xdata8 .rodata, @ltoff(@dtprel(esym))
|
||||
64
gas/testsuite/gas/ia64/reloc.d
Normal file
64
gas/testsuite/gas/ia64/reloc.d
Normal file
@ -0,0 +1,64 @@
|
||||
#objdump: -r
|
||||
#name: ia64 relocations
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
RELOCATION RECORDS FOR \[\.text\]:
|
||||
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
|
||||
[[:xdigit:]]+[012][[:space:]]+IMM14[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+IMM22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+IMM64[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+GPREL22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+GPREL64I[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+LTOFF22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+LTOFF64I[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+PLTOFF22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+PLTOFF64I[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+FPTR64I[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+PCREL60B[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+PCREL21B[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+PCREL21M[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+PCREL21F[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+LTOFF_FPTR22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+LTOFF_FPTR64I[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+PCREL22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+PCREL64I[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+LTOFF22X[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+LDXMOV[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+TPREL14[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+TPREL22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+TPREL64I[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+LTOFF_TPREL22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+LTOFF_DTPMOD22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+DTPREL14[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+DTPREL22[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+DTPREL64I[[:space:]]+esym
|
||||
[[:xdigit:]]+[012][[:space:]]+LTOFF_DTPREL22[[:space:]]+esym
|
||||
|
||||
RELOCATION RECORDS FOR \[\.rodata\.4\]:
|
||||
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
|
||||
[[:xdigit:]]+[048cC][[:space:]]+DIR32[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[048cC][[:space:]]+GPREL32[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[048cC][[:space:]]+FPTR32[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[048cC][[:space:]]+PCREL32[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[048cC][[:space:]]+LTOFF_FPTR32[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[048cC][[:space:]]+SEGREL32[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[048cC][[:space:]]+SECREL32[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[048cC][[:space:]]+LTV32[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[048cC][[:space:]]+DTPREL32[LM]SB[[:space:]]+esym
|
||||
|
||||
RELOCATION RECORDS FOR \[\.rodata\.8\]:
|
||||
OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
|
||||
[[:xdigit:]]+[08][[:space:]]+DIR64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+GPREL64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+PLTOFF64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+FPTR64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+PCREL64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+LTOFF_FPTR64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+SEGREL64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+SECREL64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+LTV64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+IPLT[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+TPREL64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+DTPMOD64[LM]SB[[:space:]]+esym
|
||||
[[:xdigit:]]+[08][[:space:]]+DTPREL64[LM]SB[[:space:]]+esym
|
||||
82
gas/testsuite/gas/ia64/reloc.s
Normal file
82
gas/testsuite/gas/ia64/reloc.s
Normal file
@ -0,0 +1,82 @@
|
||||
.global esym
|
||||
.section .rodata.4, "a", @progbits
|
||||
.section .rodata.8, "a", @progbits
|
||||
.text
|
||||
_start:
|
||||
adds r1 = esym, r0
|
||||
mov r2 = esym
|
||||
movl r3 = esym
|
||||
.xdata4 .rodata.4, esym
|
||||
.xdata8 .rodata.8, esym
|
||||
|
||||
mov r2 = @gprel(esym)
|
||||
movl r3 = @gprel(esym)
|
||||
.xdata4 .rodata.4, @gprel(esym)
|
||||
.xdata8 .rodata.8, @gprel(esym)
|
||||
|
||||
mov r2 = @ltoff(esym)
|
||||
movl r3 = @ltoff(esym)
|
||||
|
||||
mov r2 = @pltoff(esym)
|
||||
movl r3 = @pltoff(esym)
|
||||
.xdata8 .rodata.8, @pltoff(esym)
|
||||
|
||||
movl r3 = @fptr(esym)
|
||||
.xdata4 .rodata.4, @fptr(esym)
|
||||
.xdata8 .rodata.8, @fptr(esym)
|
||||
|
||||
brl.call.sptk b1 = esym
|
||||
br.call.sptk b2 = esym
|
||||
chk.s r0, esym
|
||||
fchkf esym
|
||||
.xdata4 .rodata.4, @pcrel(esym)
|
||||
.xdata8 .rodata.8, @pcrel(esym)
|
||||
|
||||
mov r2 = @ltoff(@fptr(esym))
|
||||
movl r3 = @ltoff(@fptr(esym))
|
||||
.xdata4 .rodata.4, @ltoff(@fptr(esym))
|
||||
.xdata8 .rodata.8, @ltoff(@fptr(esym))
|
||||
|
||||
.xdata4 .rodata.4, @segrel(esym)
|
||||
.xdata8 .rodata.8, @segrel(esym)
|
||||
|
||||
.xdata4 .rodata.4, @secrel(esym)
|
||||
.xdata8 .rodata.8, @secrel(esym)
|
||||
|
||||
// REL32 only in executables
|
||||
// REL64 only in executables
|
||||
|
||||
.xdata4 .rodata.4, @ltv(esym)
|
||||
.xdata8 .rodata.8, @ltv(esym)
|
||||
|
||||
//todo PCREL21BI
|
||||
mov r2 = @pcrel(esym)
|
||||
movl r3 = @pcrel(esym)
|
||||
|
||||
.xdata16 .rodata.8, @iplt(esym)
|
||||
|
||||
// COPY only in executables
|
||||
|
||||
//todo movl r3 = -esym
|
||||
|
||||
mov r2 = @ltoffx(esym)
|
||||
ld8.mov r3 = [r2], esym
|
||||
|
||||
adds r1 = @tprel(esym), r0
|
||||
mov r2 = @tprel(esym)
|
||||
movl r3 = @tprel(esym)
|
||||
.xdata8 .rodata.8, @tprel(esym)
|
||||
|
||||
mov r2 = @ltoff(@tprel(esym))
|
||||
|
||||
.xdata8 .rodata.8, @dtpmod(esym)
|
||||
|
||||
mov r2 = @ltoff(@dtpmod(esym))
|
||||
|
||||
adds r1 = @dtprel(esym), r0
|
||||
mov r2 = @dtprel(esym)
|
||||
movl r3 = @dtprel(esym)
|
||||
.xdata4 .rodata.4, @dtprel(esym)
|
||||
.xdata8 .rodata.8, @dtprel(esym)
|
||||
|
||||
mov r2 = @ltoff(@dtprel(esym))
|
||||
Loading…
x
Reference in New Issue
Block a user