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(print_insn_sparc): When examining values added in to rs1, make sure that
there are previous instructions.
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@ -1,3 +1,8 @@
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2003-01-29 Henric Jungheim <henric@attbi.com>
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* sparc-dis.c (print_insn_sparc): When examining values added in
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to rs1, make sure that there are previous instructions.
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2003-01-23 Nick Clifton <nickc@redhat.com>
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* Add sh2e support:
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@ -1,20 +1,20 @@
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/* Print SPARC instructions.
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Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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2000, 2002 Free Software Foundation, Inc.
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2000, 2002, 2003 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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@ -46,7 +46,8 @@ static const struct sparc_opcode **sorted_opcodes;
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static int opcode_bits[4] = { 0x01c00000, 0x0, 0x01f80000, 0x01f80000 };
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#define HASH_INSN(INSN) \
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((((INSN) >> 24) & 0xc0) | (((INSN) & opcode_bits[((INSN) >> 30) & 3]) >> 19))
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struct opcode_hash {
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struct opcode_hash
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{
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struct opcode_hash *next;
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const struct sparc_opcode *opcode;
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};
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@ -257,7 +258,7 @@ print_insn_sparc (memaddr, info)
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}
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/* On SPARClite variants such as DANlite (sparc86x), instructions
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are always big-endian even when the machine is in little-endian mode. */
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are always big-endian even when the machine is in little-endian mode. */
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if (info->endian == BFD_ENDIAN_BIG || info->mach == bfd_mach_sparc_sparclite)
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getword = bfd_getb32;
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else
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@ -265,10 +266,10 @@ print_insn_sparc (memaddr, info)
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insn = getword (buffer);
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info->insn_info_valid = 1; /* We do return this info */
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info->insn_type = dis_nonbranch; /* Assume non branch insn */
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info->branch_delay_insns = 0; /* Assume no delay */
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info->target = 0; /* Assume no target known */
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info->insn_info_valid = 1; /* We do return this info. */
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info->insn_type = dis_nonbranch; /* Assume non branch insn. */
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info->branch_delay_insns = 0; /* Assume no delay. */
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info->target = 0; /* Assume no target known. */
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for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next)
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{
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@ -316,32 +317,34 @@ print_insn_sparc (memaddr, info)
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if (opcode->args[0] != ',')
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(*info->fprintf_func) (stream, " ");
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for (s = opcode->args; *s != '\0'; ++s)
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{
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while (*s == ',')
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{
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(*info->fprintf_func) (stream, ",");
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++s;
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switch (*s) {
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case 'a':
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(*info->fprintf_func) (stream, "a");
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is_annulled = 1;
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++s;
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continue;
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case 'N':
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(*info->fprintf_func) (stream, "pn");
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++s;
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continue;
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switch (*s)
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{
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case 'a':
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(*info->fprintf_func) (stream, "a");
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is_annulled = 1;
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++s;
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continue;
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case 'N':
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(*info->fprintf_func) (stream, "pn");
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++s;
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continue;
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case 'T':
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(*info->fprintf_func) (stream, "pt");
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++s;
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continue;
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case 'T':
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(*info->fprintf_func) (stream, "pt");
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++s;
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continue;
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default:
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break;
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} /* switch on arg */
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} /* while there are comma started args */
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default:
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break;
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}
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}
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(*info->fprintf_func) (stream, " ");
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@ -682,26 +685,33 @@ print_insn_sparc (memaddr, info)
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unsigned long prev_insn;
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int errcode;
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errcode =
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(*info->read_memory_func)
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if (memaddr >= 4)
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errcode =
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(*info->read_memory_func)
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(memaddr - 4, buffer, sizeof (buffer), info);
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else
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errcode = 1;
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prev_insn = getword (buffer);
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if (errcode == 0)
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{
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/* If it is a delayed branch, we need to look at the
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instruction before the delayed branch. This handles
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sequences such as
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sequences such as:
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sethi %o1, %hi(_foo), %o1
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call _printf
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or %o1, %lo(_foo), %o1
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*/
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or %o1, %lo(_foo), %o1 */
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if (is_delayed_branch (prev_insn))
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{
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errcode = (*info->read_memory_func)
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(memaddr - 8, buffer, sizeof (buffer), info);
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if (memaddr >= 8)
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errcode = (*info->read_memory_func)
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(memaddr - 8, buffer, sizeof (buffer), info);
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else
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errcode = 1;
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prev_insn = getword (buffer);
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}
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}
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@ -746,7 +756,7 @@ print_insn_sparc (memaddr, info)
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}
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}
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info->insn_type = dis_noninsn; /* Mark as non-valid instruction */
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info->insn_type = dis_noninsn; /* Mark as non-valid instruction. */
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(*info->fprintf_func) (stream, _("unknown"));
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return sizeof (buffer);
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}
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