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gas/
* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument. Require the target to be a bare symbol on targets with in-place addends. (macro_build_jalr): Update accordingly. (mips_fix_adjustable): Don't reduce R_MIPS_JALRs on targets with in-place addends. gas/testsuite/ * gas/mips/jalr2.s, gas/mips/jalr2.d: New test. * gas/mips/jal-svr4pic.d: Don't expect R_MIPS_JALRs to be reduced. * gas/mips/jal-xgot.d: Likewise. * gas/mips/mips-abi32-pic2.d: Likewise. * gas/mips/mips.exp: Run it.
This commit is contained in:
Richard Sandiford
parent
3c0bfb2a23
commit
1180b5a4de
@ -1,3 +1,12 @@
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2009-09-13 Richard Sandiford <rdsandiford@googlemail.com>
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* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
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Require the target to be a bare symbol on targets with
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in-place addends.
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(macro_build_jalr): Update accordingly.
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(mips_fix_adjustable): Don't reduce R_MIPS_JALRs on targets
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with in-place addends.
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2009-09-11 Nick Clifton <nickc@redhat.com>
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* po/gas.pot: Updated by the Translation project.
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@ -292,10 +292,14 @@ static int file_ase_mips16;
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/* True if we want to create R_MIPS_JALR for jalr $25. */
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#ifdef TE_IRIX
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#define MIPS_JALR_HINT_P HAVE_NEWABI
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#define MIPS_JALR_HINT_P(EXPR) HAVE_NEWABI
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#else
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/* As a GNU extension, we use R_MIPS_JALR for o32 too. */
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#define MIPS_JALR_HINT_P 1
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/* As a GNU extension, we use R_MIPS_JALR for o32 too. However,
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because there's no place for any addend, the only acceptable
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expression is a bare symbol. */
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#define MIPS_JALR_HINT_P(EXPR) \
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(!HAVE_IN_PLACE_ADDENDS \
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|| ((EXPR)->X_op == O_symbol && (EXPR)->X_add_number == 0))
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#endif
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/* True if -mips3d was passed or implied by arguments passed on the
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@ -3930,13 +3934,13 @@ macro_build_jalr (expressionS *ep)
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{
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char *f = NULL;
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if (MIPS_JALR_HINT_P)
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if (MIPS_JALR_HINT_P (ep))
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{
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frag_grow (8);
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f = frag_more (0);
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}
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macro_build (NULL, "jalr", "d,s", RA, PIC_CALL_REG);
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if (MIPS_JALR_HINT_P)
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if (MIPS_JALR_HINT_P (ep))
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fix_new_exp (frag_now, f - frag_now->fr_literal,
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4, ep, FALSE, BFD_RELOC_MIPS_JALR);
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}
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@ -14097,6 +14101,10 @@ mips_fix_adjustable (fixS *fixp)
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&& (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE) != 0)
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return 0;
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/* There is no place to store an in-place offset for JALR relocations. */
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if (fixp->fx_r_type == BFD_RELOC_MIPS_JALR && HAVE_IN_PLACE_ADDENDS)
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return 0;
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#ifdef OBJ_ELF
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/* R_MIPS16_26 relocations against non-MIPS16 functions might resolve
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to a floating-point stub. The same is true for non-R_MIPS16_26
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@ -1,3 +1,11 @@
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2009-09-13 Richard Sandiford <rdsandiford@googlemail.com>
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* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
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* gas/mips/jal-svr4pic.d: Don't expect R_MIPS_JALRs to be reduced.
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* gas/mips/jal-xgot.d: Likewise.
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* gas/mips/mips-abi32-pic2.d: Likewise.
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* gas/mips/mips.exp: Run it.
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2009-09-13 Richard Sandiford <rdsandiford@googlemail.com>
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* gas/mips/mips16-dwarf2-n32.d: Expect odd addresses.
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@ -26,7 +26,7 @@ Disassembly of section .text:
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0+0034 <[^>]*> addiu t9,t9,0
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[ ]*34: R_MIPS_LO16 .text
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0+0038 <[^>]*> jalr t9
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[ ]*38: R_MIPS_JALR .text
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[ ]*38: R_MIPS_JALR text_label
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0+003c <[^>]*> nop
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0+0040 <[^>]*> lw gp,0\(sp\)
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0+0044 <[^>]*> nop
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@ -27,7 +27,7 @@ Disassembly of section .text:
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0+0034 <[^>]*> addiu t9,t9,0
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[ ]*34: R_MIPS_LO16 .text
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0+0038 <[^>]*> jalr t9
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[ ]*38: R_MIPS_JALR .text
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[ ]*38: R_MIPS_JALR text_label
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0+003c <[^>]*> nop
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0+0040 <[^>]*> lw gp,0\(sp\)
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0+0044 <[^>]*> lui t9,0x0
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41
gas/testsuite/gas/mips/jalr2.d
Normal file
41
gas/testsuite/gas/mips/jalr2.d
Normal file
@ -0,0 +1,41 @@
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#as: -mips2 -32 -KPIC
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#objdump: -dr
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.*
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Disassembly of section \.text:
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.* <test>:
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.*: afbc0010 sw gp,16\(sp\)
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.*: 8f990000 lw t9,0\(gp\)
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.*: R_MIPS_GOT16 \.text
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.*: 2739004c addiu t9,t9,76
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.*: R_MIPS_LO16 \.text
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.*: 0320f809 jalr t9
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.*: R_MIPS_JALR local
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.*: 00000000 nop
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.*: 8fbc0010 lw gp,16\(sp\)
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.*: 8f990000 lw t9,0\(gp\)
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.*: R_MIPS_GOT16 \.text
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.*: 27390058 addiu t9,t9,88
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.*: R_MIPS_LO16 \.text
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# No R_MIPS_JALR here, because the target address had an addend.
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.*: 0320f809 jalr t9
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.*: 00000000 nop
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.*: 8fbc0010 lw gp,16\(sp\)
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.*: 8f990000 lw t9,0\(gp\)
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.*: R_MIPS_CALL16 global
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.*: 0320f809 jalr t9
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.*: R_MIPS_JALR global
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.*: 00000000 nop
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.*: 8fbc0010 lw gp,16\(sp\)
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.*: 8f99000c lw t9,12\(gp\)
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.*: R_MIPS_CALL16 global
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# No R_MIPS_JALR here either, for the same reason.
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.*: 0320f809 jalr t9
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.*: 00000000 nop
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.*: 8fbc0010 lw gp,16\(sp\)
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.* <local>:
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\.\.\.
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15
gas/testsuite/gas/mips/jalr2.s
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15
gas/testsuite/gas/mips/jalr2.s
Normal file
@ -0,0 +1,15 @@
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.ent test
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test:
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.frame $sp,32,$31
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.cprestore 16
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jal local
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jal local+12
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jal global
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jal global+12
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.end test
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local:
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nop
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nop
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nop
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nop
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@ -16,7 +16,7 @@ Disassembly of section \.text:
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0+014 <[^>]*> 273900cc addiu t9,t9,204
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14: R_MIPS_LO16 \.text
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0+018 <[^>]*> 0320f809 jalr t9
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18: R_MIPS_JALR \.text
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18: R_MIPS_JALR end
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0+01c <[^>]*> 00000000 nop
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0+020 <[^>]*> 8fbc0008 lw gp,8\(sp\)
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0+024 <[^>]*> 00000000 nop
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@ -36,7 +36,7 @@ Disassembly of section \.text:
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0+050 <[^>]*> 273900cc addiu t9,t9,204
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50: R_MIPS_LO16 \.text
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0+054 <[^>]*> 0320f809 jalr t9
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54: R_MIPS_JALR \.text
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54: R_MIPS_JALR end
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0+058 <[^>]*> 00000000 nop
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0+05c <[^>]*> 3c010001 lui at,0x1
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0+060 <[^>]*> 003d0821 addu at,at,sp
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@ -60,7 +60,7 @@ Disassembly of section \.text:
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0+09c <[^>]*> 273900cc addiu t9,t9,204
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9c: R_MIPS_LO16 \.text
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0+0a0 <[^>]*> 0320f809 jalr t9
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a0: R_MIPS_JALR \.text
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a0: R_MIPS_JALR end
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0+0a4 <[^>]*> 00000000 nop
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0+0a8 <[^>]*> 3c010001 lui at,0x1
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0+0ac <[^>]*> 003d0821 addu at,at,sp
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@ -706,6 +706,7 @@ if { [istarget mips*-*-vxworks*] } {
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run_list_test "tls-ill" "-32"
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run_dump_test "tls-o32"
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run_dump_test "jalr2"
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}
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if $has_newabi {
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