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https://github.com/darlinghq/darling-gdb.git
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2003-06-09 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Updated for the new -n option for the i386 assembler. * config/tc-i386.c (optimize_align_code): New. (md_shortopts): Add 'n'. (md_parse_option): Handle 'n'. (md_show_usage): Add '-n'. * config/tc-i386.h (optimize_align_code): Declared. (md_do_align): Optimize code alignment only if optimize_align_code is not 0. * doc/as.texinfo: Add the new -n option. * doc/c-i386.texi: Document the new -n option.
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@ -1,3 +1,20 @@
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2003-06-09 H.J. Lu <hongjiu.lu@intel.com>
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* NEWS: Updated for the new -n option for the i386 assembler.
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* config/tc-i386.c (optimize_align_code): New.
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(md_shortopts): Add 'n'.
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(md_parse_option): Handle 'n'.
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(md_show_usage): Add '-n'.
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* config/tc-i386.h (optimize_align_code): Declared.
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(md_do_align): Optimize code alignment only if optimize_align_code
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is not 0.
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* doc/as.texinfo: Add the new -n option.
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* doc/c-i386.texi: Document the new -n option.
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2003-06-07 Richard Henderson <rth@redhat.com>
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* doc/as.texinfo: Document .cfi_rel_offset.
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5
gas/NEWS
5
gas/NEWS
@ -1,5 +1,10 @@
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-*- text -*-
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* Added -n switch for x86 assembler. By default, x86 GAS replaces
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multiple nop instructions used for alignment within code sections
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with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
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switch disables the optimization.
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* Added support for MIPS32 Release 2.
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* Added support for Xtensa architecture.
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@ -303,6 +303,9 @@ static int allow_naked_reg = 0;
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frame as in 32 bit mode. */
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static char stackop_size = '\0';
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/* Non-zero to optimize code alignment. */
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int optimize_align_code = 1;
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/* Non-zero to quieten some warnings. */
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static int quiet_warnings = 0;
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@ -4889,9 +4892,9 @@ parse_register (reg_string, end_op)
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}
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#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
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const char *md_shortopts = "kVQ:sq";
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const char *md_shortopts = "kVQ:sqn";
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#else
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const char *md_shortopts = "q";
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const char *md_shortopts = "qn";
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#endif
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struct option md_longopts[] = {
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@ -4912,6 +4915,10 @@ md_parse_option (c, arg)
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{
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switch (c)
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{
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case 'n':
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optimize_align_code = 0;
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break;
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case 'q':
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quiet_warnings = 1;
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break;
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@ -4973,10 +4980,12 @@ md_show_usage (stream)
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-Q ignored\n\
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-V print assembler version number\n\
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-k ignored\n\
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-n Do not optimize code alignment\n\
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-q quieten some warnings\n\
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-s ignored\n"));
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#else
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fprintf (stream, _("\
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-n Do not optimize code alignment\n\
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-q quieten some warnings\n"));
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#endif
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}
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@ -516,9 +516,14 @@ extern int tc_i386_fix_adjustable PARAMS ((struct fix *));
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extern const struct relax_type md_relax_table[];
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#define TC_GENERIC_RELAX_TABLE md_relax_table
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extern int optimize_align_code;
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#define md_do_align(n, fill, len, max, around) \
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if ((n) && !need_pass_2 \
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&& (!(fill) || ((char)*(fill) == (char)0x90 && (len) == 1)) \
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if ((n) \
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&& !need_pass_2 \
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&& optimize_align_code \
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&& (!(fill) \
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|| ((char)*(fill) == (char)0x90 && (len) == 1)) \
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&& subseg_text_p (now_seg)) \
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{ \
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frag_align_code ((n), (max)); \
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@ -332,7 +332,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
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@ifset I80386
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@emph{Target i386 options:}
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[@b{--32}|@b{--64}]
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[@b{--32}|@b{--64}] [@b{-n}]
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@end ifset
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@ifset I960
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@ -61,6 +61,11 @@ These options are only available with the ELF object file format, and
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require that the necessary BFD support has been included (on a 32-bit
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platform you have to add --enable-64-bit-bfd to configure enable 64-bit
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usage and use x86-64 as target platform).
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@item -n
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By default, x86 GAS replaces multiple nop instructions used for
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alignment within code sections with multi-byte nop instructions such
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as leal 0(%esi,1),%esi. This switch disables the optimization.
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@end table
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@node i386-Syntax
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