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Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.

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gas/ChangeLog
	* config/tc-ia64.c (dv_sem): Add "stop".
	(specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now.
	(specify_resource, case IA64_RS_PRr): New for regs 16 to 62.
	(specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to
	match above.
	(mark_resources): Check IA64_RS_PRr.
gas/testsuite/ChangeLog
	* gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62.
	* gas/ia64/dv-waw-err.s: Likewise.
	* gas/ia64/dv-imply.d: Regenerate.
	* gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d,
	gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l,
	gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise.
include/opcode/ChangeLog
	* ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
opcodes/ChangeLog
	* ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
	* ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
	(lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
	* ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
	* ia64-asmtab.c: Regnerate.
This commit is contained in:
Jim Wilson 2000-09-22 19:43:50 +00:00
parent 050823ca47
commit 139368c9f3
25 changed files with 4652 additions and 4420 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
gas/ChangeLog
View File

@ -1,3 +1,12 @@
2000-09-22 Jim Wilson <wilson@cygnus.com>
* config/tc-ia64.c (dv_sem): Add "stop".
(specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now.
(specify_resource, case IA64_RS_PRr): New for regs 16 to 62.
(specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to
match above.
(mark_resources): Check IA64_RS_PRr.
2000-09-22 Michael Sokolov <msokolov@ivan.Harhan.ORG>
* config/tc-m68k.c (md_relax_table, m68k_ip, md_convert_frag_1,

166
gas/config/tc-ia64.c
View File

@ -528,7 +528,7 @@ static int regdepslen = 0;
static int regdepstotlen = 0;
static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
static const char *dv_sem[] = { "none", "implied", "impliedf",
"data", "instr", "specific", "other" };
"data", "instr", "specific", "stop", "other" };
static const char *dv_cmp_type[] = { "none", "OR", "AND" };
/* Current state of PR mutexation */
@ -6921,24 +6921,127 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
}
break;
/* This is the same as IA64_RS_PRr, except that the register range is
from 1 - 15, and there are no rotating register reads/writes here. */
case IA64_RS_PR:
if (note == 0)
{
if (idesc->operands[0] == IA64_OPND_PR_ROT)
for (i = 1; i < 16; i++)
{
for (i = 16; i < 63; i++)
specs[count] = tmpl;
specs[count++].index = i;
}
}
else if (note == 7)
{
valueT mask = 0;
/* Mark only those registers indicated by the mask. */
if (rsrc_write)
{
mask = CURR_SLOT.opnd[2].X_add_number;
for (i = 1; i < 16; i++)
if (mask & ((valueT) 1 << i))
{
specs[count] = tmpl;
specs[count++].index = i;
}
}
else
{
UNHANDLED;
}
}
else if (note == 11) /* note 11 implies note 1 as well */
{
if (rsrc_write)
{
for (i = 0; i < idesc->num_outputs; i++)
{
specs[count] = tmpl;
specs[count++].index = i;
if (idesc->operands[i] == IA64_OPND_P1
|| idesc->operands[i] == IA64_OPND_P2)
{
int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
if (regno >= 1 && regno < 16)
{
specs[count] = tmpl;
specs[count++].index = regno;
}
}
}
}
else
{
for (i = 1; i < 63; i++)
UNHANDLED;
}
}
else if (note == 12)
{
if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
{
specs[count] = tmpl;
specs[count++].index = CURR_SLOT.qp_regno;
}
}
else if (note == 1)
{
if (rsrc_write)
{
int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
int or_andcm = strstr(idesc->name, "or.andcm") != NULL;
int and_orcm = strstr(idesc->name, "and.orcm") != NULL;
if ((idesc->operands[0] == IA64_OPND_P1
|| idesc->operands[0] == IA64_OPND_P2)
&& p1 >= 1 && p1 < 16)
{
specs[count] = tmpl;
specs[count++].index = i;
specs[count].cmp_type =
(or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
specs[count++].index = p1;
}
if ((idesc->operands[1] == IA64_OPND_P1
|| idesc->operands[1] == IA64_OPND_P2)
&& p2 >= 1 && p2 < 16)
{
specs[count] = tmpl;
specs[count].cmp_type =
(or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
specs[count++].index = p2;
}
}
else
{
if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
{
specs[count] = tmpl;
specs[count++].index = CURR_SLOT.qp_regno;
}
if (idesc->operands[1] == IA64_OPND_PR)
{
for (i = 1; i < 16; i++)
{
specs[count] = tmpl;
specs[count++].index = i;
}
}
}
}
else
{
UNHANDLED;
}
break;
/* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
simplified cases of this. */
case IA64_RS_PRr:
if (note == 0)
{
for (i = 16; i < 63; i++)
{
specs[count] = tmpl;
specs[count++].index = i;
}
}
else if (note == 7)
@ -6949,16 +7052,12 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
&& idesc->operands[0] == IA64_OPND_PR)
{
mask = CURR_SLOT.opnd[2].X_add_number;
if (mask & ((valueT) 1 << 16))
mask |= ~(valueT) 0xffff;
for (i = 1; i < 63; i++)
{
if (mask & ((valueT) 1 << i))
{
specs[count] = tmpl;
specs[count++].index = i;
}
}
if (mask & ((valueT) 1<<16))
for (i = 16; i < 63; i++)
{
specs[count] = tmpl;
specs[count++].index = i;
}
}
else if (rsrc_write
&& idesc->operands[0] == IA64_OPND_PR_ROT)
@ -6984,7 +7083,7 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
|| idesc->operands[i] == IA64_OPND_P2)
{
int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
if (regno != 0)
if (regno >= 16 && regno < 63)
{
specs[count] = tmpl;
specs[count++].index = regno;
@ -6999,7 +7098,7 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
}
else if (note == 12)
{
if (CURR_SLOT.qp_regno != 0)
if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
{
specs[count] = tmpl;
specs[count++].index = CURR_SLOT.qp_regno;
@ -7016,7 +7115,7 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
if ((idesc->operands[0] == IA64_OPND_P1
|| idesc->operands[0] == IA64_OPND_P2)
&& p1 != 0 && p1 != 63)
&& p1 >= 16 && p1 < 63)
{
specs[count] = tmpl;
specs[count].cmp_type =
@ -7025,7 +7124,7 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
}
if ((idesc->operands[1] == IA64_OPND_P1
|| idesc->operands[1] == IA64_OPND_P2)
&& p2 != 0 && p2 != 63)
&& p2 >= 16 && p2 < 63)
{
specs[count] = tmpl;
specs[count].cmp_type =
@ -7035,14 +7134,14 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
}
else
{
if (CURR_SLOT.qp_regno != 0)
if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
{
specs[count] = tmpl;
specs[count++].index = CURR_SLOT.qp_regno;
}
if (idesc->operands[1] == IA64_OPND_PR)
{
for (i = 1; i < 63; i++)
for (i = 16; i < 63; i++)
{
specs[count] = tmpl;
specs[count++].index = i;
@ -7436,11 +7535,21 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
}
break;
/* This is the same as IA64_RS_PRr, except simplified to account for
the fact that there is only one register. */
case IA64_RS_PR63:
if (note == 0)
{
specs[count++] = tmpl;
}
else if (note == 7)
{
valueT mask = 0;
if (idesc->operands[2] == IA64_OPND_IMM17)
mask = CURR_SLOT.opnd[2].X_add_number;
if (mask & ((valueT) 1 << 63))
specs[count++] = tmpl;
}
else if (note == 11)
{
if ((idesc->operands[0] == IA64_OPND_P1
@ -7458,16 +7567,6 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
specs[count++] = tmpl;
}
}
else if (note == 7)
{
valueT mask = 0;
if (idesc->operands[2] == IA64_OPND_IMM17)
mask = CURR_SLOT.opnd[2].X_add_number;
if (mask & ((valueT) 1 << 63))
{
specs[count++] = tmpl;
}
}
else if (note == 1)
{
if (rsrc_write)
@ -8407,6 +8506,7 @@ mark_resources (idesc)
if (add_only_qp_reads
&& !(dep->mode == IA64_DV_WAR
&& (dep->specifier == IA64_RS_PR
|| dep->specifier == IA64_RS_PRr
|| dep->specifier == IA64_RS_PR63)))
continue;

9
gas/testsuite/ChangeLog
View File

@ -1,3 +1,12 @@
2000-09-22 Jim Wilson <wilson@cygnus.com>
* gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62.
* gas/ia64/dv-waw-err.s: Likewise.
* gas/ia64/dv-imply.d: Regenerate.
* gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d,
gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l,
gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise.
2000-09-14 Timothy Wall <twall@cygnus.com>
* gas/ia64/dv-waw-err.[sl]: Additional tests for parallel

67
gas/testsuite/gas/ia64/dv-imply.d
View File

@ -6,37 +6,40 @@
Disassembly of section \.text:
0000000000000000 <L-0xb0>:
0: 30 20 08 00 00 21 \[MIB\] \(p01\) mov r4=2
6: 00 00 00 02 00 01 nop\.i 0x0
c: b0 00 00 40 \(p02\) br\.cond\.sptk\.few b0 <L>
10: 11 20 1c 00 00 21 \[MIB\] mov r4=7
16: 00 00 00 02 00 00 nop\.i 0x0
0000000000000000 <L-0xc0>:
0: 3c 20 08 00 00 21 \[MFB\] \(p01\) mov r4=2
6: 00 00 00 02 00 01 nop\.f 0x0
c: c0 00 00 40 \(p02\) br\.cond\.sptk\.few c0 <L>
10: 1d 20 1c 00 00 21 \[MFB\] mov r4=7
16: 00 00 00 02 00 00 nop\.f 0x0
1c: 00 00 20 00 rfi;;
20: 10 20 08 00 00 21 \[MIB\] mov r4=2
26: 00 00 00 02 00 01 nop\.i 0x0
2c: 90 00 00 40 \(p02\) br\.cond\.sptk\.few b0 <L>
30: 31 20 1c 00 00 21 \[MIB\] \(p01\) mov r4=7
36: 00 00 00 02 00 00 nop\.i 0x0
20: 1c 20 08 00 00 21 \[MFB\] mov r4=2
26: 00 00 00 02 00 01 nop\.f 0x0
2c: a0 00 00 40 \(p02\) br\.cond\.sptk\.few c0 <L>
30: 3d 20 1c 00 00 21 \[MFB\] \(p01\) mov r4=7
36: 00 00 00 02 00 00 nop\.f 0x0
3c: 00 00 20 00 rfi;;
40: 70 08 06 04 02 78 \[MIB\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2
46: 40 10 00 00 c2 01 \(p01\) mov r4=2
4c: 70 00 00 40 \(p03\) br\.cond\.sptk\.few b0 <L>
50: 11 20 1c 00 00 21 \[MIB\] mov r4=7
56: 00 00 00 02 00 00 nop\.i 0x0
5c: 00 00 20 00 rfi;;
60: 60 08 06 04 02 38 \[MII\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2
66: 30 28 18 88 e8 80 cmp\.eq\.or p3,p4=r5,r6
6c: 20 00 00 84 \(p01\) mov r4=2
70: 10 00 00 00 01 00 \[MIB\] nop\.m 0x0
76: 00 00 00 02 80 01 nop\.i 0x0
7c: 40 00 00 40 \(p03\) br\.cond\.sptk\.few b0 <L>
80: 11 20 1c 00 00 21 \[MIB\] mov r4=7
86: 00 00 00 02 00 00 nop\.i 0x0
8c: 00 00 20 00 rfi;;
90: 10 08 16 0c 42 70 \[MIB\] cmp\.ne\.and p1,p2=r5,r6
96: 40 10 00 00 c2 01 \(p01\) mov r4=2
9c: 20 00 00 40 \(p03\) br\.cond\.sptk\.few b0 <L>
a0: 11 20 1c 00 00 21 \[MIB\] mov r4=7
a6: 00 00 00 02 00 00 nop\.i 0x0
ac: 00 00 20 00 rfi;;
40: 6a 08 06 04 02 78 \[MMI\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2;;
46: 40 10 00 00 42 00 \(p01\) mov r4=2
4c: 00 00 04 00 nop\.i 0x0
50: 76 00 1c 00 00 10 \[BBB\] \(p03\) br\.cond\.sptk\.few c0 <L>
56: 00 00 00 00 10 00 nop\.b 0x0
5c: 00 00 00 20 nop\.b 0x0
60: 1d 20 1c 00 00 21 \[MFB\] mov r4=7
66: 00 00 00 02 00 00 nop\.f 0x0
6c: 00 00 20 00 rfi;;
70: 62 08 06 04 02 38 \[MII\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2
76: 30 28 18 88 e8 80 cmp\.eq\.or p3,p4=r5,r6;;
7c: 20 00 00 84 \(p01\) mov r4=2
80: 76 00 10 00 00 10 \[BBB\] \(p03\) br\.cond\.sptk\.few c0 <L>
86: 00 00 00 00 10 00 nop\.b 0x0
8c: 00 00 00 20 nop\.b 0x0
90: 1d 20 1c 00 00 21 \[MFB\] mov r4=7
96: 00 00 00 02 00 00 nop\.f 0x0
9c: 00 00 20 00 rfi;;
a0: 10 08 16 0c 42 70 \[MIB\] cmp\.ne\.and p1,p2=r5,r6
a6: 40 10 00 00 c2 01 \(p01\) mov r4=2
ac: 20 00 00 40 \(p03\) br\.cond\.sptk\.few c0 <L>
b0: 1d 20 1c 00 00 21 \[MFB\] mov r4=7
b6: 00 00 00 02 00 00 nop\.f 0x0
bc: 00 00 20 00 rfi;;

12
gas/testsuite/gas/ia64/dv-mutex.d
View File

@ -10,18 +10,18 @@ Disassembly of section \.text:
0: 20 20 08 00 00 a1 \[MII\] \(p01\) mov r4=2
6: 40 28 00 00 c2 81 \(p02\) mov r4=5
c: 70 00 00 84 \(p03\) mov r4=7
10: 11 00 00 00 01 00 \[MIB\] nop\.m 0x0
16: 00 00 00 02 00 00 nop\.i 0x0
10: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
16: 00 00 00 00 10 00 nop\.b 0x0
1c: 00 00 20 00 rfi;;
20: 0a 08 04 04 02 78 \[MMI\] cmp\.eq p1,p2=r1,r2;;
26: 40 10 00 00 42 81 \(p01\) mov r4=2
2c: 40 00 00 84 \(p02\) mov r4=4
30: 11 00 00 00 01 00 \[MIB\] nop\.m 0x0
36: 00 00 00 02 00 00 nop\.i 0x0
30: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
36: 00 00 00 00 10 00 nop\.b 0x0
3c: 00 00 20 00 rfi;;
40: 60 08 06 04 02 78 \[MII\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2
46: 40 10 00 00 42 81 \(p01\) mov r4=2
4c: 40 00 00 84 \(p02\) mov r4=4
50: 11 00 00 00 01 00 \[MIB\] nop\.m 0x0
56: 00 00 00 02 00 00 nop\.i 0x0
50: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
56: 00 00 00 00 10 00 nop\.b 0x0
5c: 00 00 20 00 rfi;;

14
gas/testsuite/gas/ia64/dv-raw-err.l
View File

@ -173,11 +173,11 @@
.*:334: Warning: This is the location of the conflicting usage
.*:341: Warning: Use of 'mov' .* RAW dependency 'PMD#' \(impliedf\)
.*:340: Warning: This is the location of the conflicting usage
.*:346: Warning: Use of 'add' .* RAW dependency 'PR%, % in 1 - 62' \(impliedf\), specific resource number is 1
.*:346: Warning: Use of 'add' .* RAW dependency 'PR%, % in 1 - 15' \(impliedf\), specific resource number is 1
.*:345: Warning: This is the location of the conflicting usage
.*:349: Warning: Use of 'add' .* RAW dependency 'PR%, % in 1 - 62' \(impliedf\), specific resource number is 2
.*:349: Warning: Use of 'add' .* RAW dependency 'PR%, % in 1 - 15' \(impliedf\), specific resource number is 2
.*:348: Warning: This is the location of the conflicting usage
.*:352: Warning: Use of 'br\.cond\.sptk' .* RAW dependency 'PR%, % in 1 - 62' \(impliedf\), specific resource number is 5
.*:352: Warning: Use of 'br\.cond\.sptk' .* RAW dependency 'PR%, % in 1 - 15' \(impliedf\), specific resource number is 5
.*:351: Warning: This is the location of the conflicting usage
.*:360: Warning: Use of 'add' .* RAW dependency 'CFM' \(impliedf\)
.*:359: Warning: This is the location of the conflicting usage
@ -269,3 +269,11 @@
.*:554: Warning: This is the location of the conflicting usage
.*:559: Warning: Use of 'mov' violates RAW dependency 'GR%, % in 1 - 127' \(impliedf\), specific resource number is 32
.*:558: Warning: This is the location of the conflicting usage
.*:564: Warning: Use of 'add' may violate RAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 21
.*:563: Warning: This is the location of the conflicting usage
.*:567: Warning: Use of 'add' may violate RAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 22
.*:566: Warning: This is the location of the conflicting usage
.*:570: Warning: Use of 'add' may violate RAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 23
.*:569: Warning: This is the location of the conflicting usage
.*:573: Warning: Use of 'br.cond.sptk' may violate RAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 25
.*:572: Warning: This is the location of the conflicting usage

20
gas/testsuite/gas/ia64/dv-raw-err.s
View File

@ -341,7 +341,7 @@
mov r2 = pmd[r3]
;;
// PR%
// PR%, 1 - 15
cmp.eq p1, p2 = r0, r1 // pr-writer/pr-reader-nobr-nomovpr
(p1) add r2 = r3, r4
;;
@ -558,4 +558,22 @@
ld8 r2 = [r32], 8
mov r8 = r32 // impliedf
;;
// PR%, 16 - 62
cmp.eq p21, p22 = r0, r1 // pr-writer/pr-reader-nobr-nomovpr
(p21) add r2 = r3, r4
;;
mov pr = r5, 0x1ffff // mov-to-pr-allreg/pr-reader-nobr-nomovpr
(p22) add r6 = r7, r8
;;
mov pr.rot = 0xffff0000 // mov-to-pr-rotreg/pr-reader-nobr-nomovpr
(p23) add r9 = r10, r11
;;
fcmp.eq p25, p26 = f2, f3 // pr-writer-fp/pr-reader-br
(p25) br.cond.sptk b0
;;
cmp.eq p27, p28 = r11, r12
(p27) br.cond.sptk b1 // no DV here
;;
L:

12
gas/testsuite/gas/ia64/dv-safe.d
View File

@ -10,12 +10,12 @@ Disassembly of section \.text:
0: 02 08 04 04 02 38 \[MII\] cmp\.eq p1,p2=r1,r2
6: 30 18 10 08 70 00 cmp\.eq p3,p4=r3,r4;;
c: 00 00 04 00 nop\.i 0x0
10: 10 00 00 00 01 00 \[MIB\] nop\.m 0x0
16: 00 00 00 02 80 21 nop\.i 0x0
1c: 30 00 00 50 \(p03\) br\.call\.sptk\.few b1=40 <L>
10: 76 08 0c 00 00 14 \[BBB\] \(p03\) br\.call\.sptk\.few b1=40 <L>
16: 00 00 00 00 10 00 nop\.b 0x0
1c: 00 00 00 20 nop\.b 0x0
20: 20 20 08 00 00 a1 \[MII\] \(p01\) mov r4=2
26: 40 28 00 00 c2 a1 \(p02\) mov r4=5
2c: 00 30 00 84 \(p03\) mov r5=r6
30: 81 28 00 0e 00 21 \[MII\] \(p04\) mov r5=r7
36: 00 00 00 02 00 00 nop\.i 0x0
3c: 00 00 04 00 nop\.i 0x0;;
30: 9d 28 00 0e 00 21 \[MFB\] \(p04\) mov r5=r7
36: 00 00 00 02 00 00 nop\.f 0x0
3c: 00 00 00 20 nop\.b 0x0;;

12
gas/testsuite/gas/ia64/dv-srlz.d
View File

@ -10,15 +10,15 @@ Disassembly of section \.text:
0: 0a 00 00 02 34 04 \[MMI\] ptc\.e r1;;
6: 00 00 00 60 00 00 srlz\.d
c: 00 00 04 00 nop\.i 0x0
10: 11 00 00 00 18 10 \[MIB\] ld8 r0=\[r0\]
16: 00 00 00 02 00 00 nop\.i 0x0
10: 1d 00 00 00 18 10 \[MFB\] ld8 r0=\[r0\]
16: 00 00 00 02 00 00 nop\.f 0x0
1c: 00 00 20 00 rfi;;
20: 0b 00 00 02 34 04 \[MMI\] ptc\.e r1;;
26: 00 00 00 62 00 00 srlz\.i
2c: 00 00 04 00 nop\.i 0x0;;
30: 13 00 00 00 01 00 \[MBB\] nop\.m 0x0
36: 00 00 00 20 00 00 epc
30: 17 00 00 00 10 00 \[BBB\] epc
36: 00 00 00 00 10 00 nop\.b 0x0
3c: 00 00 00 20 nop\.b 0x0;;
40: 11 00 00 00 01 00 \[MIB\] nop\.m 0x0
46: 00 00 00 02 00 00 nop\.i 0x0
40: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
46: 00 00 00 00 10 00 nop\.b 0x0
4c: 00 00 20 00 rfi;;

2
gas/testsuite/gas/ia64/dv-war-err.l
View File

@ -1,3 +1,3 @@
.*: Assembler messages:
.*:8: Warning: Use of 'br.wtop.sptk' .* WAR dependency 'PR63' \(impliedf\)
.*:8: Warning: Use of 'br.wtop.sptk' .* WAR dependency 'PR63' \(stop\)
.*:7: Warning: This is the location of the conflicting usage

72
gas/testsuite/gas/ia64/dv-waw-err.l
View File

@ -213,17 +213,17 @@
.*:321: Warning: This is the location of the conflicting usage
.*:327: Warning: Use of 'mov' .* WAW dependency 'PMD#' \(impliedf\)
.*:326: Warning: This is the location of the conflicting usage
.*:332: Warning: Use of 'cmp\.eq' .* WAW dependency 'PR%, % in 1 - 62' \(impliedf\), specific resource number is 1
.*:332: Warning: Use of 'cmp\.eq' .* WAW dependency 'PR%, % in 1 - 15' \(impliedf\), specific resource number is 1
.*:331: Warning: This is the location of the conflicting usage
.*:332: Warning: Use of 'cmp\.eq' .* WAW dependency 'PR%, % in 1 - 62' \(impliedf\), specific resource number is 1
.*:332: Warning: Use of 'cmp\.eq' .* WAW dependency 'PR%, % in 1 - 15' \(impliedf\), specific resource number is 1
.*:331: Warning: This is the location of the conflicting usage
.*:335: Warning: Use of 'fcmp\.eq' .* WAW dependency 'PR%, % in 1 - 62' \(impliedf\), specific resource number is 1
.*:335: Warning: Use of 'fcmp\.eq' .* WAW dependency 'PR%, % in 1 - 15' \(impliedf\), specific resource number is 1
.*:334: Warning: This is the location of the conflicting usage
.*:335: Warning: Use of 'fcmp\.eq' .* WAW dependency 'PR%, % in 1 - 62' \(impliedf\), specific resource number is 1
.*:335: Warning: Use of 'fcmp\.eq' .* WAW dependency 'PR%, % in 1 - 15' \(impliedf\), specific resource number is 1
.*:334: Warning: This is the location of the conflicting usage
.*:338: Warning: Use of 'cmp\.eq\.or' .* WAW dependency 'PR%, % in 1 - 62' \(impliedf\), specific resource number is 1
.*:338: Warning: Use of 'cmp\.eq\.or' .* WAW dependency 'PR%, % in 1 - 15' \(impliedf\), specific resource number is 1
.*:337: Warning: This is the location of the conflicting usage
.*:341: Warning: Use of 'cmp\.eq\.and' .* WAW dependency 'PR%, % in 1 - 62' \(impliedf\), specific resource number is 1
.*:341: Warning: Use of 'cmp\.eq\.and' .* WAW dependency 'PR%, % in 1 - 15' \(impliedf\), specific resource number is 1
.*:340: Warning: This is the location of the conflicting usage
.*:352: Warning: Use of 'br\.wtop\.sptk' .* RAW dependency 'AR\[EC\]' \(impliedf\)
.*:351: Warning: This is the location of the conflicting usage
@ -351,27 +351,39 @@
.*:507: Warning: This is the location of the conflicting usage
.*:513: Warning: Use of 'mov' .* WAW dependency 'RR#' \(impliedf\), specific resource number is 7
.*:512: Warning: This is the location of the conflicting usage
.*:537: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
.*:536: Warning: This is the location of the conflicting usage
.*:537: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
.*:536: Warning: This is the location of the conflicting usage
.*:537: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
.*:536: Warning: This is the location of the conflicting usage
.*:537: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
.*:536: Warning: This is the location of the conflicting usage
.*:540: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
.*:539: Warning: This is the location of the conflicting usage
.*:540: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
.*:539: Warning: This is the location of the conflicting usage
.*:540: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
.*:539: Warning: This is the location of the conflicting usage
.*:540: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
.*:539: Warning: This is the location of the conflicting usage
.*:543: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
.*:542: Warning: This is the location of the conflicting usage
.*:543: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
.*:542: Warning: This is the location of the conflicting usage
.*:543: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
.*:542: Warning: This is the location of the conflicting usage
.*:543: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
.*:542: Warning: This is the location of the conflicting usage
.*:536: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
.*:535: Warning: This is the location of the conflicting usage
.*:536: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
.*:535: Warning: This is the location of the conflicting usage
.*:536: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
.*:535: Warning: This is the location of the conflicting usage
.*:536: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
.*:535: Warning: This is the location of the conflicting usage
.*:539: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
.*:538: Warning: This is the location of the conflicting usage
.*:539: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 7
.*:538: Warning: This is the location of the conflicting usage
.*:539: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
.*:538: Warning: This is the location of the conflicting usage
.*:539: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
.*:538: Warning: This is the location of the conflicting usage
.*:542: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
.*:541: Warning: This is the location of the conflicting usage
.*:542: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR%.*' \(impliedf\), specific resource number is 6
.*:541: Warning: This is the location of the conflicting usage
.*:542: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
.*:541: Warning: This is the location of the conflicting usage
.*:542: Warning: Use of 'cmp.eq.and.orcm' .* WAW .* 'PR63' \(impliedf\)
.*:541: Warning: This is the location of the conflicting usage
.*:547: Warning: Use of 'cmp.eq' violates WAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 21
.*:546: Warning: This is the location of the conflicting usage
.*:547: Warning: Use of 'cmp.eq' violates WAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 21
.*:546: Warning: This is the location of the conflicting usage
.*:550: Warning: Use of 'fcmp.eq' violates WAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 21
.*:549: Warning: This is the location of the conflicting usage
.*:550: Warning: Use of 'fcmp.eq' violates WAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 21
.*:549: Warning: This is the location of the conflicting usage
.*:553: Warning: Use of 'cmp.eq.or' violates WAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 21
.*:552: Warning: This is the location of the conflicting usage
.*:556: Warning: Use of 'cmp.eq.and' violates WAW dependency 'PR%, % in 16 - 62' \(impliedf\), specific resource number is 21
.*:555: Warning: This is the location of the conflicting usage

30
gas/testsuite/gas/ia64/dv-waw-err.s
View File

@ -327,7 +327,7 @@
mov pmd[r4] = r1
;;
// PR%
// PR%, 1 - 15
cmp.eq p1, p0 = r0, r1
cmp.eq p1, p0 = r2, r3
;;
@ -512,8 +512,7 @@
mov rr[r2] = r1
mov rr[r2] = r3
;;
// RSE
// PR, additional cases (or.andcm and and.orcm interaction)
cmp.eq.or.andcm p6, p7 = 1, r32
cmp.eq.or.andcm p6, p7 = 5, r36 // no DV here
@ -542,4 +541,27 @@
cmp.eq.or.andcm p6, p63 = 1, r32
cmp.eq.and.orcm p6, p63 = 5, r36
;;
L:
// PR%, 16 - 62
cmp.eq p21, p0 = r0, r1
cmp.eq p21, p0 = r2, r3
;;
fcmp.eq p21, p22 = f2, f3
fcmp.eq p21, p23 = f2, f3
;;
cmp.eq.and p21, p22 = r0, r1
cmp.eq.or p21, p23 = r2, r3
;;
cmp.eq.or p21, p23 = r2, r3
cmp.eq.and p21, p22 = r0, r1
;;
cmp.eq.and p21, p22 = r0, r1
cmp.eq.and p21, p23 = r2, r3 // no DV here
;;
cmp.eq.or p21, p22 = r0, r1
cmp.eq.or p21, p23 = r2, r3 // no DV here
;;
// RSE
L:

1592
gas/testsuite/gas/ia64/opc-f.d
View File

File diff suppressed because it is too large Load Diff

6
gas/testsuite/gas/ia64/opc-i.d
View File

@ -219,9 +219,9 @@ Disassembly of section \.text:
460: 00 00 00 00 01 00 \[MII\] nop\.m 0x0
466: 30 08 10 84 2c 60 tnat\.z\.or\.andcm p3,p2=r4
46c: 40 88 08 07 mov b3=r4
470: 01 00 00 00 01 00 \[MII\] nop\.m 0x0
476: 30 20 24 84 03 00 mov\.imp b3=r4,570 <_start\+0x570>
47c: 00 00 04 00 nop\.i 0x0;;
470: 0d 00 00 00 01 00 \[MFI\] nop\.m 0x0
476: 00 00 00 02 00 60 nop\.f 0x0
47c: 40 48 08 07 mov\.imp b3=r4,570 <_start\+0x570>;;
\.\.\.
570: 01 00 00 00 01 00 \[MII\] nop\.m 0x0
576: 30 20 00 84 03 60 mov\.sptk b3=r4,670 <_start\+0x670>

1728
gas/testsuite/gas/ia64/opc-m.d
View File

File diff suppressed because it is too large Load Diff

4
include/opcode/ChangeLog
View File

@ -1,3 +1,7 @@
2000-09-22 Jim Wilson <wilson@cygnus.com>
* ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
2000-09-13 Anders Norlander <anorland@acc.umu.se>
* mips.h: Use defines instead of hard-coded processor numbers.

4
include/opcode/ia64.h
View File

@ -152,6 +152,7 @@ enum ia64_dependency_semantics
IA64_DVS_DATA,
IA64_DVS_INSTR,
IA64_DVS_SPECIFIC,
IA64_DVS_STOP,
IA64_DVS_OTHER,
};
@ -179,7 +180,8 @@ enum ia64_resource_specifier
IA64_RS_PKR,
IA64_RS_PMC,
IA64_RS_PMD,
IA64_RS_PR,
IA64_RS_PR, /* non-rotating, 1-15 */
IA64_RS_PRr, /* rotating, 16-62 */
IA64_RS_PR63,
IA64_RS_RR,

8
opcodes/ChangeLog
View File

@ -1,3 +1,11 @@
2000-09-22 Jim Wilson <wilson@cygnus.com>
* ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change.
* ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP.
(lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62".
* ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update.
* ia64-asmtab.c: Regnerate.
2000-09-13 Anders Norlander <anorland@acc.umu.se>
* mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores.

5258
opcodes/ia64-asmtab.c
View File

File diff suppressed because it is too large Load Diff

2
opcodes/ia64-dis.c
View File

@ -117,7 +117,7 @@ print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info)
{
/* skip L slot in MLI template: */
slotnum = 2;
retval = 16 - slot_multiplier;
retval += slot_multiplier;
}
insn = slot[slotnum];

6
opcodes/ia64-gen.c
View File

@ -697,6 +697,8 @@ parse_semantics (char *sem)
return IA64_DVS_INSTR;
else if (strcmp (sem, "specific") == 0)
return IA64_DVS_SPECIFIC;
else if (strcmp (sem, "stop") == 0)
return IA64_DVS_STOP;
else
return IA64_DVS_OTHER;
}
@ -1332,8 +1334,10 @@ lookup_specifier (const char *name)
return IA64_RS_FRb;
if (strstr (name, "GR%") != NULL)
return IA64_RS_GR;
if (strstr (name, "PR%") != NULL)
if (strstr (name, "PR%, % in 1 ") != NULL)
return IA64_RS_PR;
if (strstr (name, "PR%, % in 16 ") != NULL)
return IA64_RS_PRr;
fprintf (stderr, "Warning! Don't know how to specify %% dependency %s\n",
name);

7
opcodes/ia64-ic.tbl
View File

@ -24,7 +24,7 @@ fr-readers; IC:fp-arith, IC:fp-non-arith, IC:pr-writers-fp, chk.s[Format in {M21
fr-writers; IC:fp-arith, IC:fp-non-arith\fclass, IC:mem-readers-fp
gr-readers; IC:gr-readers-writers, IC:mem-readers, IC:mem-writers, chk.s, cmp, cmp4, fc, itc.i, itc.d, itr.i, itr.d, IC:mov-to-AR-gr, IC:mov-to-BR, IC:mov-to-CR, IC:mov-to-IND, IC:mov-from-IND, IC:mov-to-PR-allreg, IC:mov-to-PSR-l, IC:mov-to-PSR-um, IC:probe-all, ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, setf, tbit, tnat
gr-readers-writers; IC:mov-from-IND, add, addl, addp4, adds, and, andcm, IC:czx, dep\dep[Format in {I13}], extr, IC:mem-readers-int, IC:ld-all-postinc, IC:lfetch-postinc, IC:mix, IC:mux, or, IC:pack, IC:padd, IC:pavg, IC:pavgsub, IC:pcmp, IC:pmax, IC:pmin, IC:pmpy, IC:pmpyshr, popcnt, IC:probe-nofault, IC:psad, IC:pshl, IC:pshladd, IC:pshr, IC:pshradd, IC:psub, shl, shladd, shladdp4, shr, shrp, IC:st-postinc, sub, IC:sxt, tak, thash, tpa, ttag, IC:unpack, xor, IC:zxt
gr-writers; alloc, dep, getf, IC:gr-readers-writers, IC:mem-readers-int, IC:mov-from-AR, IC:mov-from-BR, IC:mov-from-CR, IC:mov-from-PR, IC:mov-immediate, IC:mov-from-PSR, IC:mov-from-PSR-um, IC:mov-ip, movl
gr-writers; alloc, dep, getf, IC:gr-readers-writers, IC:mem-readers-int, IC:mov-from-AR, IC:mov-from-BR, IC:mov-from-CR, IC:mov-from-PR, IC:mov-from-PSR, IC:mov-from-PSR-um, IC:mov-ip, movl
indirect-brp; brp[Format in {B7}]
indirect-brs; br.call[Format in {B5}], br.cond[Format in {B4}], br.ia, br.ret
invala-all; invala[Format in {M24}], invala.e
@ -124,7 +124,6 @@ mov-from-IND-RR; IC:mov-from-IND[Field(ireg) == rr]
mov-from-PR; mov_pr[Format in {I25}]
mov-from-PSR; mov_psr[Format in {M36}]
mov-from-PSR-um; mov_um[Format in {M36}]
mov-immediate; addl[Format in {A5}]
mov-ip; mov_ip[Format in {I25}]
mov-to-AR; IC:mov-to-AR-M, IC:mov-to-AR-I
mov-to-AR-BSP; IC:mov-to-AR-M[Field(ar3) == BSP]
@ -201,7 +200,7 @@ pr-gen-writers-int; cmp, cmp4, tbit, tnat
pr-norm-writers-fp; IC:pr-gen-writers-fp[Field(ctype)==]
pr-norm-writers-int; IC:pr-gen-writers-int[Field(ctype)==]
pr-or-writers; IC:pr-gen-writers-int[Field(ctype) in {or orcm}], IC:pr-gen-writers-int[Field(ctype) in {or.andcm and.orcm}]
pr-readers-br; br.call, br.cond, brl.call, brl.cond, br.ret, br.wexit, br.wtop, break.b, break, nop.b, nop, IC:ReservedBQP
pr-readers-br; br.call, br.cond, brl.call, brl.cond, br.ret, br.wexit, br.wtop, break.b, nop.b, IC:ReservedBQP
pr-readers-nobr-nomovpr; add, addl, addp4, adds, and, andcm, break.f, break.i, break.m, break.x, chk.s, IC:chk-a, cmp, cmp4, IC:cmpxchg, IC:czx, dep, extr, IC:fp-arith, IC:fp-non-arith, fc, fchkf, fclrf, fcmp, IC:fetchadd, fpcmp, fsetc, fwb, getf, IC:invala-all, itc.i, itc.d, itr.i, itr.d, IC:ld, IC:ldf, IC:ldfp, IC:lfetch-all, mf, IC:mix, IC:mov-from-AR-M, IC:mov-from-AR-IM, IC:mov-from-AR-I, IC:mov-to-AR-M, IC:mov-to-AR-I, IC:mov-to-AR-IM, IC:mov-to-BR, IC:mov-from-BR, IC:mov-to-CR, IC:mov-from-CR, IC:mov-to-IND, IC:mov-from-IND, IC:mov-ip, IC:mov-to-PSR-l, IC:mov-to-PSR-um, IC:mov-from-PSR, IC:mov-from-PSR-um, movl, IC:mux, nop.f, nop.i, nop.m, nop.x, or, IC:pack, IC:padd, IC:pavg, IC:pavgsub, IC:pcmp, IC:pmax, IC:pmin, IC:pmpy, IC:pmpyshr, popcnt, IC:probe-all, IC:psad, IC:pshl, IC:pshladd, IC:pshr, IC:pshradd, IC:psub, ptc.e, ptc.g, ptc.ga, ptc.l, ptr.d, ptr.i, IC:ReservedQP, rsm, setf, shl, shladd, shladdp4, shr, shrp, srlz.i, srlz.d, ssm, IC:st, IC:stf, sub, sum, IC:sxt, sync, tak, tbit, thash, tnat, tpa, ttag, IC:unpack, IC:xchg, xma, xmpy, xor, IC:zxt
pr-unc-writers-fp; IC:pr-gen-writers-fp[Field(ctype)==unc]+11, fprcpa+11, fprsqrta+11, frcpa+11, frsqrta+11
pr-unc-writers-int; IC:pr-gen-writers-int[Field(ctype)==unc]+11
@ -229,7 +228,7 @@ stf; stfs, stfd, stfe, stf8, stf.spill
sxt; sxt1, sxt2, sxt4
sys-mask-writers-partial; rsm, ssm
unpack; unpack1, unpack2, unpack4
unpredicatable-instructions; alloc, br.cloop, br.ctop, br.cexit, brp, bsw, clrrrb, cover, epc, flushrs, loadrs, rfi
unpredicatable-instructions; alloc, br.cloop, br.ctop, br.cexit, br.ia, brp, bsw, clrrrb, cover, epc, flushrs, loadrs, rfi
user-mask-writers-partial; rum, sum
xchg; xchg1, xchg2, xchg4, xchg8
zxt; zxt1, zxt2, zxt4

17
opcodes/ia64-raw.tbl
View File

@ -53,7 +53,7 @@ CR[IPSR]; IC:mov-to-CR-IPSR; rfi; implied
CR[IRR%], % in 0 - 3; IC:mov-from-CR-IVR; IC:mov-from-CR-IRR+1; data
CR[ISR]; IC:mov-to-CR-ISR; IC:mov-from-CR-ISR; data
CR[ITIR]; IC:mov-to-CR-ITIR; IC:mov-from-CR-ITIR; data
CR[ITIR]; IC:mov-to-CR-ITIR; itc.i, itc.d, itr.i, itc.d; implied
CR[ITIR]; IC:mov-to-CR-ITIR; itc.i, itc.d, itr.i, itr.d; implied
CR[ITM]; IC:mov-to-CR-ITM; IC:mov-from-CR-ITM; data
CR[ITV]; IC:mov-to-CR-ITV; IC:mov-from-CR-ITV; data
CR[IVA]; IC:mov-to-CR-IVA; IC:mov-from-CR-IVA; instr
@ -80,7 +80,7 @@ DTR; ptr.d; itr.d, itc.d; impliedF
FR%, % in 0 - 1; IC:none; IC:fr-readers+1; none
FR%, % in 2 - 127; IC:fr-writers+1\IC:ldf-c+1\IC:ldfp-c+1; IC:fr-readers+1; impliedF
FR%, % in 2 - 127; IC:ldf-c+1, IC:ldfp-c+1; IC:fr-readers+1; none
GR0; IC:none; IC:gr-readers+1, IC:mov-immediate; none
GR0; IC:none; IC:gr-readers+1; none
GR%, % in 1 - 127; IC:ld-c+1+13; IC:gr-readers+1; none
GR%, % in 1 - 127; IC:gr-writers+1\IC:ld-c+1+13; IC:gr-readers+1; impliedF
IBR#; IC:mov-to-IND-IBR+3; IC:mov-from-IND-IBR+3; impliedF
@ -108,11 +108,14 @@ PKR#; IC:mov-to-IND-PKR+3; IC:mov-to-IND-PKR+3; impliedF
PMC#; IC:mov-to-IND-PMC+3; IC:mov-from-IND-PMC+3; impliedF
PMC#; IC:mov-to-IND-PMC+3; IC:mov-from-IND-PMD+3; SC+3 Section 12.1.1
PMD#; IC:mov-to-IND-PMD+3; IC:mov-from-IND-PMD+3; impliedF
PR0; IC:pr-writers+1; IC:pr-readers-br+1, IC:pr-readers-nobr-nomovpr+1 , IC:mov-from-PR+12, IC:mov-to-PR+12; none
PR%, % in 1 - 62; IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-nobr-nomovpr+1 , IC:mov-from-PR, IC:mov-to-PR+12; impliedF
PR%, % in 1 - 62; IC:pr-writers-fp+1; IC:pr-readers-br+1; impliedF
PR%, % in 1 - 62; IC:pr-writers-int+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-br+1; none
PR63; IC:mod-sched-brs, IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-nobr-nomovpr+1 , IC:mov-from-PR, IC:mov-to-PR+12; impliedF
PR0; IC:pr-writers+1; IC:pr-readers-br+1, IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR+12, IC:mov-to-PR+12; none
PR%, % in 1 - 15; IC:pr-writers+1, IC:mov-to-PR-allreg+7; IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12; impliedF
PR%, % in 1 - 15; IC:pr-writers-fp+1; IC:pr-readers-br+1; impliedF
PR%, % in 1 - 15; IC:pr-writers-int+1, IC:mov-to-PR-allreg+7; IC:pr-readers-br+1; none
PR%, % in 16 - 62; IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12; impliedF
PR%, % in 16 - 62; IC:pr-writers-fp+1; IC:pr-readers-br+1; impliedF
PR%, % in 16 - 62; IC:pr-writers-int+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-br+1; none
PR63; IC:mod-sched-brs, IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12; impliedF
PR63; IC:pr-writers-fp+1, IC:mod-sched-brs; IC:pr-readers-br+1; impliedF
PR63; IC:pr-writers-int+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-br+1; none
PSR.ac; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um; IC:mem-readers, IC:mem-writers; implied

4
opcodes/ia64-war.tbl
View File

@ -1,2 +1,2 @@
Resource Name; Readers; Writers; Results of Dependency
PR63; IC:pr-readers-br+1; IC:mod-sched-brs; impliedF
Resource Name; Readers; Writers; Semantics of Dependency
PR63; IC:pr-readers-br+1; IC:mod-sched-brs; stop

11
opcodes/ia64-waw.tbl
View File

@ -82,12 +82,15 @@ PKR#; IC:mov-to-IND-PKR+3; IC:mov-to-IND-PKR+3; impliedF
PMC#; IC:mov-to-IND-PMC+3; IC:mov-to-IND-PMC+3; impliedF
PMD#; IC:mov-to-IND-PMD+3; IC:mov-to-IND-PMD+3; impliedF
PR0; IC:pr-writers+1; IC:pr-writers+1; none
PR%, % in 1 - 62; IC:pr-and-writers+1; IC:pr-and-writers+1; none
PR%, % in 1 - 62; IC:pr-or-writers+1; IC:pr-or-writers+1; none
PR%, % in 1 - 62; IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-and-writers+1, IC:mov-to-PR+7; IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-or-writers+1, IC:mov-to-PR+7; impliedF
PR%, % in 1 - 15; IC:pr-and-writers+1; IC:pr-and-writers+1; none
PR%, % in 1 - 15; IC:pr-or-writers+1; IC:pr-or-writers+1; none
PR%, % in 1 - 15; IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-and-writers+1, IC:mov-to-PR-allreg+7; IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-or-writers+1, IC:mov-to-PR-allreg+7; impliedF
PR%, % in 16 - 62; IC:pr-and-writers+1; IC:pr-and-writers+1; none
PR%, % in 16 - 62; IC:pr-or-writers+1; IC:pr-or-writers+1; none
PR%, % in 16 - 62; IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-and-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-or-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; impliedF
PR63; IC:pr-and-writers+1; IC:pr-and-writers+1; none
PR63; IC:pr-or-writers+1; IC:pr-or-writers+1; none
PR63; IC:mod-sched-brs, IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-and-writers+1, IC:mov-to-PR+7; IC:mod-sched-brs, IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-or-writers+1, IC:mov-to-PR+7; impliedF
PR63; IC:mod-sched-brs, IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-and-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:mod-sched-brs, IC:pr-unc-writers-fp+1, IC:pr-unc-writers-int+1, IC:pr-norm-writers-fp+1, IC:pr-norm-writers-int+1, IC:pr-or-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; impliedF
PSR.ac; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; impliedF
PSR.be; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; impliedF
PSR.bn; bsw, rfi; bsw, rfi; impliedF