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Add missing Cpu flags in bd and bt cores
gas/testsuite/ 2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com> * gas/i386/arch-10-bdver1.d: New file to test bdver1 core. * gas/i386/x86-64-arch-2-bdver1.d: Likewise. * gas/i386/i386.exp: Run bdver1 testcases. * gas/i386/arch-10-bdver2.d: Updated -march flags. * gas/i386/arch-10-btver1.d: Likewise. * gas/i386/arch-10-btver2.d: Likewise. * gas/i386/x86-64-arch-2-bdver2.d: Likewise. * gas/i386/x86-64-arch-2-btver1.d: Likewise. * gas/i386/x86-64-arch-2-btver2.d: Likewise. opcodes/ 2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com> * gas/i386/arch-10-bdver1.d: New file to test bdver1 core. * gas/i386/x86-64-arch-2-bdver1.d: Likewise. * gas/i386/i386.exp: Run bdver1 testcases. * gas/i386/arch-10-bdver2.d: Updated -march flags. * gas/i386/arch-10-btver1.d: Likewise. * gas/i386/arch-10-btver2.d: Likewise. * gas/i386/x86-64-arch-2-bdver2.d: Likewise. * gas/i386/x86-64-arch-2-btver1.d: Likewise. * gas/i386/x86-64-arch-2-btver2.d: Likewise.
This commit is contained in:
H.J. Lu
parent
744a805904
commit
160a30bb92
@ -1,3 +1,15 @@
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2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
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* gas/i386/arch-10-bdver1.d: New file to test bdver1 core.
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* gas/i386/x86-64-arch-2-bdver1.d: Likewise.
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* gas/i386/i386.exp: Run bdver1 testcases.
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* gas/i386/arch-10-bdver2.d: Updated -march flags.
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* gas/i386/arch-10-btver1.d: Likewise.
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* gas/i386/arch-10-btver2.d: Likewise.
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* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
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* gas/i386/x86-64-arch-2-btver1.d: Likewise.
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* gas/i386/x86-64-arch-2-btver2.d: Likewise.
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2012-09-23 Maciej W. Rozycki <macro@codesourcery.com>
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* gas/mips/hilo-diff-eb.d: New test.
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42
gas/testsuite/gas/i386/arch-10-bdver1.d
Normal file
42
gas/testsuite/gas/i386/arch-10-bdver1.d
Normal file
@ -0,0 +1,42 @@
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#source: arch-10.s
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#as: -march=bdver1+vmx+smx+xsaveopt+fma+movbe+ept+padlock+bmi+tbm
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#objdump: -dw
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#name: i386 arch 10 (bdver1)
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.*: file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
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[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
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[ ]*[a-f0-9]+: 0f 05 syscall
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[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
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[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
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[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
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[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
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[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
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[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
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[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
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[ ]*[a-f0-9]+: c5 fc 77 vzeroall
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[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
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[ ]*[a-f0-9]+: 0f 37 getsec
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[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
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[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
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[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
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[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
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[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
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[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
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[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
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[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
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[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
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[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
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[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
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[ ]*[a-f0-9]+: 0f 01 da vmload
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[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
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[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
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[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
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[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
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[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
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#pass
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@ -1,5 +1,5 @@
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#source: arch-10.s
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#as: -march=bdver2+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+clflush+svme+padlock+prfchw
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#as: -march=bdver2+vmx+smx+xsaveopt+movbe+ept+padlock
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#objdump: -dw
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#name: i386 arch 10 (bdver2)
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@ -1,5 +1,5 @@
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#source: arch-10.s
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#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+clflush+svme+padlock+fma+bmi+tbm
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#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+padlock+fma+bmi+tbm
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#objdump: -dw
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#name: i386 arch 10 (btver1)
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@ -1,5 +1,5 @@
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#source: arch-10.s
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#as: -march=btver2+smx+vmx+ept+clflush+svme+padlock+fma+tbm
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#as: -march=btver2+smx+vmx+ept+padlock+fma+tbm
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#objdump: -dw
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#name: i386 arch 10 (btver2)
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@ -129,6 +129,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
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run_dump_test "arch-10"
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run_dump_test "arch-10-lzcnt"
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run_dump_test "arch-10-prefetchw"
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run_dump_test "arch-10-bdver1"
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run_dump_test "arch-10-bdver2"
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run_dump_test "arch-10-btver1"
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run_dump_test "arch-10-btver2"
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@ -396,6 +397,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-arch-2"
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run_dump_test "x86-64-arch-2-lzcnt"
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run_dump_test "x86-64-arch-2-prefetchw"
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run_dump_test "x86-64-arch-2-bdver1"
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run_dump_test "x86-64-arch-2-bdver2"
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run_dump_test "x86-64-arch-2-btver1"
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run_dump_test "x86-64-arch-2-btver2"
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42
gas/testsuite/gas/i386/x86-64-arch-2-bdver1.d
Normal file
42
gas/testsuite/gas/i386/x86-64-arch-2-bdver1.d
Normal file
@ -0,0 +1,42 @@
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#source: x86-64-arch-2.s
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#as: -march=bdver1+vmx+smx+xsaveopt+fma+movbe+ept+padlock+bmi+tbm
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#objdump: -dw
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#name: x86-64 arch 2 (bdver1)
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.*: file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
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[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
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[ ]*[a-f0-9]+: 0f 05 syscall
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[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
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[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
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[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
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[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
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[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
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[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
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[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
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[ ]*[a-f0-9]+: c5 fc 77 vzeroall
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[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
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[ ]*[a-f0-9]+: 0f 37 getsec
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[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
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[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
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[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
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[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%rcx\),%xmm0,%xmm2
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[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
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[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
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[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
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[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
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[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
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[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
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[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
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[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
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[ ]*[a-f0-9]+: 0f 01 da vmload
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[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
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[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
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[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
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[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
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#pass
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@ -1,5 +1,5 @@
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#source: x86-64-arch-2.s
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#as: -march=bdver2+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+cx16+ept+clflush+svme+padlock+prfchw
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#as: -march=bdver2+vmx+smx+xsaveopt+movbe+ept+padlock
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#objdump: -dw
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#name: x86-64 arch 2 (bdver2)
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@ -1,5 +1,5 @@
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#source: x86-64-arch-2.s
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#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+cx16+ept+clflush+svme+padlock+fma+bmi+tbm
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#as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+padlock+fma+bmi+tbm
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#objdump: -dw
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#name: x86-64 arch 2 (btver1)
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@ -1,5 +1,5 @@
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#source: x86-64-arch-2.s
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#as: -march=btver2+smx+vmx+ept+clflush+svme+padlock+fma+tbm
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#as: -march=btver2+smx+vmx+ept+padlock+fma+tbm
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#objdump: -dw
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#name: x86-64 arch 2 (btver2)
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@ -1,3 +1,10 @@
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2012-09-25 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
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* i386-gen.c (cpu_flag_init): Add missing Cpu flags in
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CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
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and CPU_BTVER2_FLAGS.
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* i386-init.h: Regenerated.
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2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
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* i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
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@ -89,13 +89,13 @@ static initializer cpu_flag_init[] =
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{ "CPU_AMDFAM10_FLAGS",
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
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{ "CPU_BDVER1_FLAGS",
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuCX16" },
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
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{ "CPU_BDVER2_FLAGS",
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16" },
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
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{ "CPU_BTVER1_FLAGS",
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16" },
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
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{ "CPU_BTVER2_FLAGS",
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuSSE4_1|CpuSSE4_2|CpuABM|CpuLM|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW|CpuCX16" },
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"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuSSE4_1|CpuSSE4_2|CpuABM|CpuLM|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
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{ "CPU_8087_FLAGS",
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"Cpu8087" },
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{ "CPU_287_FLAGS",
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@ -158,27 +158,27 @@
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0, 0, 0 } }
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#define CPU_BDVER1_FLAGS \
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{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
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0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
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1, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
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{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
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0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, \
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1, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, \
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0, 0, 0 } }
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#define CPU_BDVER2_FLAGS \
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{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
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0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
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1, 1, 1, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
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{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
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0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, \
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1, 1, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, \
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0, 0, 0 } }
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#define CPU_BTVER1_FLAGS \
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{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 1, \
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0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
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{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
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0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, \
|
||||
0, 0, 0 } }
|
||||
|
||||
#define CPU_BTVER2_FLAGS \
|
||||
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 1, \
|
||||
0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, \
|
||||
0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, \
|
||||
{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
|
||||
0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, \
|
||||
0, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, \
|
||||
0, 0, 0 } }
|
||||
|
||||
#define CPU_8087_FLAGS \
|
||||
|
||||
Loading…
Reference in New Issue
Block a user