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https://github.com/darlinghq/darling-gdb.git
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2006-07-18 Paul Brook <paul@codesourcery.com>
bfd/ * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_ARM_T32_ADD_IMM. gas/ * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC. (md_convert_frag): Use correct reloc for add_pc. Use BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum. (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM. (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM. gas/testsuite/ * gas/arm/thumb2_add.d: New test. * gas/arm/thumb2_add.s: New test.
This commit is contained in:
Paul Brook
parent
2f2760a39d
commit
16805f35a3
@ -1,3 +1,9 @@
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2006-07-18 Paul Brook <paul@codesourcery.com>
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* bfd-in2.h: Regenerate.
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* libbfd.h: Regenerate.
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* reloc.c: Add BFD_RELOC_ARM_T32_ADD_IMM.
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2006-07-18 Nick Clifton <nickc@redhat.com>
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* elfxx-mips.c (_bfd_mips_elf_common_definition): New function.
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@ -2966,6 +2966,7 @@ pc-relative or some form of GOT-indirect relocation. */
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BFD_RELOC_ARM_IMMEDIATE,
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BFD_RELOC_ARM_ADRL_IMMEDIATE,
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BFD_RELOC_ARM_T32_IMMEDIATE,
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BFD_RELOC_ARM_T32_ADD_IMM,
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BFD_RELOC_ARM_T32_IMM12,
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BFD_RELOC_ARM_T32_ADD_PC12,
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BFD_RELOC_ARM_SHIFT_IMM,
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@ -1263,6 +1263,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
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"BFD_RELOC_ARM_IMMEDIATE",
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"BFD_RELOC_ARM_ADRL_IMMEDIATE",
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"BFD_RELOC_ARM_T32_IMMEDIATE",
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"BFD_RELOC_ARM_T32_ADD_IMM",
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"BFD_RELOC_ARM_T32_IMM12",
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"BFD_RELOC_ARM_T32_ADD_PC12",
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"BFD_RELOC_ARM_SHIFT_IMM",
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@ -2821,6 +2821,8 @@ ENUMX
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BFD_RELOC_ARM_ADRL_IMMEDIATE
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ENUMX
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BFD_RELOC_ARM_T32_IMMEDIATE
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ENUMX
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BFD_RELOC_ARM_T32_ADD_IMM
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ENUMX
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BFD_RELOC_ARM_T32_IMM12
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ENUMX
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@ -1,3 +1,11 @@
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2006-07-18 Paul Brook <paul@codesourcery.com>
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* tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
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(md_convert_frag): Use correct reloc for add_pc. Use
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BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
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(md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
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(arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
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2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
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* symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
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@ -8186,13 +8186,13 @@ do_t_add_sub (void)
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narrow = (current_it_mask != 0);
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if (!inst.operands[2].isreg)
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{
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int add;
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add = (inst.instruction == T_MNEM_add
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|| inst.instruction == T_MNEM_adds);
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opcode = 0;
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if (inst.size_req != 4)
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{
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int add;
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add = (inst.instruction == T_MNEM_add
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|| inst.instruction == T_MNEM_adds);
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/* Attempt to use a narrow opcode, with relaxation if
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appropriate. */
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if (Rd == REG_SP && Rs == REG_SP && !flags)
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@ -8222,12 +8222,24 @@ do_t_add_sub (void)
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if (inst.size_req == 4
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|| (inst.size_req != 2 && !opcode))
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{
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/* ??? Convert large immediates to addw/subw. */
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inst.instruction = THUMB_OP32 (inst.instruction);
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inst.instruction = (inst.instruction & 0xe1ffffff) | 0x10000000;
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if (Rs == REG_PC)
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{
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/* Always use addw/subw. */
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inst.instruction = add ? 0xf20f0000 : 0xf2af0000;
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inst.reloc.type = BFD_RELOC_ARM_T32_IMM12;
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}
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else
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{
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inst.instruction = THUMB_OP32 (inst.instruction);
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inst.instruction = (inst.instruction & 0xe1ffffff)
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| 0x10000000;
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if (flags)
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inst.reloc.type = BFD_RELOC_ARM_T32_IMMEDIATE;
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else
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inst.reloc.type = BFD_RELOC_ARM_T32_ADD_IMM;
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}
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inst.instruction |= inst.operands[0].reg << 8;
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inst.instruction |= inst.operands[1].reg << 16;
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inst.reloc.type = BFD_RELOC_ARM_T32_IMMEDIATE;
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}
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}
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else
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@ -16136,7 +16148,10 @@ md_convert_frag (bfd *abfd, segT asec ATTRIBUTE_UNUSED, fragS *fragp)
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insn = THUMB_OP32 (opcode);
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insn |= (old_op & 0xf0) << 4;
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put_thumb32_insn (buf, insn);
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reloc_type = BFD_RELOC_ARM_T32_IMMEDIATE;
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if (opcode == T_MNEM_add_pc)
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reloc_type = BFD_RELOC_ARM_T32_IMM12;
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else
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reloc_type = BFD_RELOC_ARM_T32_ADD_IMM;
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}
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else
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reloc_type = BFD_RELOC_ARM_THUMB_ADD;
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@ -16153,7 +16168,10 @@ md_convert_frag (bfd *abfd, segT asec ATTRIBUTE_UNUSED, fragS *fragp)
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insn |= (old_op & 0xf0) << 4;
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insn |= (old_op & 0xf) << 16;
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put_thumb32_insn (buf, insn);
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reloc_type = BFD_RELOC_ARM_T32_IMMEDIATE;
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if (insn & (1 << 20))
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reloc_type = BFD_RELOC_ARM_T32_ADD_IMM;
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else
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reloc_type = BFD_RELOC_ARM_T32_IMMEDIATE;
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}
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else
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reloc_type = BFD_RELOC_ARM_THUMB_ADD;
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@ -17561,6 +17579,7 @@ md_apply_fix (fixS * fixP,
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break;
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case BFD_RELOC_ARM_T32_IMMEDIATE:
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case BFD_RELOC_ARM_T32_ADD_IMM:
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case BFD_RELOC_ARM_T32_IMM12:
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case BFD_RELOC_ARM_T32_ADD_PC12:
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/* We claim that this fixup has been processed here,
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@ -17581,15 +17600,21 @@ md_apply_fix (fixS * fixP,
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newval <<= 16;
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newval |= md_chars_to_number (buf+2, THUMB_SIZE);
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/* FUTURE: Implement analogue of negate_data_op for T32. */
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if (fixP->fx_r_type == BFD_RELOC_ARM_T32_IMMEDIATE)
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newimm = FAIL;
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if (fixP->fx_r_type == BFD_RELOC_ARM_T32_IMMEDIATE
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|| fixP->fx_r_type == BFD_RELOC_ARM_T32_ADD_IMM)
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{
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newimm = encode_thumb32_immediate (value);
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if (newimm == (unsigned int) FAIL)
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newimm = thumb32_negate_data_op (&newval, value);
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}
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else
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if (fixP->fx_r_type != BFD_RELOC_ARM_T32_IMMEDIATE
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&& newimm == (unsigned int) FAIL)
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{
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/* Turn add/sum into addw/subw. */
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if (fixP->fx_r_type == BFD_RELOC_ARM_T32_ADD_IMM)
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newval = (newval & 0xfeffffff) | 0x02000000;
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/* 12 bit immediate for addw/subw. */
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if (value < 0)
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{
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@ -18608,6 +18633,7 @@ arm_force_relocation (struct fix * fixp)
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if (fixp->fx_r_type == BFD_RELOC_ARM_IMMEDIATE
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|| fixp->fx_r_type == BFD_RELOC_ARM_OFFSET_IMM
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|| fixp->fx_r_type == BFD_RELOC_ARM_ADRL_IMMEDIATE
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|| fixp->fx_r_type == BFD_RELOC_ARM_T32_ADD_IMM
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|| fixp->fx_r_type == BFD_RELOC_ARM_T32_IMMEDIATE
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|| fixp->fx_r_type == BFD_RELOC_ARM_T32_IMM12
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|| fixp->fx_r_type == BFD_RELOC_ARM_T32_ADD_PC12)
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@ -1,3 +1,8 @@
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2006-07-18 Paul Brook <paul@codesourcery.com>
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* gas/arm/thumb2_add.d: New test.
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* gas/arm/thumb2_add.s: New test.
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2006-07-18 Maciej W. Rozycki <macro@mips.com>
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* gas/mips/mips4.s, gas/mips/mips4.d: Enable the "pref" test. Change
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18
gas/testsuite/gas/arm/thumb2_add.d
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18
gas/testsuite/gas/arm/thumb2_add.d
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@ -0,0 +1,18 @@
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# as: -march=armv6kt2
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# objdump: -dr --prefix-addresses --show-raw-insn
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.*: +file format .*arm.*
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Disassembly of section .text:
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0+000 <[^>]+> f60f 0000 addw r0, pc, #2048 ; 0x800
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0+004 <[^>]+> f20f 0900 addw r9, pc, #0 ; 0x0
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0+008 <[^>]+> f20f 4900 addw r9, pc, #1024 ; 0x400
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0+00c <[^>]+> f509 6880 add.w r8, r9, #1024 ; 0x400
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0+010 <[^>]+> f209 1801 addw r8, r9, #257 ; 0x101
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0+014 <[^>]+> f201 1301 addw r3, r1, #257 ; 0x101
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0+018 <[^>]+> f6af 0000 subw r0, pc, #2048 ; 0x800
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0+01c <[^>]+> f2af 0900 subw r9, pc, #0 ; 0x0
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0+020 <[^>]+> f2af 4900 subw r9, pc, #1024 ; 0x400
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0+024 <[^>]+> f5a9 6880 sub.w r8, r9, #1024 ; 0x400
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0+028 <[^>]+> f2a9 1801 subw r8, r9, #257 ; 0x101
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0+02c <[^>]+> f2a1 1301 subw r3, r1, #257 ; 0x101
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20
gas/testsuite/gas/arm/thumb2_add.s
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20
gas/testsuite/gas/arm/thumb2_add.s
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@ -0,0 +1,20 @@
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.syntax unified
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.text
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.align 2
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.global thumb2_add
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.thumb
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.thumb_func
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.type thumb2_add, %function
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thumb2_add:
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add r0, pc, #0x800
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add r9, pc, #0
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add r9, pc, #0x400
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add r8, r9, #0x400
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add r8, r9, #0x101
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add r3, r1, #0x101
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sub r0, pc, #0x800
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sub r9, pc, #0
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sub r9, pc, #0x400
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sub r8, r9, #0x400
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sub r8, r9, #0x101
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sub r3, r1, #0x101
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